drivers: spi: Add support for cc23x0 SPI
Add support for SPI to cc23x0 SoC. Only controller mode is implemented. Signed-off-by: Julien Panis <jpanis@baylibre.com> Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
This commit is contained in:
Julien Panis
Benjamin Cabé
parent
23a296f26b
commit
45895ecfea
5 changed files with 385 additions and 0 deletions
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@ -20,6 +20,7 @@ zephyr_library_sources_ifdef(CONFIG_SPI_AMBIQ_SPID spi_ambiq_spid.c)
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zephyr_library_sources_ifdef(CONFIG_SPI_ANDES_ATCSPI200 spi_andes_atcspi200.c)
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zephyr_library_sources_ifdef(CONFIG_SPI_BITBANG spi_bitbang.c)
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zephyr_library_sources_ifdef(CONFIG_SPI_CC13XX_CC26XX spi_cc13xx_cc26xx.c)
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zephyr_library_sources_ifdef(CONFIG_SPI_CC23X0 spi_cc23x0.c)
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zephyr_library_sources_ifdef(CONFIG_SPI_CDNS spi_cdns.c)
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zephyr_library_sources_ifdef(CONFIG_SPI_DW spi_dw.c)
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zephyr_library_sources_ifdef(CONFIG_SPI_EMUL spi_emul.c)
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@ -99,6 +99,7 @@ source "drivers/spi/Kconfig.andes_atcspi200"
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source "drivers/spi/Kconfig.b91"
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source "drivers/spi/Kconfig.bitbang"
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source "drivers/spi/Kconfig.cc13xx_cc26xx"
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source "drivers/spi/Kconfig.cc23x0"
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source "drivers/spi/Kconfig.cdns"
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source "drivers/spi/Kconfig.dw"
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source "drivers/spi/Kconfig.esp32"
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12
drivers/spi/Kconfig.cc23x0
Normal file
12
drivers/spi/Kconfig.cc23x0
Normal file
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@ -0,0 +1,12 @@
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# TI CC23x0 SPI configuration options
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# Copyright (c) 2024 BayLibre, SAS
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# SPDX-License-Identifier: Apache-2.0
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config SPI_CC23X0
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bool "TI SimpleLink CC23x0 SPI driver"
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default y
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depends on DT_HAS_TI_CC23X0_SPI_ENABLED
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select PINCTRL
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help
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Enable support for the TI SimpleLink CC23x0 SPI peripheral
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350
drivers/spi/spi_cc23x0.c
Normal file
350
drivers/spi/spi_cc23x0.c
Normal file
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@ -0,0 +1,350 @@
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/*
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* Copyright (c) 2024 BayLibre, SAS
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT ti_cc23x0_spi
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(spi_cc23x0, CONFIG_SPI_LOG_LEVEL);
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#include <zephyr/device.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/drivers/spi.h>
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#include <zephyr/irq.h>
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#include <zephyr/sys/util.h>
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#include <driverlib/clkctl.h>
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#include <driverlib/spi.h>
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#include "spi_context.h"
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/*
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* SPI bit rate = (SPI functional clock frequency) / ((SCR + 1) * 2)
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* Serial clock divider value (SCR) can be from 0 to 1023.
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*/
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#define SPI_CC23_MIN_FREQ DIV_ROUND_UP(TI_CC23X0_DT_CPU_CLK_FREQ_HZ, 2048)
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#define SPI_CC23_MAX_FREQ (TI_CC23X0_DT_CPU_CLK_FREQ_HZ >> 1)
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#define SPI_CC23_DATA_WIDTH 8
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#define SPI_CC23_DFS (SPI_CC23_DATA_WIDTH >> 3)
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#define SPI_CC23_INT_MASK (SPI_TXEMPTY | SPI_IDLE | SPI_RX)
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struct spi_cc23x0_config {
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uint32_t base;
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const struct pinctrl_dev_config *pincfg;
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void (*irq_config_func)(void);
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};
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struct spi_cc23x0_data {
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struct spi_context ctx;
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size_t tx_len_left;
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uint32_t tx_count;
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uint32_t rx_count;
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bool xfer_done;
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};
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static void spi_cc23x0_isr(const struct device *dev)
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{
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const struct spi_cc23x0_config *cfg = dev->config;
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struct spi_cc23x0_data *data = dev->data;
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struct spi_context *ctx = &data->ctx;
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uint32_t txd = 0, rxd;
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uint32_t status;
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status = SPIIntStatus(cfg->base, true);
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LOG_DBG("status = %08x", status);
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/*
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* Disabling the interrupts in this ISR when SPI has completed
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* the transfer triggers a subsequent spurious interrupt, with
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* a null status. Let's ignore this event.
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*/
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if (!status) {
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return;
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}
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if (status & SPI_RX) {
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/* Rx FIFO contains 1 byte */
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LOG_DBG("SPI_RX");
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SPIClearInt(cfg->base, SPI_RX);
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SPIGetDataNonBlocking(cfg->base, &rxd);
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if (spi_context_rx_buf_on(ctx)) {
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*ctx->rx_buf = rxd;
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spi_context_update_rx(ctx, SPI_CC23_DFS, 1);
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}
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data->rx_count++;
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}
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if (status & SPI_IDLE) {
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/* The byte has been transferred and SPI has moved to idle mode */
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LOG_DBG("SPI_IDLE (tx_len_left = %d)", data->tx_len_left);
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SPIClearInt(cfg->base, SPI_IDLE);
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if (!data->tx_len_left) {
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LOG_DBG("xfer_done");
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data->xfer_done = true;
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}
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}
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/*
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* Do not push a new Tx byte in the Tx FIFO while the current Rx byte (if any)
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* has not been pulled from the Rx FIFO. In other words, Tx count and Rx count
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* must be equal so a new Tx byte can be pushed.
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*/
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if (status & SPI_TXEMPTY && !data->xfer_done && data->tx_count == data->rx_count) {
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/*
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* The previous byte in the Tx FIFO (if any) has been moved
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* to the shift register
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*/
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LOG_DBG("SPI_TXEMPTY");
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SPIClearInt(cfg->base, SPI_TXEMPTY);
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if (spi_context_tx_buf_on(ctx)) {
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txd = *ctx->tx_buf;
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spi_context_update_tx(ctx, SPI_CC23_DFS, 1);
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}
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SPIPutDataNonBlocking(cfg->base, txd);
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data->tx_count++;
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data->tx_len_left--;
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}
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if (data->xfer_done) {
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LOG_DBG("complete");
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SPIDisableInt(cfg->base, SPI_CC23_INT_MASK);
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spi_context_complete(ctx, dev, 0);
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}
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}
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static int spi_cc23x0_configure(const struct device *dev,
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const struct spi_config *config)
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{
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const struct spi_cc23x0_config *cfg = dev->config;
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struct spi_cc23x0_data *data = dev->data;
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uint32_t protocol;
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if (spi_context_configured(&data->ctx, config)) {
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/* Nothing to do */
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return 0;
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}
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if (config->operation & SPI_HALF_DUPLEX) {
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LOG_ERR("Half-duplex is not supported");
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return -ENOTSUP;
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}
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/* Peripheral mode has not been implemented */
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if (SPI_OP_MODE_GET(config->operation) != SPI_OP_MODE_MASTER) {
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LOG_ERR("Peripheral mode is not supported");
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return -ENOTSUP;
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}
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/* Word sizes other than 8 bits has not been implemented */
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if (SPI_WORD_SIZE_GET(config->operation) != SPI_CC23_DATA_WIDTH) {
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LOG_ERR("Word sizes other than %d bits are not supported", SPI_CC23_DATA_WIDTH);
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return -ENOTSUP;
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}
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if (config->operation & SPI_TRANSFER_LSB) {
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LOG_ERR("Transfer LSB first mode is not supported");
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return -EINVAL;
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}
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if (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES) &&
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(config->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) {
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LOG_ERR("Multiple lines are not supported");
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return -EINVAL;
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}
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if (config->operation & SPI_CS_ACTIVE_HIGH && !spi_cs_is_gpio(config)) {
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LOG_ERR("Active high CS requires emulation through a GPIO line");
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return -EINVAL;
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}
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if (config->frequency < SPI_CC23_MIN_FREQ) {
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LOG_ERR("Frequencies lower than %d Hz are not supported", SPI_CC23_MIN_FREQ);
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return -EINVAL;
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}
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if (config->frequency > SPI_CC23_MAX_FREQ) {
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LOG_ERR("Frequency greater than %d Hz are not supported", SPI_CC23_MAX_FREQ);
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return -EINVAL;
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}
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if (SPI_MODE_GET(config->operation) & SPI_MODE_CPOL) {
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if (SPI_MODE_GET(config->operation) & SPI_MODE_CPHA) {
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protocol = SPI_FRF_MOTO_MODE_7;
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} else {
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protocol = SPI_FRF_MOTO_MODE_6;
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}
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} else {
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if (SPI_MODE_GET(config->operation) & SPI_MODE_CPHA) {
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protocol = SPI_FRF_MOTO_MODE_5;
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} else {
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protocol = SPI_FRF_MOTO_MODE_4;
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}
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}
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/* Enable clock */
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CLKCTLEnable(CLKCTL_BASE, CLKCTL_SPI0);
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/* Disable SPI before making configuration changes */
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SPIDisable(cfg->base);
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/* Configure SPI */
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SPIConfigSetExpClk(cfg->base, TI_CC23X0_DT_CPU_CLK_FREQ_HZ,
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protocol, SPI_MODE_CONTROLLER,
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config->frequency, SPI_CC23_DATA_WIDTH);
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data->ctx.config = config;
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/* Configure Rx FIFO level */
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HWREG(cfg->base + SPI_O_IFLS) = SPI_IFLS_RXSEL_LEVEL_1;
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/* Re-enable SPI after making configuration changes */
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SPIEnable(cfg->base);
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return 0;
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}
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static void spi_cc23x0_initialize_data(struct spi_cc23x0_data *data)
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{
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data->tx_len_left = MAX(spi_context_total_tx_len(&data->ctx),
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spi_context_total_rx_len(&data->ctx));
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data->tx_count = 0;
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data->rx_count = 0;
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data->xfer_done = false;
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}
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static int spi_cc23x0_transceive(const struct device *dev,
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const struct spi_config *config,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs)
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{
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const struct spi_cc23x0_config *cfg = dev->config;
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struct spi_cc23x0_data *data = dev->data;
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struct spi_context *ctx = &data->ctx;
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int ret;
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spi_context_lock(ctx, false, NULL, NULL, config);
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ret = spi_cc23x0_configure(dev, config);
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if (ret) {
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goto ctx_release;
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}
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spi_context_buffers_setup(ctx, tx_bufs, rx_bufs, SPI_CC23_DFS);
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spi_cc23x0_initialize_data(data);
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spi_context_cs_control(ctx, true);
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SPIEnableInt(cfg->base, SPI_CC23_INT_MASK);
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ret = spi_context_wait_for_completion(ctx);
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if (ret) {
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SPIDisableInt(cfg->base, SPI_CC23_INT_MASK);
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LOG_ERR("SPI transfer failed (%d)", ret);
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} else {
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LOG_DBG("SPI transfer completed");
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}
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spi_context_cs_control(ctx, false);
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ctx_release:
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spi_context_release(ctx, ret);
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return ret;
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}
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static int spi_cc23x0_release(const struct device *dev,
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const struct spi_config *config)
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{
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const struct spi_cc23x0_config *cfg = dev->config;
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struct spi_cc23x0_data *data = dev->data;
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if (!spi_context_configured(&data->ctx, config)) {
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return -EINVAL;
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}
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if (SPIBusy(cfg->base)) {
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return -EBUSY;
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}
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spi_context_unlock_unconditionally(&data->ctx);
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return 0;
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}
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static const struct spi_driver_api spi_cc23x0_driver_api = {
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.transceive = spi_cc23x0_transceive,
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.release = spi_cc23x0_release,
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};
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static int spi_cc23x0_init(const struct device *dev)
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{
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const struct spi_cc23x0_config *cfg = dev->config;
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struct spi_cc23x0_data *data = dev->data;
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int ret;
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cfg->irq_config_func();
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ret = pinctrl_apply_state(cfg->pincfg, PINCTRL_STATE_DEFAULT);
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if (ret) {
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LOG_ERR("Failed to apply SPI pinctrl state");
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return ret;
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}
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ret = spi_context_cs_configure_all(&data->ctx);
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if (ret) {
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return ret;
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}
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spi_context_unlock_unconditionally(&data->ctx);
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return 0;
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}
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#define SPI_CC23X0_INIT(n) \
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PINCTRL_DT_INST_DEFINE(n); \
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\
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static void spi_irq_config_func_##n(void) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(n), \
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DT_INST_IRQ(n, priority), \
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spi_cc23x0_isr, \
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DEVICE_DT_INST_GET(n), 0); \
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irq_enable(DT_INST_IRQN(n)); \
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}; \
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\
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static const struct spi_cc23x0_config spi_cc23x0_config_##n = { \
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.base = DT_INST_REG_ADDR(n), \
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.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
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.irq_config_func = spi_irq_config_func_##n \
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}; \
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\
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static struct spi_cc23x0_data spi_cc23x0_data_##n = { \
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SPI_CONTEXT_INIT_LOCK(spi_cc23x0_data_##n, ctx), \
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SPI_CONTEXT_INIT_SYNC(spi_cc23x0_data_##n, ctx), \
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SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx) \
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}; \
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\
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DEVICE_DT_INST_DEFINE(n, \
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spi_cc23x0_init, \
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NULL, \
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&spi_cc23x0_data_##n, \
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&spi_cc23x0_config_##n, \
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POST_KERNEL, \
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CONFIG_SPI_INIT_PRIORITY, \
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&spi_cc23x0_driver_api)
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DT_INST_FOREACH_STATUS_OKAY(SPI_CC23X0_INIT)
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21
dts/bindings/spi/ti,cc23x0-spi.yaml
Normal file
21
dts/bindings/spi/ti,cc23x0-spi.yaml
Normal file
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@ -0,0 +1,21 @@
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# Copyright (c) 2024 BayLibre, SAS
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# SPDX-License-Identifier: Apache-2.0
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description: TI SimpleLink CC23x0 SPI controller
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compatible: "ti,cc23x0-spi"
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include: [spi-controller.yaml, pinctrl-device.yaml, base.yaml]
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properties:
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reg:
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required: true
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interrupts:
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required: true
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pinctrl-0:
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required: true
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pinctrl-names:
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required: true
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