Commit graph

1005 commits

Author SHA1 Message Date
YuLong Yao 2a013216eb drivers: gd32_spi: drop APB marco
drop APB marco because clock_control driver is added.

Signed-off-by: YuLong Yao <feilongphone@gmail.com>
2023-01-12 21:45:38 +01:00
TOKITA Hiroshi e55cbb8ce6 drivers: spi: gd32: Add support DMA transfer
Add supporting DMA-based transfer for GD32 SPI.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2023-01-11 08:50:56 -08:00
Fabio Baltieri afd766d2b3 drivers: xec_qmspi: add missing default y to SPI_XEC_QMSPI_FULL_DUPLEX
Add missing "default y" to the Kconfig option so that it gets selected
automatically when a matching devicetree node is enabled.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-01-11 09:11:03 -06:00
Erwan Gouriou 66d4c64966 all: Fix "#if IS_ENABLED(CONFIG_FOO)" occurrences
Clean up occurrences of "#if IS_ENABLED(CONFIG_FOO)" an replace
with classical "#if defined(CONFIG_FOO)".

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-12-21 10:09:23 +01:00
Pawel Czarnecki e8d3673c13 soc: arm: silabs: remove soc_gpio_configure wrapper
It would be better to use GPIO_PinModeSet() functions directly
in the drivers.

Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
2022-12-20 22:50:19 +01:00
Duong Vu Nam b24f4625f0 arch: support nocache for Cortex-R52
Config NOCACHE_MEMORY depend on ARCH_HAS_NOCACHE_MEMORY_SUPPORT. Enable
ARCH_HAS_NOCACHE_MEMORY_SUPPORT for Cortex-R52 to run NXP S32Z/E with
nocache attibute.

Enable nocache in each driver use it.

Signed-off-by: Duong Vu Nam <duong.vunam@nxp.com>
2022-12-12 10:39:31 +01:00
Lucas Tamborrino b196edf55d drivers: spi: esp32xx: Fix buffer length for DMA
Fixes #52588

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-12-07 10:13:38 +00:00
Jonas Otto d3415e2ce1 drivers: spi_mcux_lpspi: fix baudrate change when switching devices
When configuring an LPSPI module for a new device with different baud rate,
the module needs to be disabled for the baud rate change to take effect.
This adds the necessary call to LPSPI_Enable before initializing the
module.

Fixes #51177

Signed-off-by: Jonas Otto <jonas@jonasotto.com>
2022-11-30 11:28:22 +01:00
Gaël PORTAY ffed8388e7 drivers: spi_context: fix some LOG_DBG warnings
This casts the char * buffers to void * before giving them to the
LOG_DBG function to fix a warning at runtime.

Signed-off-by: Gaël PORTAY <gael.portay@gmail.com>
2022-11-29 22:52:40 -08:00
Dat Nguyen Duy 6d866b62bf drivers: spi: introduce SPI driver for NXP S32
This introduces SPI driver for NXP S32 platform

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2022-11-24 09:37:24 +01:00
Benedikt Schmidt 5fc743e5f9 drivers: spi: fix return value of spi_transceive for STM32 slaves
Return correctly the number of received bytes for a
spi_transceive on a STM32 SPI slave.
Fixes #52216

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2022-11-16 11:19:43 +01:00
Tom Burdick 74b9699213 spi: SAM support SPI transfers with DMA
For larger transfers DMA can be used enabling other tasks
to continue running. A threshold of 32 byte transfers
is about right and is defined threshold value for using DMA.

This does not currently support multiple SPI transactions changing
chip select with DMA (though the hardware supports this) currently.
Instead opting for the simpler first change of enabling one shot
DMA SPI transfers for those where the size warrants it.

Adds the loopback binding option to enable the spi_loopback test.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-11-08 09:37:59 +00:00
Jay Vasanth 37874f8f67 drivers: spi: fix formatting in mec172x ldma driver
fix leading white space and use tabs instead of space
in mec172x spi ldma driver.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-10-28 14:29:46 -05:00
Jay Vasanth 0976343513 drivers: SPI: MEC172x QMSPI clock fix
Microchip MEC172x QMSPI expanded its clock divider register
field from 8 to 16 bits. QMSPI source clock is on the fast
peripheral domain therefore get the frequency from the clock
control driver.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-10-28 14:29:46 -05:00
Gerard Marull-Paretas 178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Jay Vasanth ae9de20222 drivers: spi: Added MEC172x full duplex qmspi driver
Add MEC172x full duplex qmspi driver version to support full
duplex transfers as expected by the Zephyr spi driver model.
On every spi clock we transmit one bit and receive one bit.
This driver will work with Zephyr SPI NOR driver.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-10-14 14:09:51 -05:00
Lucas Tamborrino c0a2b9bbc4 drivers: spi: esp32xx: remove unnecessary log
Remove unnecessary log in init_dma function.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-10-14 09:56:38 +02:00
Gerard Marull-Paretas 6a0f554ffa include: add missing kernel.h include
Some files make use of Kernel APIs without including kernel.h, fix this
problem.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Lucas Tamborrino a29ebef6ce drivers: spi: esp32c3: add DMA support
Add SPI DMA support for esp32c3.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-10-04 10:35:14 +02:00
Lucas Tamborrino a11a103518 drivers: spi: esp32/s2: add DMA support
Add SPI DMA support for esp32/s2.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-10-04 10:35:14 +02:00
Gerhard Jörges 1e87837f2a drivers: spi: pl022: fix dropping RX bytes
If the thread that submits data over spi is interrupted by a higher
priority thread while pushing data to the tx fifo the hardware pushes
data to spi and frees up space in the fifo. In this case more than
8 Bytes are written to the tx fifo and bytes in the rx fifo get lost
before they are collected in the rx while loop.
To avoid this, the tx loop is exited after a maximum of 8 bytes and the
rx loop will run until it collected all bytes from the rx fifo.

Signed-off-by: Gerhard Jörges <joerges@metratec.com>
2022-09-22 17:16:45 +02:00
Jay Vasanth d6ba6a5fac spi: mec15xx: add pinctrl for mec15xx/mec1501 qmspi
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 qmspi. Update board dts, pinmux and driver files.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-09-21 18:05:32 +00:00
Kevin Wang c01dcacb6f drivers: spi: add Andes atcspi200 driver
Support the Andes atcspi200 spi driver

Signed-off-by: Kevin Wang <yunkai@andestech.com>
2022-09-07 15:34:47 +02:00
Francois Ramu 86ede2b679 drivers: spi : driver with DMA for the stm32u5
This commit is the adaptation of the stm32 SPI driver with DMA
transfer for the stm32u5 soc.
Use the DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
also valid for the stm32U5 serie.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-09-07 15:34:35 +02:00
Gerard Marull-Paretas 64eb350e5e drivers: spi: gd32: use clock control API
Use the clock control API to enable/get rate of SPI clocks.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Gerard Marull-Paretas 79e6b0e0f6 includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.

The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.

NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-05 16:31:47 +02:00
Sylvio Alves 7a00f7b793 west.yml: update hal to v4.4.1 base
west.yml: update hal_espressif to use latest v4.4.1 updates.
This change needs to be insync with esp32c3 timer changes, otherwise it
breaks it.

drivers: timer: update esp32c3 systimer to meet API changes.
Systimer API was refactored in hal v4.4.1, which
requires updates in esp32C3 systimer. Timer behavior is maintained
as is.

mcpwm: add v4.4.1 include reference, which was refactored as well.

driver: spi: esp32: update internal structs to meet API changes.

cmake: updated esp32 board to use HAL_ prefix as from west blobs
requirement.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-09-01 21:48:18 +00:00
Stephanos Ioannidis e9b29a6f83 drivers: spi: psoc6: Fix spi_psoc6_transceive calls
The commit 4c20403629 updated the
`spi_psoc6_transceive` function signature but forgot to update its
usages.

This commit updates the `spi_psoc6_transceive` function invocations
to properly provide the callback and user data parameters.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-09-01 01:02:50 +09:00
Stephanos Ioannidis a25257fcef drivers: spi: sifive: Migrate spi_context_{complete,lock} usage
This commit updates the SiFive SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-09-01 01:02:50 +09:00
Stephanos Ioannidis da570f871f drivers: spi: mchp_mss_qspi: Migrate spi_context_{complete,lock} usage
This commit updates the Microchip MSS QSPI SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-09-01 01:02:50 +09:00
Stephanos Ioannidis 068006e1dc drivers: spi: litespi: Migrate spi_context_complete usage
This commit updates the LiteSPI SPI driver to reflect the
`spi_context_complete` function signature change introduced in the
commit 4c20403629.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-09-01 01:02:50 +09:00
Stephanos Ioannidis fedf0faac0 drivers: spi: gecko: Migrate spi_context_complete usage
This commit updates the Gecko SPI driver to reflect the
`spi_context_complete` function signature change introduced in the
commit 4c20403629.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-09-01 01:02:50 +09:00
Stephanos Ioannidis c4840535b6 drivers: spi: gd32: Migrate spi_context_{complete,lock} usage
This commit updates the GD32 SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-09-01 01:02:50 +09:00
Gerard Marull-Paretas d55bc1f7ba drivers: spi: gd32: use reset API
Use the reset API to reset the peripheral state before initialization.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-29 10:30:49 +02:00
Tom Burdick 4c20403629 spi: callback API for asynchronous transcieve
Adds a new spi_transcieve_cb API which enables asynchronous
SPI transactions with callback notification.

The exist spi_transcieve_async API remains and uses the new
spi_transcieve_cb API to provide a k_poll_signal notifier.

The driver API changes to provide a callback and userdata
parameter to async transcieve. All drivers in the tree
have been updated to the change.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-08-26 09:29:48 -04:00
Gerard Marull-Paretas a202341958 devices: constify device pointers initialized at compile time
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).

Automated using:

```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-22 17:08:26 +02:00
Fabio Baltieri bf47c2a763 drivers: drop few unused pinmux.h include
Drop few unused include pinmux header from drivers that don't seem to be
using it anymore.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2022-08-18 12:13:14 +00:00
TOKITA Hiroshi a7721aa30d drivers: spi: pl022: Support interrupt based transfer
Add interrupt based transfer feature for the PL022 SPI.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2022-08-18 10:18:16 +02:00
TOKITA Hiroshi da32e26a3d drivers: spi: Add basic support for PL022
Add fundamental feature support for PL022 SPI peripheral.
This commit implements synchronous transfer with 8bit-MSB format.

Optional functions are not currently implemented yet.

- interrupt based transfer is not implemented yet.
- DMA transfer is not implemented yet.
- Slave mode is not implemented yet.
- Currently support only 8-bit data transfer.

Hardware limitation:

- LSB-first format is not supported by hardware.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2022-08-18 10:18:16 +02:00
Bryce Wilkins 405ebc0cd0 drivers: spi: Set spi context for mcux flexcomm spi slave configuration
This is a bug fix. A pointer to the spi configuration is not saved when
the spi driver is configured for slave operation and it can lead to
runtime errors.

Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
2022-08-10 22:01:11 -05:00
Henrik Brix Andersen d6776fe169 drivers: spi: check if clock device is ready before accessing
Add check for device_is_ready() before accessing clock control devices.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-08-09 17:16:16 +02:00
XiNGRZ Chan 7109632046 drivers: spi_esp32_spim: Add support for IOMUX mode
In order to work on a clock speed higher than 20 MHz, IO MUX is required.

Co-authored-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Signed-off-by: XiNGRZ Chan <hi@xingrz.me>
2022-08-09 12:31:23 +02:00
Erwan Gouriou 1ef9e9eb9b include: drivers: stm32 clock_control: Replace OPT by DOMAIN
In the continuation of the previous commit, replace _OPT_ by _DOMAIN_
in macros relating to this feature.
hen, adapt drivers and tests to this new wording.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-08-08 14:17:07 +02:00
Bryce Wilkins 5ff80ef2b1 drivers: spi: Add default char to mcux flexcomm spi driver
Adds optional device tree property to specify a default character
to clock out when the TX buffer pointer is NULL. If the property is
not set the existing behavior (default char of 0x00) is used.

I verified the expected behavior using an i.MX RT685 board and
logic analyzer that the def-char character is transmitted when
TX buffer pointer is NULL.

Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
2022-08-05 09:28:39 -05:00
Gerard Marull-Paretas 149fe06341 drivers: arc/designware: remove unused <soc.h>
The <soc.h> header is not required by a few ARC/Designware drivers, so
remove it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
TOKITA Hiroshi 49522c061f drivers: spi: gd32: support interrupt-driven mode
Add supporting interrupt-based asynchronous operation for GD32 SPI.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-08-01 10:32:33 +02:00
Simon Hein d0921018fc drivers: Fix coding guidelines MISRAC:2012 Rule 14.4 do-whiles/Zero checks
MISRA C:2012 Rule 14.4 (The controlling expression of an if statement
and the controlling expression of an iteration-statement shall have
essentially Boolean type.)

Use `do { ... } while (false)' instead of `do { ... } while (0)'.
Use comparisons with zero instead of implicitly testing integers.

The commit is a subset of the original auditable-branch commit:
5d02614e34a86b549c7707d3d9f0984bc3a5f22a

Signed-off-by: Simon Hein <SHein@baumer.com>
2022-07-26 15:30:24 -04:00
Kumar Gala 0be3a7604b drivers: spi: Update drivers to use devicetree Kconfig symbol
Update spi drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.

We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-25 09:38:30 +02:00
Kumar Gala 8fb2210cfb emul: remove name param from bus register APIs
Rework the <BUS>_emul_register calls to not pass the name param.  The
name param is only used for logging and we can get it from the
struct <BUS>_emul instead.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-19 15:52:36 -05:00
Gerard Marull-Paretas 20177daa0f drivers: spi: nrfx_spi(m|s): add common init function
Having a per-instance init function makes code cluttered and hard to
read. Just create a per-instance IRQ connect function (required to
resolve IRQ_CONNECT parameters at compile time).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-07-19 13:20:00 -07:00
Gerard Marull-Paretas a8b444f956 drivers: spi: nrfx_spi(m|s): s/_DEVICE/_DEFINE
Use SPI_NRFX_SPI(M|S)_DEFINE, since the macro _defines_ a device.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-07-19 13:20:00 -07:00
Gerard Marull-Paretas 7d42a8ff18 drivers: spi: nrfx_spim: remove unused definitions
SPIM_NRFX_MISO_PULL_DOWN and SPIM_NRFX_MISO_PULL_UP were not used,
delete them.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-07-19 13:20:00 -07:00
Gerard Marull-Paretas e5ba80733a drivers: spi: nrfx_spi(m|s): drop NRFX_SPI(S|M)_INSTANCE usage
Stop using NRFX_SPI(S|M)_INSTANCE helper so that peripheral address from
Devicetree is used. We should not rely on HAL for hardware description
but Devicetree.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-07-19 13:20:00 -07:00
Gerard Marull-Paretas 2cfb5012db drivers: spi: nrfx_spim: move rx delay to DT
Move the RX (MISO) delaying capability information to Devicetree. It is
done using 2 properties:

- rx-delay-supported: enabled on SPI nodes that support delaying RX.
  This property can be used by the driver to determine if this
  capability is supported or not on a given instance.
- rx-delay: the actual RX delay value

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-07-19 13:20:00 -07:00
Gerard Marull-Paretas ee8d8b3c6e drivers: spi: nrfx_spis: max buffer length is SoC specific
The maximum transfer buffer length is SoC specific, not instance
specific. This patch defines MAX_BUF_LEN at driver level in a SoC
specific manner instead of using HAL values that are instance specific
but that always take the same value depending on the SoC.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-07-19 13:20:00 -07:00
Gerard Marull-Paretas 72cc583dc9 drivers: spi: nrfx_spim: max chunk length is SoC specific
The maximum transfer chunk length is SoC specific, not instance
specific. This patch defines MAX_CHUNK_LEN at driver level in a SoC
specific manner instead of using HAL values that are instance specific
but that always take the same value depending on the SoC.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-07-19 13:20:00 -07:00
Gerard Marull-Paretas 3c6649f631 drivers: spi: spi_nrfx_spi(m|s): move ORC to DT
Specify the overrun character in Devicetree. Since 0xFF is the most
common value, DT property contains such default.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-07-19 13:20:00 -07:00
Gerard Marull-Paretas 4ad3a96059 drivers: spi: nrfx_spim: move maximum frequency parameter to DT
Devicetree is the natural place to describe hardware, so move the
maximum frequency the SPI can work with to Devicetree instead of relying
on values from HAL.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-07-19 13:20:00 -07:00
Gerard Marull-Paretas 717f81795b drivers: spi: nrfx_spim: use DT_IRQN
Driver was not using Devicetree to obtain the SPIM IRQ number.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-07-19 13:20:00 -07:00
Aaron Massey fc98549952 emul: Use DEVICE_DT_GET instead of DT_LABEL
DT nodes aren't guaranteed to define a label property. But emulated bus
controllers currently make use of this property to dispatch to the
associated emulator.

Have emulated bus controllers use DEVICE_DT_GET(node_id) to dispatch to
right target peripheral emulator. This also change makes emul_get_binding
and device_get_binding synonymous in behavior with respect to their
parameters.

This also strictly enforces a 1:1 correspondence between invocations of
DEVICE_DT_DEFINE and EMUL_DEFINE.

Signed-off-by: Aaron Massey <aaronmassey@google.com>
2022-07-19 11:43:30 -05:00
Aaron Massey 9d7b9dc807 emul: Simplify emulator bus initialization and API
Allow emulator creators to write an init function that can be used
across multiple busses so as to reduce the boilerplate and cognitive
load in creating an emulator.

Part of this change includes allowing access to the emul struct from a
field in a {bus}_struct api (e.g. i2c_struct), which removes the need for
sporadic usages of CONTAINER_OF to access the emul struct.

Overall, this change simplifies and reduces the amount of boilerplate
code to get a device emulator up and running, thus reducing excise work
to writing tests.

TEST=twister on accel,espi, and eeprom drivers tests

Signed-off-by: Aaron Massey <aaronmassey@google.com>
2022-07-19 11:43:30 -05:00
Aaron Massey 1028459afd emul: Run clang-format
Run clang-format on all files touched by improved emulator API pull-request
that allowed access to the target device emulator from its bus api without
CONTAINER_OF usage.

drivers/i2c/i2c_emul.c
drivers/spi/spi_emul.c
include/zephyr/drivers/emul.h
include/zephyr/drivers/espi_emul.h
include/zephyr/drivers/i2c_emul.h
include/zephyr/drivers/spi_emul.h
subsys/emul/emul.c
subsys/emul/emul_bmi160.c
subsys/emul/espi/emul_espi_host.c
subsys/emul/i2c/emul_atmel_at24.c

TEST=twister on accel,espi, and eeprom drivers tests

Signed-off-by: Aaron Massey <aaronmassey@google.com>
2022-07-19 11:43:30 -05:00
Tomislav Milkovic 0fe2c1fe90 everywhere: Fix legacy include paths
Any project with Kconfig option CONFIG_LEGACY_INCLUDE_PATH set to n
couldn't be built because some files were missing zephyr/ prefix in
includes
Re-run the migrate_includes.py script to fix all legacy include paths

Signed-off-by: Tomislav Milkovic <milkovic@byte-lab.com>
2022-07-18 16:16:47 +00:00
Yannis Damigos f845d9ac02 drivers: spi_esp32_spim: Support more CS pins per SPI instance
Support more CS pins per SPI instance

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2022-07-14 15:51:00 +00:00
Andreas Sandberg d33b89befe drivers: spi: spi-bitbang: Add support for half duplex
Implement support for half duplex communication in the bit bang SPI
driver. The SPI driver will use the MOSI pin is for both TX and RX
operations when using half duplex mode.

In half-duplex mode, the driver configures the MOSI pin as an input
pin for input only transactions. Transactions that are bidirectional
are forbidden. After an SPI transaction, the MOSI pin is left as an
input if it was an RX transaction or an output after a TX
transaction. Like before, the MOSI pin is initialized as an
(inactive) output pin when the bus is initialized.

Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
2022-07-13 10:15:00 +02:00
Gerard Marull-Paretas c2d699ec2d drivers: spi: sifive: remove CONFIG_SIFIVE_SPI_0_ROM
CONFIG_SIFIVE_SPI_0_ROM (default y) was an option to disable spi0 if
used to access SPI Flash ROM. However, its design had a problem: it
relied on instance numbers. You had to set status okay for spi0 to make
it work (incongruent with the purpose of the option itself). This patch
makes things simpler: if such SPI0 is not available, simply keep it
disabled in DT. Bindings have been updated to mention this case.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-07-11 17:56:55 +02:00
Piotr Dymacz 20cb405e17 drivers: adjust cc13xx_cc26xx drivers for hal_ti update
The TI SimpleLink SDK got updated to version '4.40.04.04' in 'hal_ti'.
This introduced renames of some functions in HAL and has to be reflected
in Zephyr drivers which make use of them.

This renames 'PRCMPowerDomainStatus' to 'PRCMPowerDomainsAllOn' in all
affected 'cc13xx_cc26xx' drivers.

Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
2022-07-08 09:37:43 +02:00
Anas Nashif 49b36ead95 drivers: add mising braces to single line if statements
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-06 11:00:45 -04:00
Andreas Sandberg a05e8dcc5e drivers: spi: spi-bitbang: Fix CS glitch in transceive
spi_context_cs_configure_all() is currently called from
spi_bitbang_transceive(). This causes a glitch when combined with
SPI_HOLD_ON_CS is used.

Move the initialization to spi_bitbang_init which is what the other
SPI drivers seem to do.

Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
2022-07-06 11:11:14 +02:00
Andreas Sandberg 65252ffd95 drivers: spi: spi-bitbang: Initialize CS GPIOs
The SPI bitbang driver doesn't correctly initialize the list of CS
GPIOs. As a consequence, SPI buses using the bitbang driver won't
drive CS low. Add the missing initialization.

Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
2022-07-06 11:11:14 +02:00
Erwan Gouriou 890d42759b drivers: spi: stm32: Use 'st,stm32h7-spi' compatible input when possible
Instead of using or'ed list of Kconfig options listing the compatible
series with what can be called "stm32h7 variant", use the matching
compatible information.
This will prevent to update the driver next time that a compatible series
is ported into zephyr.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-07-04 14:23:34 +00:00
Jose Alberto Meza b4d82289e1 drivers: spi: xec: mec172x: Reflect update device tree properties
Propagate update device tree properties.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2022-07-04 16:18:42 +02:00
Gerard Marull-Paretas 4946a15f15 soc: arm: gigadevice: use common API headers
Stop relying on <soc.h> to access HAL APIs. Use generic, per-API headers
instead. Note that <soc.h> has been left as is for now, since ARM MPU
relies on a fragile chain of includes/type definitions.

This change should improve compilation efficiency, as we no longer pull
APIs that are not needed. A similar approach is followed by STM32
drivers.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-06-22 18:41:19 +09:00
Anas Nashif 2d87948818 drivers: ipm/spi/intc: remove Intel S1000 support
Remove intel_s1000_crb support. The board is no longer available or
supported in the zephyr tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-06-13 16:19:51 -04:00
Naga Sureshkumar Relli 248047323e drivers: spi: Add support for Polarfire SOC QSPI
This patch adds driver for the Microchip Polarfire SOC MSS QSPI
controller.
The interrupts of the MSS QSPI are routed through PLIC(Platform level
interrupt controller).

Tested with generic spi-nor flash driver(spi_flash) with both Fixed
flash configuration and Read flash parameters at runtime(using SFDP).

Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
2022-06-13 12:11:28 +02:00
Marcin Niestroj 774a3cd756 drivers: spi: spi_nrfx_spim: fix !LEGACY_INCLUDE_PATH
Add missing zephyr/ prefix to fix CONFIG_LEGACY_INCLUDE_PATH=n build.

Fixes: d64dc771f3 ("drivers: spi: spi_nrfx_spim: utilize EasyDMA property
  from devicetree")

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2022-06-06 12:07:22 +02:00
Adam Wojasinski d64dc771f3 drivers: spi: spi_nrfx_spim: utilize EasyDMA property from devicetree
This commit aligns SPIM shim to utilize memory-region property from
nordic,nrf-uarte compatible. The memory-region is not required
property that enables user to specify placement of dma buffers
in memory region. It is done by assigning to memory-region property,
phandle to node with zephyr,memory-region and mimo-sram compatible.

When memory-region property is not specified for given
instance, buffer is placed in default RAM region with other data.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2022-06-05 14:27:29 +02:00
Shawn Nematbakhsh 3386b853ac drivers: spi_sifive: Optimize xfer to minimize downtime between frames.
The SPI peripheral on SiFive parts uses FIFOs for Rx and Tx (FIFO size
undocumented, but empirically found to be 8 bytes on FE310, likely
identical on FU540 / FU740). Make use of these FIFOs in order to
continuiously feed Tx data as available.

Verified to transmit 1 MHz SPI @ 200 MHz coreclk / tlclk on FE310
continuously without downtime between frames.

Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
2022-06-05 14:14:59 +02:00
Shawn Nematbakhsh e17d5ed282 drivers: spi_sifive: Use uint8_t data/buffer types to match spi_context.
spi_context uses uint8_t buffers, and HW rxdata / txdata registers only
contain 8 bits of data (along with b31 full / empty flag), so uint8_t is
appropriate.

Suggested-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
2022-06-05 14:14:59 +02:00
Michal Sieron 9f6c531da0 drivers: spi: spi_litespi: Update driver registers
Make driver take register info from device tree so it can work with both
8-bit and 32-bit CSRs.

Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
2022-05-27 15:27:11 -07:00
Nazar Palamar d940d23c10 modules: hal_infineon: added initial Kconfig and CMakeLists.txt
- added initial Kconfig
- added initial CMakeLists.txt (root, core-lib,  mtb-pal-cat1)
- updated module, driver and soc to use CONFIG_USE_INFINEON_xx
  defines from modules/hal_infineon/Kconfig

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2022-05-13 21:34:59 +02:00
Jordan Yates c28874657b spi: spi_b91: use new DT_INST_STRING_TOKEN macro
Use the dedicated `DT_INST_STRING_TOKEN` macro instead of manually
retrieving `DT_DRV_INST`.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2022-05-13 14:17:08 +02:00
Erwan Gouriou 0b65c1c619 drivers/spi: stm32: Use alt clock freq if available
Add support for an alternate clock. If available,
alternate clock is enabled and used to get the
device clock rate.

Fixes #41650

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-05-10 18:42:30 +02:00
Gerard Marull-Paretas fb60aab245 drivers: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:58:21 +02:00
Henrik Brix Andersen c83a0d5d1f drivers: spi: rv32m1: lpspi: add pinctrl support
Add pinctrl support to the OpenISA RV32M1 LPSPI SPI driver.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-05 13:34:39 -05:00
Carlo Caione 69b28bfd07 pm: policy: Consider substates for state lock functions
Extend the current pm_policy_state_lock_*() functions to support
substates.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-04-28 16:32:23 +02:00
Glauber Maroto Ferreira 9354749cb5 esp32c3: drivers: spi: removal of unused definitions
Clean up of pin signals definitions previously used
by the pinmux driver, now deprecated by the use of
the pinctrl API.

Refactor device tree macros usage to make usage of
SPI instances more general.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-04-20 13:27:47 +02:00
Glauber Maroto Ferreira 6303118260 esp32s2: drivers: spi: removal of unused definitions
Clean up of pin signals definitions previously used
by the pinmux driver, now deprecated by the use of
the pinctrl API.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-04-20 13:27:47 +02:00
Glauber Maroto Ferreira 40a80d236e drivers: spi: esp32: use pinctrl API
and removes references/usage of old pinmux properties.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-04-20 13:27:47 +02:00
Vaishnav Achath ace77c71e9 drivers: CC1XX/CC26XX based boards: transition to pinctrl driver
This commit has the necessary changes to update the consumers
of pinmux driver(SPI, I2C, UART) and update the board specific
files to use the pinctrl interface.

Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
2022-04-18 18:19:46 -04:00
Attie Grande cfad60d4dd spi: sam0: fix fast-rx path, and refresh comments
The SAM0 fast-path implementation was broken, and partially fixed in
commits 8181eed and 8a99bd0...

This patch resolves an issue where the MSB is always zero on SAML21
parts, and appears to follow suit with the previous patches.

This patch also refreshes the commentary, and removes mention of the
"interleaved" operation that is no longer used - which appears to have
been problematic in the past.

In addition to this, it also resolves an off-by-one error in both the
fast_rx and fast_rxrx paths, which would have been tripped when
transmitting a zero-byte buffer.

Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
2022-04-13 13:32:45 -07:00
Daniel DeGrasse c637d7d672 drivers: spi: spi_mcux_flexcomm: add pinctrl support to lpc spi driver
add pinctrl support for spi_mcux_flexcomm driver.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-06 20:57:22 -07:00
Shawn Nematbakhsh c74526919d soc: riscv: sifive-freedom: Get coreclk and peripheral clock from DTS.
Rather than specify input clock for each peripheral individually, instead
specify the relevant clocks in DTS.

This will enable easier support for non-default coreclk on fe310 in a
follow-up CL.

Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
2022-04-05 12:00:03 +02:00
Andrzej Głąbek 586e26e8fc soc: nrf: Use data from DTS to populate HAS_HW_NRF_* Kconfig options
Instead of selecting appropriate HAS_HW_NRF_* options for particular
nRF SoCs (and simulated nRF52 target), set their values basing on
information from devicetree.
Correct also semantics of those options so that they are set only when
a corresponding DT node is enabled. This allows using them directly in
Kconfig dependencies of Zephyr drivers for nRF peripherals. Update
appropriately these dependencies.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-04-02 15:14:38 +02:00
Sylvio Alves e04172fcef drivers: spi: esp32c3: add master init call
ESP32C3 requires master init call to enable its clock
gate. Without this, SPI interface may not initialize
properly.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-04-01 13:00:16 -05:00
Bartosz Bilas 1d40d4fa5a drivers: spi_handlers: switch to gpio_dt_spec member
Don't use the old gpio_dev spi_cs_control's member
since it's been deprecated in favor of gpio_dt_spec.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2022-03-29 10:24:56 -05:00
HaiLong Yang 9d2425c186 drivers: spi: introduce gd32 spi driver
Add a simple gd32 spi driver.

Signed-off-by: HaiLong Yang <cameledyang@pm.me>
2022-03-29 10:21:15 -05:00
Gerson Fernando Budke fbddf7847d drivers: spi: Add sam0 support to pinctrl
This add support to pinctrl at Atmel sam0 spi driver. It updates all
boards with new pinctrl groups format and drop pinmux entries.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2022-03-24 15:45:37 -07:00
Gerson Fernando Budke 38d0659931 drivers: spi: Update sam driver to use pinctrl
This update Atmel sam spi driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2022-03-24 15:45:37 -07:00
Filip Kokosinski 38f38e0be8 boards: FE310-based boards: transition to pinctrl driver
This commit makes the transition from the pinmux driver to the pinctrl
driver. It also modifies UART, SPI and I2C drivers used in FE310-based
boards to use the new pinctrl API.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2022-03-24 10:46:34 +01:00
Daniel DeGrasse 6545a3d0fa drivers: spi: enable pinctrl for spi_mcux_lpspi
Enable pinctrl for lpspi driver

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-22 12:36:04 +01:00
Daniel DeGrasse f400aa41cd boards: remove spi pinmux setting for kinetis boards
Remove spi pinmux setting for kinetis boards with dspi, as dspi driver
supports pinctrl

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-22 12:36:04 +01:00
Daniel DeGrasse f90c356025 drivers: spi: enable pinctrl for kinetis dspi driver
Enable pinctrl unconditionally for kinetis dspi driver

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-22 12:36:04 +01:00
Andrzej Głąbek a5234f3647 soc_nrf_common: Extend and rename the NRF_DT_ENSURE_PINS_ASSIGNED macro
Extend the macro with checks for DT properties related to pin
assignments that are defined but would be ignored, depending on
whether PINCTRL is enabled or not, what presumably indicates
a resulting configuration different from what the user expects.

Add also a possibility to indicate that the pinctrl-1 property
should not be checked because the caller does not support the
sleep state.

Rename the macro so that its name better reflects its function.
Update accordingly all drivers that use it.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-18 16:26:21 +01:00
Gerard Marull-Paretas b618bdbaad drivers: spi: cc13xx_cc26xx: remove CONFIG_PM guards
API provides no-op fallback when CONFIG_PM=n

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-16 15:26:47 +01:00
Gerard Marull-Paretas 5a71eeb35c pm: policy: move constraints to policy API
The pm_constraint_* APIs were effectively used by the policy manager
only. This patch renames the API to the policy namespace and makes its
naming more explicit:

- pm_constraint_set -> pm_policy_state_lock_get()
- pm_constraint_release -> pm_policy_state_lock_put()
- pm_constraint_get -> pm_policy_state_lock_is_active()

The reason for these changes is that constraints can be of many types:
allow/disallow states, impose latency requirements, etc. The new naming
also makes explicit that the API calls will influence the PM policy
behavior.

All drivers and documentation have been updated accordingly.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-16 15:26:47 +01:00
Tomasz Bursztyka 16062c2e5a drivers: constify all device instances
Run cocci script to constify device instances.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2022-03-16 12:33:12 +01:00
Nazar Kazakov 9713f0d47c everywhere: fix typos
Fix a lot of typos

Signed-off-by: Nazar Kazakov <nazar.kazakov.work@gmail.com>
2022-03-14 20:22:24 -04:00
Francois Ramu 61bef2087f drivers: spi: stm32 spi with dma must enable cs after periph
When using DMA to transfer over the spi, the spi_stm32_cs_control
is done after enabling the SPI. The same sequence applies
in the transceive_dma function as in transceive function

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-03-11 10:59:05 +01:00
Gerard Marull-Paretas 95fb0ded6b kconfig: remove Enable from boolean prompts
According to Kconfig guidelines, boolean prompts must not start with
"Enable...". The following command has been used to automate the changes
in this patch:

sed -i "s/bool \"[Ee]nables\? \(\w\)/bool \"\U\1/g" **/Kconfig*

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-09 15:35:54 +01:00
Andrzej Głąbek 32b9e65e4b drivers: spi: nrfx: Add support for pinctrl
Add support for the new pinctrl API to the SPI drivers that handle
the nRF SPI, SPIM, and SPIS peripherals. Update code of the drivers
and related devicetree bindings.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-09 12:05:22 +01:00
Andrzej Głąbek 2a87e04ce6 drivers: spi: nrfx: Clean up code
- clean up registration of the drivers with the logging subsystem
- use consistent naming of local variables accessing configuration
  and runtime data of driver instances, for easier code maintenance

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-09 12:05:22 +01:00
Jay Vasanth 535c20e490 qmspi: MEC172x: fix unused variable warning
Fix unused variable warning when CONFIG_SPI_ASYNC
is not defined

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-03-07 11:03:06 +01:00
Jay Vasanth 99c89ebb78 qmspi: update MEC172x qmspi module for pinctrl
Changes to qmspi module to support pinctrl

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-03-07 11:03:06 +01:00
Yuriy Vynnychek f47d8568f2 drivers: spi: telink_b91: replace Pinmux by Pinctrl
Updated driver to use new Pinctrl driver.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-02-21 19:41:44 -05:00
Andrzej Głąbek 9b9de62046 drivers: spi_nrfx_spi: Fix compilation error
Fix a copy/paste mistake introduced by commit
fdc25cd44c.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-02-08 07:29:33 -05:00
Jordan Yates fdc25cd44c spi: nrfx_spi*: only run uninit if configured
Only run the `uninit` function if the SPI instance has previously been
configured. This stops an assertion in the HAL drivers from triggering
due to running `uninit` without a previous `init`.

Fixes #42299.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2022-01-31 12:14:05 +01:00
Wealian Liao 6d6c5e1155 drivers: npcx: Drop DRV_CONFIG/DRV_DATA usage
Stop using DRV_CONFIG/DRV_DATA macros and use dev->data and dev->config
instead.

Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
2022-01-28 10:06:05 +01:00
Wealian Liao 3565f71a72 drivers: npcx: Correct the macro parentheses
This corrects the following:
1. The priority of type cast is lower than member access. So don't need
the redundant parentheses.
2. The macro should be added to the parentheses.

Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
2022-01-28 10:06:05 +01:00
Christian Taedcke 3b271006cb drivers: spi_gecko: fix duplicated variable declaration
The commit 44679c7bd8 introduced this
duplicated declaration of the local variable data.

This commit fixes this issue.

Fixes #42117

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2022-01-27 05:23:18 -05:00
Gerard Marull-Paretas 435213a753 drivers: remove redundant data/config casts
Some drivers explicitely casted data/config from void * to the
corresponding type. However, this is unnecessary and, in many drivers it
has been misused to drop const qualifier (refer to previous commits).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-19 18:16:02 +01:00
Gerard Marull-Paretas 468de7eb29 drivers: spi: drop get_dev_data/get_dev_config usage
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-19 18:16:02 +01:00
Gerard Marull-Paretas 44679c7bd8 drivers: spi: drop DEV_DATA/DEV_CFG usage
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data
and dev->config instead.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-19 18:16:02 +01:00
Gerard Marull-Paretas ddc168fa78 pm: s/PM_DEVICE_(DT_(INST))_REF/PM_DEVICE_(DT_(INST))_GET
In order to align with macros used to obtain a device reference (e.g.
DEVICE_DT_GET), align the PM macros to use "GET" instead of "REF". This
change should have low impact since no official release has gone out yet
with the "REF" macros.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-18 12:14:06 -05:00
Gerson Fernando Budke 58936e7639 soc: arm: atmel_sam: samv71: Fix SPI build dependency
The SAM spi driver depends on GPIO driver to work. It seems that this
dependency chain it is not handled. This select GPIO driver when SPI
driver is enabled. It rework GPIO and SPI Kconfig to select driver by
devicetree and drop entries at Kconfig.defconfig.series file.

Fixes #41525

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2022-01-18 12:12:52 -05:00
Francois Ramu d65a74e2dd drivers: spi: stm32 spi drivers supports the frame format
the stm32 spi drivers now takes the DTS frame_format property
from the include/ drivers/spi.h
It will be possible to select the Motorola (default)
or TI from the DTS entry of the device,
when soc supports it, else a run time error is raised.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-01-17 11:46:14 -05:00
Alexander Mihajlovic 673806aef1 drivers: spi: stm32: Skip pinctrl setup for subghzspi
Subghzspi instances cannot have any pinctrl configs,
they are blacklisted by the dts binding. This caused an
initialization failure of the spi_ll_stm32 driver for
subghzspi instance because no "default" pinctrl was found.

This commit solves the problem by skipping the pinctrl setup
for subghzpi devices. The use_subghzpi_nss property is used
to identify a subghzspi device, as this is a required boolean
property only available in the subghzspi binding this is a
perfect indicator for such instances.

Signed-off-by: Alexander Mihajlovic <a@abxy.se>
2022-01-11 11:52:59 +01:00
Francois Ramu 1da200bf16 drivers: spi: stm32h7 spi drivers with DMA transfer
This patch controls the SPI of the stm32H7 mcu when using
the DMA transfer. Starting and ending the transfer
are specific according to the RefMan.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-01-07 15:06:28 -06:00
Francois Ramu ca3c2cf1f9 drivers: spi: stm32 spi instance of stm32H7 mcu
A generic function is used to give the register address to the DMA.
The SPI of the stm32H7 serie has two data registers for Tx and Rx
When the DMA is getting the address it differs between Rx and Tx.
As the stm32cube/stm32h7xx/drivers/include/stm32h7xx_ll_spi.h
has no such LL functions, the register address is get direclty.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-01-07 15:06:28 -06:00
Francois Ramu 0ce796398a drivers: spi: stm32 ll driver disable the instance after completion
The spi_stm32_complete() is checking spi flags which are valid when the
intance is still enable: disable afterwards. No more need to disable
the DMA transfer then

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-01-07 15:06:28 -06:00
Francois Ramu 081e2d5a54 drivers: spi: stm32 driver with dma checking spi busy status flag
Defines a function to control the spi busy state during DMA transfer.
After the DMA Tx, the spi might still have some data to Transmit.
The driver must wait for the SPI Tx before sending the next packet.
This is not required for the Rx part as the DMA Rx is already done.
Some mcus like stm32H7 have a TX complete bit, other must wait for the
TXE and BSY line.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-01-07 15:06:28 -06:00
Gerard Marull-Paretas 5dc6ed3ce3 pinctrl: require ; after PINCTRL_DT_(INST_)DEFINE macros
The PINCTRL_DT_(INST_)DEFINE macros already defined the trailing ;,
making its usage inconsistent with other macros such as
DEVICE_DT_DEFINE.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-01 07:39:08 -05:00
Francois Ramu 188c8c47a8 drivers: spi: stm32 spi driver using ll_func as defined in the header
Instead of checking the SPI register flags, the spi_ll_stm32.h
has dedicated functions for that purpose.
They are abstracting the STM32 registers of SPI instance.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-12-20 17:42:17 +01:00
Jay Vasanth fd43c725d2 drivers: spi: Add MEC172x QMSPI-LDMA driver
Add driver for MEC172x QMSPI with local DMA(LDMA). The driver
support SPI asynchronous operation.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2021-12-08 08:43:05 -05:00
Keith Short f7005599ff spi: npcx_fiu: Update the SPI context
Update the SPI context during all transceive functions. This fixes a
deadlock where SPI transactions failed to give back the semaphore.

Verified on NPCX9 based Chromebook.

Signed-off-by: Keith Short <keithshort@google.com>
2021-12-07 09:44:34 -06:00
Marc Reilly 54b6d26242 drivers: spi: add spi-bitbang driver
This adds an spi master mode driver via bitbanged gpio. Only syncronous
transfers are implemented. Clock signal timing is accomplished via busy
waits, the gpios are manipulated via the standard gpio interface; these
two factors limit the frequency at which it can operate - but here
a simple and generic implementation was chosen over performance.

The driver supports the various clock polarity and phase
configurations, and can also work with word sizes which are non
multiples of 8bits, currently up to 16 bits.

A sample program is also added demonstrating basic use of the driver
with 9bit data words.

Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
2021-12-06 07:29:45 -05:00
Bryce Wilkins 219bf88fe8 drivers: spi: Add optional delays to mcux flexcomm spi driver
Adds optional device tree properties to insert delays between spi chip
select assert/deassert and the clock edges, and also between spi
frames and transfers to the mcux flexcomm spi driver. If the properties
are not set, no additional delay is inserted.

Verified expected behavior on mimxrt685_evk and check with a scope
that the pre- and post-delay could be changed from the device tree
properties.

Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
2021-12-03 16:42:10 -06:00
Daniel DeGrasse 7b74dbb405 drivers: spi_mcux_lpspi: Added DMA support to NXP LPSPI driver
Adds DMA support to NXP's LPSPI driver. This can be enabled by selecting
the KConfig symbol CONFIG_SPI_MCUX_LPSPI_DMA, and requires the LPSPI
instances enabled in the devicetree to have valid DMA instances
assigned.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2021-11-30 10:57:17 -06:00
Lukasz Majewski aa464a9d67 spi: Fix the Pcs setup for NXP's K6xF processors
Without this change, when DTS SPI device node has node ID = <0>, the
value of 0 is assigned during SPI configuration and written to
whichPcs member in master_config structure.
This value wrongly overrides the default value read from NXP's DSPI
HAL (kDSPI_Pcs0 = 1U << 0).

Such situation occurs on ip_k66f board, where the DSA device -
controlled via SPI has the node ID equal to 0 (i.e. reg = <0>).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2021-11-30 09:55:46 -06:00
Gerard Marull-Paretas 89a4f36fc8 device: remove inclusion of pm/device.h
The device PM subsystem _depends_ on device, not vice-versa. Devices
only hold a reference to struct pm_device now, and initialize this
reference with the value provided in Z_DEVICE_DEFINE. This requirement
can be solved with a forward struct declaration, meaning there is no
need to include device PM headers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-29 11:08:38 +01:00
Johann Fischer 5aedcabf51 drivers: spi_context: fix null pointer dereferencing
commit 54907c7014
("drivers: spi: spi_context: improve support of multiple cs gpios")
added function to initialize all CS GPIOs defined in devicetree.
This function, spi_context_cs_configure_all, is intended to be
called during SPI driver initialization (POST_KERNEL init level).
It is also obvious that a SPI driver was not used at that time,
and no bus configuration (struct spi_config) is assigned to
SPI bus (spi_context.config).

The spi_context_cs_configure_all function has a homeopathic
ASSERT to validate CS levels, which causes a null pointer
dereferencing by ctx->config->operation if asserts are
enabled.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-11-26 11:47:27 +01:00
Erwan Gouriou 8bd410a589 drivers/spi: stm32: use new pinctrl API
Use the new pinctrl API to configure pins.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Sylvio Alves 779ef06a5b drivers: spi: esp32: fix CS gpio initialization
SPI_CONTEXT_CS_GPIOS_INITIALIZE call was not considering
proper SPI driver instance ID.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-11-20 11:56:55 -05:00
Sylvio Alves 71d3609e16 drivers: spi: esp32: fix frequency config
Current implementation is using hardcoded frequency
and not the one provided by the spi api.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-11-20 11:56:55 -05:00
Tomasz Bursztyka 01b9813d73 drivers/spi: Return an error on SPI_HALF_DUPLEX for relevant drivers
This feature will need to be, however, implemented driver by driver
afterwards.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-11-19 11:50:38 +01:00
Tomasz Bursztyka f6be2835bd drivers: Apply SPI API change to relevant places
Mostly drivers, but also one sample and one test.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-11-19 11:50:38 +01:00
Tomasz Bursztyka f8cc93de8c spi: Add a configuration option for half/full duplex mode
This is meant to expose half/full duplex configuration option on regular
configuration. So far, dual/quad/octal are not exactly supported, as it
would require extensions to the SPI buffer for a full support.

So moving these modes to an extended operation attribute
(32 vs 16 bits), disabled by default.

And exposing half/full duplex configuration bit. Full duplex being the
default option.

Fixes #19134

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-11-19 11:50:38 +01:00
Gerard Marull-Paretas 88a69674c0 drivers: use new PM macros
Port some drivers to the recently introduced macros to showcase its
usage and be able to do some initial testing (nRF52840).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-19 10:11:32 +01:00
Gerard Marull-Paretas c759a35d08 drivers: use DT_INST_ENUM_IDX(_OR) macros
Replace `DT_ENUM_IDX(_OR)(DT_DRV_INST(...),` pattern with
`DT_INST_ENUM_IDX(_OR)(...,`.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-18 19:12:07 -05:00
Nick Ward fa94be591d drivers: spi_nrfx_spim: workaround for nRF52832 errata anomaly 58
See:
https://infocenter.nordicsemi.com/index.jsp?topic=%2Fstruct_nrf52%2Fstruct%2Fnrf52832_errata.html
https://infocenter.nordicsemi.com/pdf/nRF52832_Rev_3_Errata_v1.0.pdf

Code derived from the example PAN 58 workaround code.

Adds a new nRF SPIM Devicetree binding property called
anomaly-58-workaround that allows the workaround to be enabled
if required per SPIM instance.

Signed-off-by: Nick Ward <nick.ward@setec.com.au>
2021-11-09 20:04:45 -05:00
Andrzej Głąbek 760adff120 drivers: spi_context: Correct alignment of LOG_DBG() parameters
so that the call looks nicer.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-11-09 12:46:08 +01:00
Andrzej Głąbek 688d81813e drivers: spi_context: Fix handling of zero-length buffers
In some cases, it is quite useful to have the possibility to also
include zero-length buffers in a buffer set used in transfers
(for example, when frames in a protocol consist of several parts,
of which some are optional). So far, the behavior of spi_context
update functions was that the transfer in a given direction was
finished when a zero-length buffer was encountered in the buffer
set. Change those functions to simply skip such buffers. Correct
in the same way also the spi_context_buffers_setup() function.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-11-09 12:46:08 +01:00
Andrzej Głąbek 3489ca9da2 drivers: spi_context: Do not use transfer timeout in slave mode
Do not use any timeout in the slave mode, as in this case it is not
known when the transfer will actually start and what the frequency
will be.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-11-09 12:46:08 +01:00
Andrzej Głąbek f7466d28fd drivers: spi_nrfx_spim/spi: Fix initialization of CS GPIOs
This is a follow-up to commits 99daca9bba
and ae03c0a6bf.

nRF SPI driver shims cannot use devicetree instance indexes, they need
to use the DT_NODELABEL macro and SoC peripheral instance indexes.
Correct the macros used in initialization of CS GPIOs in those shims.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-11-09 11:11:19 +01:00
Bartosz Bilas 41325bd1fb drivers: spi: remove spi_context_cs_configure function
Since cs gpios are initialized during driver initialization
remove spi_context_cs_configure that is not longer need.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 7ba48aa7a9 drivers: spi_xlnx_axi_quadspi: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 258f2d85f7 drivers: spi_xec_qmspi: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 997723b760 drivers: spi_sifive: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 81a3900b35 drivers: spi_sam0: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 61646649a1 drivers: spi_sam: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 05f326c96e drivers: spi_rv32m1_lpspi: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 97d3de2349 drivers: spi_psoc6: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 225f0b3825 drivers: spi_oc_simple: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 99daca9bba drivers: spi_nrfx_spim: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas ae03c0a6bf drivers: spi_nrfx_spi: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 054fb71bf0 drivers: spi_mcux_lpspi: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas ab2d23c5f4 drivers: spi_mcux_flexcomm: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 0ccdd5f263 drivers: spi_mcux_dspi: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas bcd0364ab8 drivers: spi_gecko: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas f40be1f17f drivers: spi_esp32_spim: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 70a65b229b drivers: spi_dw: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 37925430b1 drivers: spi_cc13xx_cc26xx: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas b370fb8fad drivers: spi_b91: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 388a33c188 drivers: spi_ll_stm32: initialize all cs gpios during init
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas 54907c7014 drivers: spi: spi_context: improve support of multiple cs gpios
Add extra cs_gpios and num_cs_gpios members into
spi_context structure that will be used to
initialize all defined cs gpios during the driver
initialization using SPI_CONTEXT_CS_GPIOS_INITIALIZE macro.
While at it add a new spi_context_cs_configure_all
function that allows the user to configure
all available cs gpios in inactive mode.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Bartosz Bilas ea25b92cd9 drivers: spi: use dedicated init priority
A couple of SPI drivers use CONFIG_KERNEL_INIT_PRIORITY_DEVICE
as init priority for driver initialization. Let's change
it to the dedicated CONFIG_SPI_INIT_PRIORITY to make it
compatible with other ones.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-04 16:23:05 +01:00
Gerard Marull-Paretas 4baf1e01ff drivers: use common PM action callback naming
The PM callback is no longer referenced as "pm_control" but
"pm_action_cb", so reflect this new naming on the callbacks.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-03 20:27:18 -04:00
Gerard Marull-Paretas dd9d0560d1 drivers: spi: esp32_spim: use NULL for PM callback
A non-existing definition was being used (probably a misspelled
deprecated macro).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-03 20:27:18 -04:00
Andrzej Głąbek eafafa2816 drivers: spi_nrfx_spis: Fix handling of buffer lengths
Do not limit the length of the prepared transfer to the shorter of
provided TX and RX buffers if both are used. The SPIS peripheral
cannot handle scattered buffers anyway, so there is no point in
getting the common part of TX and RX buffers for a partial transfer,
like it is done for SPI and SPIM peripherals; everything what is
possible needs to be transferred in one shot. For the same reason,
there is no point in calling spi_context_buffers_setup() and using
the related part of the spi_context structure, hence the call is
removed and buffer pointers are used directly.
Also return an error if a requested transfer length exceeds the SPIS
peripheral hardware limit, instead of silently limiting the transfer
like it was done so far.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-11-03 17:34:35 +01:00
Jun Lin 5d72417df4 drivers: spi: npcx: add SPI support to access the SPI flash
The FIU/UMA module in the NPCX chip provides an dedicated SPI interface
to access the SPI flash. This commit adds the driver support for it.
With this commit, the application can call the flash APIs
(via spi_nor.c) to access the internal flash of NPCX EC chips.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I32bbf09f6e014b728ff8e4692e48151ae759e188
2021-11-01 21:48:20 -04:00
Felipe Neves 0a0fed7879 drivers: spi: esp32: add esp32c3 support
to the esp32 spi unified driver

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-11-01 21:47:26 -04:00
Torsten Rasmussen bd61122aa2 kconfig: drivers: experimental settings now uses select EXPERIMENTAL
With the introduction of `EXPERIMENTAL` and `WARN_EXPERIMENTAL` in
Zephyr all drivers settings having `[EXPERIMENTAL]` in their
prompt has has been updated to include `select EXPERIMENTAL` so that
developers can enable warnings when experimental features are enabled.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-10-25 10:46:48 +02:00
Glauber Maroto Ferreira 7468121f19 esp32s2: drivers: spi: add driver support
and hooks to spi_loopback test.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-10-10 14:52:41 -04:00
Glauber Maroto Ferreira 26131ba5d4 esp32: drivers: spi: driver refactoring
in preparation to support other esp32-family socs

on top of existing driver.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-10-10 14:52:41 -04:00
Glauber Maroto Ferreira fb1632925e soc: esp32: partial code standardization
Replaces the prefixes of gpio_matrix_in and gpio_matrix_out
to unify those function calls on all supported socs.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-10-10 14:52:41 -04:00
Jordan Yates 29773391c7 spi: convert CS usage to gpio_dt_spec
Convert all CS control logic to be based on the `gpio_dt_spec` member
instead of the standalone `port`, `pin` and `flags` members.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Co-authored-by: Jordan Yates <jordan.yates@data61.csiro.au>
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Co-authored-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-10-05 19:24:18 -04:00
Francois Ramu 33e0f1a87a drivers/spi: stm32u5 spi support
Add the specific driver functions for the SPI
of the stm32u5 device.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-10-05 19:23:37 -04:00
Christopher Friedt c4ecd78ce1 Revert "drivers: spi: stm32 can support TI mode for the SPI frame format"
This reverts commit d563313ab1.

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2021-09-30 16:04:37 -04:00
Francois Ramu d563313ab1 drivers: spi: stm32 can support TI mode for the SPI frame format
Depending of the soc and SPI peripheral, the Frame-Format of the
SPI can be configured to support TI or Motorola protocol.
This is configured through a new DTS property.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-09-29 14:47:31 -04:00
Andrzej Głąbek 36451e6b54 drivers: spi_nrfx_spi: Change the way the nrfx driver is configured
Apply the same changes as the previous commit made in the spi_nrfx_spim
shim, to keep these two shims aligned.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-09-23 08:39:37 -04:00
Andrzej Głąbek 2a199afac3 drivers: spi_nrfx_spim: Change the way the nrfx driver is configured
According to the nRF5340 PS, for 32 Mbps high-speed SPI using SPIM4,
drive configuration H0H1 must be used. The underlying nrfx_spim driver
does it properly in its initialization function, so change the shim to
(re)initialize the driver when the SPI configuration is to be changed
(only then the speed to use is known), to avoid the need of duplicating
the corresponding code in the shim itself.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-09-23 08:39:37 -04:00
Andrzej Głąbek 5f1581bb05 drivers: spi_nrfx_spim: Fix limiting of SPIM frequency on nRF5340
According to the nRF5340 PS, SPIM4 only supports 32 Mbps when
the application core is running at 128 MHz. This patch adds
the corresponding check.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-09-23 08:39:37 -04:00
Julien D'ascenzio ca7899afa9 drivers: spi: stm32: Fix forever lock when configure failed
On transceive, if the SPI configure failed, the SPI wasn't release.

Signed-off-by: Julien D'ascenzio <julien.dascenzio@paratronic.fr>
2021-09-20 10:17:56 -04:00
Hake Huang ef410ee732 drivers: spi: Update mcux driver to support edma
enable spi driver to support dspi edma

add support for shared dma mux spi port

for shared spi port we need judge the irq source

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-09-02 15:50:52 -05:00
Hake Huang cc1801440f spi: mcux: update driver init priority
use the CONFIG_SPI_INIT_PRIORITY to init device driver

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-09-02 15:50:52 -05:00
Alexandre Bourdiol 4b7e9368bc drivers: spi: spi_ll_stm32: not all stm32l1 MCU have SPI_CR2_FRF
After update of stm32 cube l1 V1.10.3,
SPI_CR2_FRF doesn't exist for all stm32L1 MCU,
thus LL_SPI_SetStandard() is also not defined for all stm32l1 MCU.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-08-24 22:14:20 -04:00
Yuriy Vynnychek 87018c50cc drivers: spi: introduce new Telink B91 SPI driver
SPI driver basic support for Telink B91 SoC.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-08-19 17:18:23 -04:00
Sylvio Alves 907b5d9e7f drivers: spi: set max chunk len for esp32
Max SPI chunk len was missing from the
implementation, causing SPI to hang up in some
conditions.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-08-12 16:22:34 -05:00
Gerard Marull-Paretas 7ccc1a41bc pm: use actions for device PM control
Instead of passing target states, use actions for device PM control.
Actions represent better the meaning of the callback argument.
Furthermore, they are more future proof as they can be suitable for
other PM actions that have no direct mapping to a state. If we compare
with Linux, we could have a multi-stage suspend/resume. Such scenario
would not have a good mapping when using target states.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-08-04 08:23:01 -04:00
Gerard Marull-Paretas 6d273f49bd pm: fix incorrect usages of PM_DEVICE_STATE_OFF
According to the documentation the OFF state has to be used when the
devices is fully turned off, ie, power removed. Most drivers were using
a sort of fall-through for all non-active states, leading to behaviors
not following the specifications.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-08-04 08:23:01 -04:00
Gerard Marull-Paretas 495672ab62 pm: cleanup pm control callback implementations
- Return -ENOTSUP if the requested state is not supported
- Remove redundant "noop style" functions.
- Use switch everywhere to handle requested state (not necessary in all
  drivers, but better take off with consistency in place after current
  changes).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-08-04 08:23:01 -04:00
Gerard Marull-Paretas d41dadc569 pm: rename PM_DEVICE_STATE_SUSPEND to PM_DEVICE_STATE_SUSPENDED
The verb tense for the suspended state was not consistent with other
states. The likely reason: state was being used as a command/action.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-08-04 08:23:01 -04:00
Gerard Marull-Paretas 56a35e5682 pm: converge to suspend state for low power modes
The difference between low power and suspend states is a thin blur line
that is is not clear and most drivers have used indistinctly. This patch
converges to the usage of the suspend state for low power, since
contrary to the low power state, it is used by both system and runtime
device PM. The low power state is still kept, but its future is unclear
and needs some discussion.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-08-04 08:23:01 -04:00
Gerard Marull-Paretas 920f30cc0e pm: simplify state change check logic
The device PM control function will only be called if the requested
state is different from the current one. A significant amount of drivers
were checking for state changes, now unnecessary. This patch removes all
this redundant logic.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-08-04 08:23:01 -04:00
Gerard Marull-Paretas 11eef4d8c8 pm: device: remove pointer usage for state
Since the state is no longer modified by the device PM callback, just
use the state value.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-08-04 08:23:01 -04:00
Gerard Marull-Paretas 9e7d545bb4 pm: device: remove ctrl_command callback argument
The ctrl_command is not used anymore, so remove it from the callback
signature.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-08-04 08:23:01 -04:00
Gerard Marull-Paretas da0ff4ae46 pm: device: remove usage of ctrl_command
The callback is now invoked to set the device PM state in all cases, so
the usage of ctrl_command is redundant.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-08-04 08:23:01 -04:00
Gerard Marull-Paretas c2cf1ad203 pm: device: remove usage of local states
The device PM subsystem already holds the device state, so there is no
need to keep duplicates inside the device. The pm_device_state_get has
been refactored to just return the device state. Note that this is still
not safe, but the same applied to the previous implementation. This
problem will be addressed later.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-08-04 08:23:01 -04:00
Gerard Marull-Paretas 6c3beb928e pm: adjust busy check API call return types and naming
Busy check APIs now return boolean type. Due to that change, the
function names have also been adjusted. The common name pattern for
boolean check type APIs is "PREFIX_is_CONDITION". For example,
"pm_device_is_busy".  pm_device_busy_check has been renamed to
pm_device_is_busy and pm_device_any_busy_check to pm_device_is_any_busy.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-07-30 09:28:42 -04:00
Gerard Marull-Paretas 70322853a8 pm: device: move device busy APIs to pm subsystem
The following device busy APIs:

- device_busy_set()
- device_busy_clear()
- device_busy_check()
- device_any_busy_check()

were used for device PM, so they have been moved to the pm subsystem.
This means they are now prefixed with `pm_` and are defined in
`pm/device.h`.

If device PM is not enabled dummy functions are now provided that do
nothing or return `-ENOSYS`, meaning that the functionality is not
available.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-07-30 09:28:42 -04:00
Francois Ramu 8fe0831c6b include: dt-bindings: remove dma header for stm32 soc
All the macro for dma-cells are now in the
include/drivers/dma/dma_stm32.h header file.
So the include/dt-bindings/dma/stm32_dma.h is no more
useful and removed from #include.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-07-22 04:52:53 -04:00
Francois Ramu 30fd0228ae drivers: dma of the stm32 refactored macro for the dma-cells
The macro to set the element of the dma-cells for each peripheral
are defined in the dma_stm32 header file
and used in the periph driver (as dma client)

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-07-22 04:52:53 -04:00
Glauber Maroto Ferreira 35c8cb7b37 esp32: drivers: interrupt_controller: review SPI interrupt usage
Review SPI interrupt allocation usage.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-16 07:19:28 -04:00
Fabio Baltieri 624886156a drivers: spi_ll_stm32: add SUBGHZSPI support
This adds support for controlling the SUBGHZSPI NSS line in STM32WL
devices. This is a special dedicated SPI port only connected to the
radio device internally, chip select happens through a bit in the PWR
module. Adding a special dt-property to identify the port, it all gets
built out on non-WL devices.

Deduplicate the existing dts bindings in the process, and add the new
one for the special spi with the new property.

Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
2021-07-15 21:30:28 -04:00
Manivannan Sadhasivam fa2d1ea422 drivers: spi: Use timeout for transfer completion
Instead of waiting forever for the SPI transfer to complete, let's use
a timeout value and bail out if elapsed. The timeout value logic is,

xfer_len/frequency + tolerance

Tolerance value can be modified using a Kconfig symbol,
CONFIG_SPI_COMPLETION_TIMEOUT_TOLERANCE. It defaults to 200ms.

Fixes: #33192

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-07-15 06:43:23 -04:00
Gerard Marull-Paretas 26ad8376bd pm: remove callback from control function
The callback is not used anymore, so just delete it from the pm_control
callback signature.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-07-13 09:36:45 -04:00
Gerard Marull-Paretas 217e610d8f pm: remove redundant callback usage
the device PM callback is not used anymore by the device PM subsystem,
so remove it from all drivers/tests using it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-07-13 09:36:45 -04:00
Sylvio Alves 4303cfdb3c hal: esp32: driver changes to allow HAL update
hal_espressif repository was updated from esp-idf v4.2
to esp-idf v4.3 to allow latest Espressif chips integration.
As a consequence, it added a few changes in drivers
and peripherals. To maintain bisectability, changes in this
PR cannot be split. Here are some details:

wifi: update linker script by adding libphy and new attributes.

spi: update some APIs and fixed missing wait_idle check

west.yml: esp32: update hal to new version

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-07-07 15:01:16 -04:00
Gerard Marull-Paretas cc2f0e9c08 pm: use enum for device PM states
Move all PM_DEVICE_STATE_* definitions to an enum. The
PM_DEVICE_STATE_SET and PM_DEVICE_STATE_GET definitions have been kept
out of the enum since they do not represent any state. However, their
name has not been changed since they will be removed soon.

All drivers and tests have been adjusted accordingly.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-07-07 14:13:12 -04:00
Piotr Mienkowski aaf64e0bdf soc: atmel_sam: Add _INST to ATMEL_SAM_DT_PIN* macros
The macros are used to get the pin(s) of a given driver instance. Add
_INST prefix to match convention used by the devicetree.h. The original
macros can now be used to obtain pin(s) of an arbitrary device instance
identified by the nodelabel.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2021-06-14 09:50:41 -05:00
Erwan Gouriou fcc3177509 drivers/pinmux: stm32: Move stm32 driver from stm32/
Since we removed various series headers, move stm32 driver
under main driver/pinmux folder.
Take this change into account into various drivers.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-06-11 08:04:39 -05:00
Stancu Florin 8ebb641ef7 drivers: cc13xx_cc26xx: fix pm.h not included
Fixes #35916.

Signed-off-by: Stancu Florin <niflostancu@gmail.com>
2021-06-04 10:24:10 -05:00
Affrin Pinhero c1daae647e driver/spi: STM32 Revert while loop on tx only
This commit reverted while loop on tx only.
This commit solves SPI loopback failure and SPI wrong behaviour on RX.
fix:
* zephyrproject-rtos/zephyr#35297
* zephyrproject-rtos/zephyr#35539

Revert "drivers/spi: STM32: This solves SPI infinite loop on Tranceive"

This reverts commit 50c2acbc03e7a48a09880b6fcb8c22256bffa70c.

Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
2021-05-26 10:38:21 -05:00
Affrin Pinhero 0129884062 drivers/spi: STM32: This solves SPI infinite loop on Tranceive
This commit loops on rx not empty only if rx_buf is enabled.
And if rx_buf is not enabled, it loops on tx empty status.

Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
2021-05-11 13:01:57 -05:00
Flavio Ceolin 0c607adb63 pm: device: Align state names with system states
Change device pm states to the same pattern used by system power
management.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-05-07 18:35:12 -04:00
Flavio Ceolin 7eba310220 power: device: void *context -> uint32_t *state
The context parameter used across device power management is
actually the power state. Just use it and avoid a lot of
unnecessary casts.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-05-07 16:55:31 -04:00
Katsuhiro Suzuki f8e9b505c9 drivers: spi: sifive: fix bug of transferring multiple bufs
This patch fixes a bug of SPI driver for SiFive FE310.
Current implementation sends/receives only first buffer even if
an user passed two or more struct spi_buf to driver.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-05-06 07:41:16 -05:00
Gerard Marull-Paretas 56f1a8ce98 pm: rename PM_DEVICE_GET/SET_POWER_STATE to PM_DEVICE_STATE_GET/SET
Adjust name to be consistent with device PM naming conventions.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-05-05 18:35:49 -04:00
Gerard Marull-Paretas dbf46b3815 pm: rename device_pm_cb to pm_device_cb
Prefix all device PM functions/data structures with pm.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-05-05 18:35:49 -04:00
Gerard Marull-Paretas 2c7b763e47 pm: replace DEVICE_PM_* states with PM_DEVICE_*
Prefix device PM states with PM.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-05-05 18:35:49 -04:00
Gerard Marull-Paretas 3863be02a5 drivers: replace power/power.h with pm/device.h
Drivers need access to the device PM API, so just include pm/device.h.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-05-05 18:35:49 -04:00
Gerson Fernando Budke d999531f7f drivers: spi: Add cypress PSoC-6 scb spi driver
Add Cypress PSoC-6 SCB[spi] driver.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-05-05 16:01:28 +02:00
Jordan Yates ed20c06908 spi: spi_nrfx_spim: limit clock frequency by inst
Limit the maximum SPI frequency to that supported by the instance
hardware. This stops peripherals supporting >8MHz on slow instances
from wrapping around on the clock frequency for undefined behaviour.

Fixes #34402

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2021-04-28 19:49:57 +02:00
Gerard Marull-Paretas 90118b265f drivers: spi: remove usage of device_pm_control_nop
device_pm_control_nop is now deprecated in favour of NULL.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-04-28 12:25:39 -04:00
Kumar Gala e1032ad2c3 include: Move emul.h to drivers/emul.h
Move emul.h out of the top level include/ dir into
include/drivers/emul.h and deprecated the old location.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-04-22 12:51:01 -04:00
Flavio Ceolin 9fd4ea91b7 coccinelle: Remove extra semicolon
coccicheck --mode=patch --cocci=semicolon.cocci

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-03-25 11:35:30 -05:00
Kumar Gala b9ed2d33fd drivers: spi: Remove unused Kconfig symbols
Remove SPI_[0-8] and SPI_[0-8]_OP_MODES Kconfig symbols as no driver
uses them anymore.  We also cleanup board and sample code to remove
use of these symbols.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-09 04:53:46 -05:00
Kumar Gala 0f0308c197 drivers: spi: sam0: Convert dma to use DEVICE_DT_GET
Replace device_get_binding with DEVICE_DT_GET for getting access
to the dma controller device.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-08 18:22:27 -06:00
Erwan Gouriou d8348b0e5e drivers/spi: stm32: Minor init code refactoring
Minor changes to init code indentation.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-03 07:24:56 -05:00
Erwan Gouriou 375db6e080 drivers/spi: stm32 convert dma to new DT_DMA helper macros
New DT_DMA helper macors are available to access DMA node
identifier. Use them

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-03 07:24:56 -05:00
Kumar Gala 767ba47423 drivers: spi: spi_dw: Move to devicetree detection
We can utilize the devicetree macros to determine which instances to
enable.  This will allow us to phase out the per instance Kconfig
symbols.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-02 20:06:38 -06:00
Kumar Gala c0d82cf434 drivers: spi: spi_dw: set op-mode to master-only always
Nothing sets the op mode to anything but master.  For now default the
mode to master-only and we can determine a devicetree property in the
future if we need to support other configurations.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-02 20:06:38 -06:00
Kumar Gala 1957fe2417 drivers: spi: spi_dw: determine num IRQs from devicetree
Replace Kconfig symbols SPI_DW_PORT_n_INTERRUPT_SINGLE_LINE with just
seeing how many IRQs are defined in the devicetree to determine single
or multiline interrupt support.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-02 20:06:38 -06:00
Kumar Gala b08c5d2bb8 drivers: spi: spi_dw: Remove clock gate support
The SoC that utilized the clock support isn't supported in Zephyr
anymore and there are no users of this code.  Remove it for now as it
should get converted to utilize devicetree if needed in the future.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-02 20:06:38 -06:00
Kumar Gala 3b8ea186fd spi: mcux flexcomm: Convert dma to use DEVICE_DT_GET
Replace device_get_binding with DEVICE_DT_GET for getting access
to the dma controller device.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-28 18:19:18 -06:00
Martí Bolívar 63471ba93b drivers: spi: add dummy driver for vnd,spi
We will need this to be able to DEVICE_DT_GET() bus devices from
tests/drivers/build_all in an upcoming commit.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-02-23 10:34:19 -05:00
Glauber Maroto Ferreira 74922049ba drivers: spi: esp32: add basic SPI master support
Include SPI master support for blocking and asynchronous calls.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-02-22 08:17:04 -05:00
Kumar Gala 7ee312ec57 drivers: spi: NXP: Convert clock control to use DEVICE_DT_GET
Replace device_get_binding with DEVICE_DT_GET for getting access
to the clock controller device.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-18 10:53:27 -06:00
Kumar Gala 3a8fffb9c3 device: rv32m1: Convert clock control to use DEVICE_DT_GET
Replace device_get_binding with DEVICE_DT_GET for getting access
to the clock controller device.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-18 09:26:39 -06:00
Kumar Gala b275fec8c4 soc: stm32: convert to use DEVICE_DT_GET for clocks
Convert from device_get_binding to DEVICE_DT_GET.  In doing this we
no longer need the label in the devicetree node so we remove that.

Removed all __ASSERT_NO_MSG(clk) since we'll get a build error if
DEVICE_DT_GET cant be satisfied, and the clock control api's will
handle reporting if the device_is_ready.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-16 17:01:37 -06:00