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spi_nxp_lpspi: Remove mcux branding from tokens

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Since these drivers mainly do not use MCUX except for the configure
function (which will soon also be changed), change namespace prefix to
lpspi_ instead of spi_mcux_ to avoid confusion.

Also improve descriptions of kconfigs to clarify what they are for.
Not changing the kconfig names for now since they are user-facing.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2025-04-01 18:17:11 -05:00 • committed by Benjamin Cabé
commit 0875499664
5 changed files with 98 additions and 90 deletions
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22
drivers/spi/spi_nxp_lpspi/Kconfig
View file

@ -1,4 +1,4 @@
# Copyright 2018, 2024 NXP
# Copyright 2018, 2024-2025 NXP
# SPDX-License-Identifier: Apache-2.0
config SPI_MCUX_LPSPI
@ -8,24 +8,32 @@ config SPI_MCUX_LPSPI
depends on CLOCK_CONTROL
select PINCTRL
help
Enable support for NXP LPSPI.
Enable driver support for NXP LPSPI.
if SPI_MCUX_LPSPI
config SPI_MCUX_LPSPI_DMA
bool "MCUX LPSPI SPI DMA Support"
bool "NXP LPSPI DMA-based Driver"
default y
select DMA
depends on $(dt_compat_any_has_prop,$(DT_COMPAT_NXP_LPSPI),dmas)
help
Enable the SPI DMA mode for SPI instances
that enable dma channels in their device tree node.
Enable DMA-based transfers for LPSPI peripherals
that have a dmas property specified in their DT node.
The DMA based driver prioritizes bandwidth over latency, due to
DMA being more efficient for larger data transfers, to avoid CPU
having to be utilized to do the work. However, setting up a DMA
transfer is more complicated setup than just starting the transfer
immediately with CPU, so there could be more latency between
the point of requesting a transfer and when it actually starts.
config SPI_MCUX_LPSPI_CPU
bool "NXP MCUX LPSPI driver"
bool "NXP LPSPI CPU-based driver"
default y
depends on $(dt_compat_any_not_has_prop,$(DT_COMPAT_NXP_LPSPI),dmas) || !SPI_MCUX_LPSPI_DMA
help
Use the CPU-based LPSPI driver.
Enable "normal" CPU based SPI driver for LPSPI.
This has lower latency than DMA-based driver but over the
longer transfers will likely have less bandwidth and use more CPU time.
endif # SPI_MCUX_LPSPI

60
drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi.c
View file

@ -7,7 +7,7 @@
#define DT_DRV_COMPAT nxp_lpspi
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(spi_mcux_lpspi, CONFIG_SPI_LOG_LEVEL);
LOG_MODULE_REGISTER(spi_lpspi, CONFIG_SPI_LOG_LEVEL);
#include "spi_nxp_lpspi_priv.h"
@ -30,7 +30,7 @@ static inline uint8_t tx_fifo_cur_len(LPSPI_Type *base)
static inline void lpspi_rx_word_write_bytes(const struct device *dev, size_t offset)
{
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data;
struct spi_context *ctx = &data->ctx;
uint8_t num_bytes = MIN(lpspi_data->word_size_bytes, ctx->rx_len);
@ -50,7 +50,7 @@ static inline void lpspi_rx_word_write_bytes(const struct device *dev, size_t of
/* Reads a maximum number of words from RX fifo and writes them to the remainder of the RX buf */
static inline size_t lpspi_rx_buf_write_words(const struct device *dev, uint8_t max_read)
{
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data;
struct spi_context *ctx = &data->ctx;
size_t buf_len = DIV_ROUND_UP(ctx->rx_len, lpspi_data->word_size_bytes);
@ -69,7 +69,7 @@ static inline size_t lpspi_rx_buf_write_words(const struct device *dev, uint8_t
static inline void lpspi_handle_rx_irq(const struct device *dev)
{
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data;
struct spi_context *ctx = &data->ctx;
uint8_t rx_fsr = rx_fifo_cur_len(base);
@ -98,7 +98,7 @@ static inline void lpspi_handle_rx_irq(const struct device *dev)
static inline uint32_t lpspi_next_tx_word(const struct device *dev, int offset)
{
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data;
struct spi_context *ctx = &data->ctx;
const uint8_t *byte = ctx->tx_buf + offset;
@ -115,7 +115,7 @@ static inline uint32_t lpspi_next_tx_word(const struct device *dev, int offset)
static inline void lpspi_fill_tx_fifo(const struct device *dev)
{
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data;
size_t bytes_in_xfer = lpspi_data->fill_len * lpspi_data->word_size_bytes;
size_t offset;
@ -130,7 +130,7 @@ static inline void lpspi_fill_tx_fifo(const struct device *dev)
static void lpspi_fill_tx_fifo_nop(const struct device *dev)
{
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data;
for (int i = 0; i < lpspi_data->fill_len; i++) {
@ -142,8 +142,8 @@ static void lpspi_fill_tx_fifo_nop(const struct device *dev)
static void lpspi_next_tx_fill(const struct device *dev)
{
const struct spi_mcux_config *config = dev->config;
struct spi_mcux_data *data = dev->data;
const struct lpspi_config *config = dev->config;
struct lpspi_data *data = dev->data;
struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data;
struct spi_context *ctx = &data->ctx;
size_t max_chunk;
@ -163,7 +163,7 @@ static void lpspi_next_tx_fill(const struct device *dev)
static inline void lpspi_handle_tx_irq(const struct device *dev)
{
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data;
struct spi_context *ctx = &data->ctx;
@ -182,8 +182,8 @@ static inline void lpspi_handle_tx_irq(const struct device *dev)
static void lpspi_isr(const struct device *dev)
{
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
const struct spi_mcux_config *config = dev->config;
struct spi_mcux_data *data = dev->data;
const struct lpspi_config *config = dev->config;
struct lpspi_data *data = dev->data;
struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data;
struct spi_context *ctx = &data->ctx;
uint32_t status_flags = base->SR;
@ -229,7 +229,7 @@ static int transceive(const struct device *dev, const struct spi_config *spi_cfg
bool asynchronous, spi_callback_t cb, void *userdata)
{
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data;
struct spi_context *ctx = &data->ctx;
int ret = 0;
@ -280,7 +280,7 @@ error:
return ret;
}
static int spi_mcux_transceive_sync(const struct device *dev, const struct spi_config *spi_cfg,
static int lpspi_transceive_sync(const struct device *dev, const struct spi_config *spi_cfg,
const struct spi_buf_set *tx_bufs,
const struct spi_buf_set *rx_bufs)
{
@ -288,7 +288,7 @@ static int spi_mcux_transceive_sync(const struct device *dev, const struct spi_c
}
#ifdef CONFIG_SPI_ASYNC
static int spi_mcux_transceive_async(const struct device *dev, const struct spi_config *spi_cfg,
static int lpspi_transceive_async(const struct device *dev, const struct spi_config *spi_cfg,
const struct spi_buf_set *tx_bufs,
const struct spi_buf_set *rx_bufs, spi_callback_t cb,
void *userdata)
@ -297,20 +297,20 @@ static int spi_mcux_transceive_async(const struct device *dev, const struct spi_
}
#endif /* CONFIG_SPI_ASYNC */
static DEVICE_API(spi, spi_mcux_driver_api) = {
.transceive = spi_mcux_transceive_sync,
static DEVICE_API(spi, lpspi_driver_api) = {
.transceive = lpspi_transceive_sync,
#ifdef CONFIG_SPI_ASYNC
.transceive_async = spi_mcux_transceive_async,
.transceive_async = lpspi_transceive_async,
#endif
#ifdef CONFIG_SPI_RTIO
.iodev_submit = spi_rtio_iodev_default_submit,
#endif
.release = spi_mcux_release,
.release = spi_lpspi_release,
};
static int spi_mcux_init(const struct device *dev)
static int lpspi_init(const struct device *dev)
{
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
int err = 0;
err = spi_nxp_init_common(dev);
@ -325,23 +325,23 @@ static int spi_mcux_init(const struct device *dev)
#define LPSPI_INIT(n) \
SPI_NXP_LPSPI_COMMON_INIT(n) \
SPI_MCUX_LPSPI_CONFIG_INIT(n) \
SPI_LPSPI_CONFIG_INIT(n) \
\
static struct lpspi_driver_data lpspi_##n##_driver_data; \
\
static struct spi_mcux_data spi_mcux_data_##n = { \
static struct lpspi_data lpspi_data_##n = { \
SPI_NXP_LPSPI_COMMON_DATA_INIT(n) \
.driver_data = &lpspi_##n##_driver_data, \
}; \
\
SPI_DEVICE_DT_INST_DEFINE(n, spi_mcux_init, NULL, &spi_mcux_data_##n, \
&spi_mcux_config_##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \
&spi_mcux_driver_api);
SPI_DEVICE_DT_INST_DEFINE(n, lpspi_init, NULL, &lpspi_data_##n, \
&lpspi_config_##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \
&lpspi_driver_api);
#define SPI_MCUX_LPSPI_INIT_IF_DMA(n) IF_DISABLED(SPI_NXP_LPSPI_HAS_DMAS(n), (LPSPI_INIT(n)))
#define SPI_LPSPI_INIT_IF_DMA(n) IF_DISABLED(SPI_NXP_LPSPI_HAS_DMAS(n), (LPSPI_INIT(n)))
#define SPI_MCUX_LPSPI_INIT(n) \
#define SPI_LPSPI_INIT(n) \
COND_CODE_1(CONFIG_SPI_MCUX_LPSPI_DMA, \
(SPI_MCUX_LPSPI_INIT_IF_DMA(n)), (LPSPI_INIT(n)))
(SPI_LPSPI_INIT_IF_DMA(n)), (LPSPI_INIT(n)))
DT_INST_FOREACH_STATUS_OKAY(SPI_MCUX_LPSPI_INIT)
DT_INST_FOREACH_STATUS_OKAY(SPI_LPSPI_INIT)

14
drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_common.c
View file

@ -5,7 +5,7 @@
*/
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(spi_mcux_lpspi_common, CONFIG_SPI_LOG_LEVEL);
LOG_MODULE_REGISTER(spi_lpspi_common, CONFIG_SPI_LOG_LEVEL);
#include "spi_nxp_lpspi_priv.h"
#include <fsl_lpspi.h>
@ -61,9 +61,9 @@ void lpspi_wait_tx_fifo_empty(const struct device *dev)
}
}
int spi_mcux_release(const struct device *dev, const struct spi_config *spi_cfg)
int spi_lpspi_release(const struct device *dev, const struct spi_config *spi_cfg)
{
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
spi_context_unlock_unconditionally(&data->ctx);
@ -103,8 +103,8 @@ static inline int lpspi_validate_xfer_args(const struct spi_config *spi_cfg)
int spi_mcux_configure(const struct device *dev, const struct spi_config *spi_cfg)
{
const struct spi_mcux_config *config = dev->config;
struct spi_mcux_data *data = dev->data;
const struct lpspi_config *config = dev->config;
struct lpspi_data *data = dev->data;
struct spi_context *ctx = &data->ctx;
bool already_configured = spi_context_configured(ctx, spi_cfg);
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
@ -198,8 +198,8 @@ static void lpspi_module_system_init(LPSPI_Type *base)
int spi_nxp_init_common(const struct device *dev)
{
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
const struct spi_mcux_config *config = dev->config;
struct spi_mcux_data *data = dev->data;
const struct lpspi_config *config = dev->config;
struct lpspi_data *data = dev->data;
int err = 0;
DEVICE_MMIO_NAMED_MAP(dev, reg_base, K_MEM_CACHE_NONE | K_MEM_DIRECT_MAP);

54
drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_dma.c
View file

@ -7,7 +7,7 @@
#define DT_DRV_COMPAT nxp_lpspi
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(spi_mcux_lpspi_dma, CONFIG_SPI_LOG_LEVEL);
LOG_MODULE_REGISTER(spi_lpspi_dma, CONFIG_SPI_LOG_LEVEL);
#include <zephyr/drivers/dma.h>
#include "spi_nxp_lpspi_priv.h"
@ -30,7 +30,7 @@ struct spi_nxp_dma_data {
struct spi_dma_stream dma_tx;
};
static struct dma_block_config *spi_mcux_dma_common_load(struct spi_dma_stream *stream,
static struct dma_block_config *lpspi_dma_common_load(struct spi_dma_stream *stream,
const struct device *dev,
const uint8_t *buf, size_t len)
{
@ -47,13 +47,13 @@ static struct dma_block_config *spi_mcux_dma_common_load(struct spi_dma_stream *
return blk_cfg;
}
static int spi_mcux_dma_tx_load(const struct device *dev, const uint8_t *buf, size_t len)
static int lpspi_dma_tx_load(const struct device *dev, const uint8_t *buf, size_t len)
{
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
struct spi_nxp_dma_data *dma_data = (struct spi_nxp_dma_data *)data->driver_data;
struct spi_dma_stream *stream = &dma_data->dma_tx;
struct dma_block_config *blk_cfg = spi_mcux_dma_common_load(stream, dev, buf, len);
struct dma_block_config *blk_cfg = lpspi_dma_common_load(stream, dev, buf, len);
if (buf == NULL) {
/* pretend that nop value comes from peripheral so dma doesn't move source */
@ -69,13 +69,13 @@ static int spi_mcux_dma_tx_load(const struct device *dev, const uint8_t *buf, si
return dma_config(stream->dma_dev, stream->channel, &stream->dma_cfg);
}
static int spi_mcux_dma_rx_load(const struct device *dev, uint8_t *buf, size_t len)
static int lpspi_dma_rx_load(const struct device *dev, uint8_t *buf, size_t len)
{
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
struct spi_nxp_dma_data *dma_data = (struct spi_nxp_dma_data *)data->driver_data;
struct spi_dma_stream *stream = &dma_data->dma_rx;
struct dma_block_config *blk_cfg = spi_mcux_dma_common_load(stream, dev, buf, len);
struct dma_block_config *blk_cfg = lpspi_dma_common_load(stream, dev, buf, len);
if (buf == NULL) {
/* pretend it is peripheral xfer so DMA just xfer to dummy buf */
@ -91,9 +91,9 @@ static int spi_mcux_dma_rx_load(const struct device *dev, uint8_t *buf, size_t l
return dma_config(stream->dma_dev, stream->channel, &stream->dma_cfg);
}
static inline int spi_mcux_dma_rxtx_load(const struct device *dev)
static inline int lpspi_dma_rxtx_load(const struct device *dev)
{
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
struct spi_nxp_dma_data *dma_data = (struct spi_nxp_dma_data *)data->driver_data;
struct spi_dma_stream *rx = &dma_data->dma_rx;
struct spi_dma_stream *tx = &dma_data->dma_tx;
@ -109,12 +109,12 @@ static inline int spi_mcux_dma_rxtx_load(const struct device *dev)
return -ENODATA;
}
ret = spi_mcux_dma_tx_load(dev, ctx->tx_buf, next_chunk_size);
ret = lpspi_dma_tx_load(dev, ctx->tx_buf, next_chunk_size);
if (ret != 0) {
return ret;
}
ret = spi_mcux_dma_rx_load(dev, ctx->rx_buf, next_chunk_size);
ret = lpspi_dma_rx_load(dev, ctx->rx_buf, next_chunk_size);
if (ret != 0) {
return ret;
}
@ -127,9 +127,9 @@ static inline int spi_mcux_dma_rxtx_load(const struct device *dev)
return dma_start(tx->dma_dev, tx->channel);
}
static int spi_mcux_dma_next_fill(const struct device *dev)
static int lpspi_dma_next_fill(const struct device *dev)
{
struct spi_mcux_data *data = (struct spi_mcux_data *)dev->data;
struct lpspi_data *data = (struct lpspi_data *)dev->data;
struct spi_nxp_dma_data *dma_data = (struct spi_nxp_dma_data *)data->driver_data;
struct spi_dma_stream *rx = &dma_data->dma_rx;
struct spi_dma_stream *tx = &dma_data->dma_tx;
@ -137,14 +137,14 @@ static int spi_mcux_dma_next_fill(const struct device *dev)
rx->chunk_done = false;
tx->chunk_done = false;
return spi_mcux_dma_rxtx_load(dev);
return lpspi_dma_rxtx_load(dev);
}
static void spi_mcux_dma_callback(const struct device *dev, void *arg, uint32_t channel, int status)
{
const struct device *spi_dev = arg;
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(spi_dev, reg_base);
struct spi_mcux_data *data = (struct spi_mcux_data *)spi_dev->data;
struct lpspi_data *data = (struct lpspi_data *)spi_dev->data;
struct spi_nxp_dma_data *dma_data = (struct spi_nxp_dma_data *)data->driver_data;
struct spi_dma_stream *rx = &dma_data->dma_rx;
struct spi_dma_stream *tx = &dma_data->dma_tx;
@ -190,7 +190,7 @@ static void spi_mcux_dma_callback(const struct device *dev, void *arg, uint32_t
goto done;
}
status = spi_mcux_dma_next_fill(spi_dev);
status = lpspi_dma_next_fill(spi_dev);
if (status) {
goto error;
}
@ -213,7 +213,7 @@ static int transceive_dma(const struct device *dev, const struct spi_config *spi
bool asynchronous, spi_callback_t cb, void *userdata)
{
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
struct spi_context *ctx = &data->ctx;
int ret;
@ -226,7 +226,7 @@ static int transceive_dma(const struct device *dev, const struct spi_config *spi
spi_context_buffers_setup(ctx, tx_bufs, rx_bufs, 1);
ret = spi_mcux_dma_next_fill(dev);
ret = lpspi_dma_next_fill(dev);
if (ret == -ENODATA) {
/* No transfer to do? So just exit */
ret = 0;
@ -266,7 +266,7 @@ static int lpspi_dma_dev_ready(const struct device *dma_dev)
static int spi_mcux_dma_init(const struct device *dev)
{
struct spi_mcux_data *data = dev->data;
struct lpspi_data *data = dev->data;
struct spi_nxp_dma_data *dma_data = (struct spi_nxp_dma_data *)data->driver_data;
int err = 0;
@ -302,7 +302,7 @@ static int spi_nxp_dma_transceive_async(const struct device *dev, const struct s
}
#endif /* CONFIG_SPI_ASYNC */
static DEVICE_API(spi, spi_mcux_driver_api) = {
static DEVICE_API(spi, lpspi_dma_driver_api) = {
.transceive = spi_nxp_dma_transceive_sync,
#ifdef CONFIG_SPI_ASYNC
.transceive_async = spi_nxp_dma_transceive_async,
@ -310,7 +310,7 @@ static DEVICE_API(spi, spi_mcux_driver_api) = {
#ifdef CONFIG_SPI_RTIO
.iodev_submit = spi_rtio_iodev_default_submit,
#endif
.release = spi_mcux_release,
.release = spi_lpspi_release,
};
static void lpspi_isr(const struct device *dev)
@ -340,16 +340,16 @@ static void lpspi_isr(const struct device *dev)
#define LPSPI_DMA_INIT(n) \
SPI_NXP_LPSPI_COMMON_INIT(n) \
SPI_MCUX_LPSPI_CONFIG_INIT(n) \
SPI_LPSPI_CONFIG_INIT(n) \
\
static struct spi_nxp_dma_data lpspi_dma_data##n = {SPI_DMA_CHANNELS(n)}; \
\
static struct spi_mcux_data spi_mcux_data_##n = {.driver_data = &lpspi_dma_data##n, \
static struct lpspi_data lpspi_data_##n = {.driver_data = &lpspi_dma_data##n, \
SPI_NXP_LPSPI_COMMON_DATA_INIT(n)}; \
\
SPI_DEVICE_DT_INST_DEFINE(n, spi_mcux_dma_init, NULL, &spi_mcux_data_##n, \
&spi_mcux_config_##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \
&spi_mcux_driver_api);
SPI_DEVICE_DT_INST_DEFINE(n, spi_mcux_dma_init, NULL, &lpspi_data_##n, \
&lpspi_config_##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \
&lpspi_dma_driver_api);
#define SPI_NXP_LPSPI_DMA_INIT(n) IF_ENABLED(SPI_NXP_LPSPI_HAS_DMAS(n), (LPSPI_DMA_INIT(n)))

38
drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_priv.h
View file

@ -1,5 +1,5 @@
/*
* Copyright 2018, 2024 NXP
* Copyright 2018, 2024-2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -26,10 +26,10 @@
#define LPSPI_INTERRUPT_BITS GENMASK(8, 13)
/* Required by DEVICE_MMIO_NAMED_* macros */
#define DEV_CFG(_dev) ((const struct spi_mcux_config *)(_dev)->config)
#define DEV_DATA(_dev) ((struct spi_mcux_data *)(_dev)->data)
#define DEV_CFG(_dev) ((const struct lpspi_config *)(_dev)->config)
#define DEV_DATA(_dev) ((struct lpspi_data *)(_dev)->data)
struct spi_mcux_config {
struct lpspi_config {
DEVICE_MMIO_NAMED_ROM(reg_base);
const struct device *clock_dev;
clock_control_subsys_t clock_subsys;
@ -45,7 +45,7 @@ struct spi_mcux_config {
uint8_t irqn;
};
struct spi_mcux_data {
struct lpspi_data {
DEVICE_MMIO_NAMED_RAM(reg_base);
const struct device *dev;
struct spi_context ctx;
@ -66,33 +66,33 @@ int spi_mcux_configure(const struct device *dev, const struct spi_config *spi_cf
int spi_nxp_init_common(const struct device *dev);
/* common api function for now */
int spi_mcux_release(const struct device *dev, const struct spi_config *spi_cfg);
int spi_lpspi_release(const struct device *dev, const struct spi_config *spi_cfg);
void lpspi_wait_tx_fifo_empty(const struct device *dev);
#define SPI_MCUX_LPSPI_IRQ_FUNC_LP_FLEXCOMM(n) \
#define SPI_LPSPI_IRQ_FUNC_LP_FLEXCOMM(n) \
nxp_lp_flexcomm_setirqhandler(DEVICE_DT_GET(DT_INST_PARENT(n)), DEVICE_DT_INST_GET(n), \
LP_FLEXCOMM_PERIPH_LPSPI, lpspi_isr);
#define SPI_MCUX_LPSPI_IRQ_FUNC_DISTINCT(n) \
#define SPI_LPSPI_IRQ_FUNC_DISTINCT(n) \
IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), lpspi_isr, DEVICE_DT_INST_GET(n), \
0); \
irq_enable(DT_INST_IRQN(n));
#define SPI_MCUX_LPSPI_IRQ_FUNC(n) COND_CODE_1(DT_NODE_HAS_COMPAT(DT_INST_PARENT(n), \
nxp_lp_flexcomm), \
(SPI_MCUX_LPSPI_IRQ_FUNC_LP_FLEXCOMM(n)), \
(SPI_MCUX_LPSPI_IRQ_FUNC_DISTINCT(n)))
#define SPI_LPSPI_IRQ_FUNC(n) COND_CODE_1(DT_NODE_HAS_COMPAT(DT_INST_PARENT(n), \
nxp_lp_flexcomm), \
(SPI_LPSPI_IRQ_FUNC_LP_FLEXCOMM(n)), \
(SPI_LPSPI_IRQ_FUNC_DISTINCT(n)))
#define LPSPI_IRQN(n) COND_CODE_1(DT_NODE_HAS_COMPAT(DT_INST_PARENT(n), nxp_lp_flexcomm), \
(DT_IRQN(DT_INST_PARENT(n))), (DT_INST_IRQN(n)))
#define SPI_MCUX_LPSPI_CONFIG_INIT(n) \
static const struct spi_mcux_config spi_mcux_config_##n = { \
#define SPI_LPSPI_CONFIG_INIT(n) \
static const struct lpspi_config lpspi_config_##n = { \
DEVICE_MMIO_NAMED_ROM_INIT(reg_base, DT_DRV_INST(n)), \
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
.clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name), \
.irq_config_func = spi_mcux_config_func_##n, \
.irq_config_func = lpspi_config_func_##n, \
.pcs_sck_delay = UTIL_AND(DT_INST_NODE_HAS_PROP(n, pcs_sck_delay), \
DT_INST_PROP(n, pcs_sck_delay)), \
.sck_pcs_delay = UTIL_AND(DT_INST_NODE_HAS_PROP(n, sck_pcs_delay), \
@ -110,14 +110,14 @@ void lpspi_wait_tx_fifo_empty(const struct device *dev);
#define SPI_NXP_LPSPI_COMMON_INIT(n) \
PINCTRL_DT_INST_DEFINE(n); \
\
static void spi_mcux_config_func_##n(const struct device *dev) \
static void lpspi_config_func_##n(const struct device *dev) \
{ \
SPI_MCUX_LPSPI_IRQ_FUNC(n) \
SPI_LPSPI_IRQ_FUNC(n) \
}
#define SPI_NXP_LPSPI_COMMON_DATA_INIT(n) \
SPI_CONTEXT_INIT_LOCK(spi_mcux_data_##n, ctx), \
SPI_CONTEXT_INIT_SYNC(spi_mcux_data_##n, ctx), \
SPI_CONTEXT_INIT_LOCK(lpspi_data_##n, ctx), \
SPI_CONTEXT_INIT_SYNC(lpspi_data_##n, ctx), \
SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx)
#define SPI_NXP_LPSPI_HAS_DMAS(n) \