drivers: ambiq: Correct peripheral instance calculation
This commit corrected ambiq peripheral instance calculations Signed-off-by: Hao Luo <hluo@ambiq.com>
This commit is contained in:
parent
660035d45d
commit
a460479ff7
5 changed files with 30 additions and 23 deletions
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@ -54,6 +54,7 @@ struct i2c_ambiq_config {
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#endif /* CONFIG_I2C_AMBIQ_BUS_RECOVERY */
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uint32_t base;
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int size;
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int inst_idx;
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uint32_t bitrate;
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const struct pinctrl_dev_config *pcfg;
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void (*irq_config_func)(void);
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@ -68,7 +69,6 @@ struct i2c_ambiq_data {
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struct k_sem transfer_sem;
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i2c_ambiq_callback_t callback;
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void *callback_data;
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int inst_idx;
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uint32_t transfer_status;
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bool pm_policy_state_on;
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};
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@ -247,6 +247,7 @@ static int i2c_ambiq_write(const struct device *dev, struct i2c_msg *msg, uint16
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static int i2c_ambiq_configure(const struct device *dev, uint32_t dev_config)
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{
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struct i2c_ambiq_data *data = dev->data;
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const struct i2c_ambiq_config *cfg = dev->config;
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if (!(I2C_MODE_CONTROLLER & dev_config)) {
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return -EINVAL;
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@ -267,7 +268,7 @@ static int i2c_ambiq_configure(const struct device *dev, uint32_t dev_config)
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}
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#ifdef CONFIG_I2C_AMBIQ_DMA
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data->iom_cfg.pNBTxnBuf = i2c_dma_tcb_buf[data->inst_idx].buf;
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data->iom_cfg.pNBTxnBuf = i2c_dma_tcb_buf[cfg->inst_idx].buf;
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data->iom_cfg.ui32NBTxnBufLength = CONFIG_I2C_DMA_TCB_BUFFER_SIZE;
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#endif
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@ -410,8 +411,7 @@ static int i2c_ambiq_init(const struct device *dev)
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data->iom_cfg.eInterfaceMode = AM_HAL_IOM_I2C_MODE;
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if (AM_HAL_STATUS_SUCCESS !=
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am_hal_iom_initialize((config->base - IOM0_BASE) / config->size, &data->iom_handler)) {
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if (AM_HAL_STATUS_SUCCESS != am_hal_iom_initialize(config->inst_idx, &data->iom_handler)) {
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LOG_ERR("Fail to initialize I2C\n");
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return -ENXIO;
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}
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@ -496,18 +496,17 @@ static int i2c_ambiq_pm_action(const struct device *dev, enum pm_device_action a
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}; \
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static struct i2c_ambiq_data i2c_ambiq_data##n = { \
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.bus_sem = Z_SEM_INITIALIZER(i2c_ambiq_data##n.bus_sem, 1, 1), \
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.transfer_sem = Z_SEM_INITIALIZER(i2c_ambiq_data##n.transfer_sem, 0, 1), \
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.inst_idx = n, \
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}; \
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.transfer_sem = Z_SEM_INITIALIZER(i2c_ambiq_data##n.transfer_sem, 0, 1)}; \
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static const struct i2c_ambiq_config i2c_ambiq_config##n = { \
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.base = DT_INST_REG_ADDR(n), \
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.size = DT_INST_REG_SIZE(n), \
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.inst_idx = (DT_INST_REG_ADDR(n) - IOM0_BASE) / (IOM1_BASE - IOM0_BASE), \
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.bitrate = DT_INST_PROP(n, clock_frequency), \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
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.irq_config_func = i2c_irq_config_func_##n, \
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IF_ENABLED(CONFIG_I2C_AMBIQ_BUS_RECOVERY, \
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(.scl = GPIO_DT_SPEC_INST_GET_OR(n, scl_gpios, {0}),\
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.sda = GPIO_DT_SPEC_INST_GET_OR(n, sda_gpios, {0}),)) }; \
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IF_ENABLED(CONFIG_I2C_AMBIQ_BUS_RECOVERY, \
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(.scl = GPIO_DT_SPEC_INST_GET_OR(n, scl_gpios, {0}), \
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.sda = GPIO_DT_SPEC_INST_GET_OR(n, sda_gpios, {0}),)) }; \
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PM_DEVICE_DT_INST_DEFINE(n, i2c_ambiq_pm_action); \
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I2C_DEVICE_DT_INST_DEFINE(n, i2c_ambiq_init, PM_DEVICE_DT_INST_GET(n), &i2c_ambiq_data##n, \
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&i2c_ambiq_config##n, POST_KERNEL, CONFIG_I2C_INIT_PRIORITY, \
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@ -26,6 +26,14 @@ LOG_MODULE_REGISTER(mspi_ambiq_ap3);
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#define PWRCTRL_MAX_WAIT_US 5
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#define MSPI_BUSY BIT(2)
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#if defined(CONFIG_SOC_APOLLO3_BLUE)
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#define MSPI_BASE_ADDR MSPI_BASE
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#define MSPI_ADDR_INTERVAL 1
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#else
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#define MSPI_BASE_ADDR MSPI0_BASE
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#define MSPI_ADDR_INTERVAL (MSPI1_BASE - MSPI0_BASE)
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#endif
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typedef int (*mspi_ambiq_pwr_func_t)(void);
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typedef void (*irq_config_func_t)(void);
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@ -1356,8 +1364,8 @@ static DEVICE_API(mspi, mspi_ambiq_driver_api) = {
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#define MSPI_CONFIG(n) \
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{ \
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.channel_num = (DT_INST_REG_ADDR(n) - MSPI0_BASE) / \
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(DT_INST_REG_SIZE(n) * 4), \
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.channel_num = (DT_INST_REG_ADDR(n) - MSPI_BASE_ADDR) / \
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MSPI_ADDR_INTERVAL, \
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.op_mode = MSPI_OP_MODE_CONTROLLER, \
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.duplex = MSPI_HALF_DUPLEX, \
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.max_freq = MSPI_MAX_FREQ, \
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@ -175,7 +175,7 @@ static int spi_ambiq_init(const struct device *dev)
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}
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#endif /* CONFIG_SPI_AMBIQ_BLEIF_TIMING_TRACE */
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ret = am_hal_ble_initialize((cfg->base - BLEIF_BASE) / cfg->size, &data->BLEhandle);
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ret = am_hal_ble_initialize(0, &data->BLEhandle);
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if (ret) {
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return ret;
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}
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@ -44,6 +44,7 @@ LOG_MODULE_REGISTER(spi_ambiq);
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struct spi_ambiq_config {
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uint32_t base;
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int size;
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int inst_idx;
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uint32_t clock_freq;
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const struct pinctrl_dev_config *pcfg;
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void (*irq_config_func)(void);
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@ -53,7 +54,6 @@ struct spi_ambiq_data {
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struct spi_context ctx;
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am_hal_iom_config_t iom_cfg;
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void *iom_handler;
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int inst_idx;
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bool cont;
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bool pm_policy_state_on;
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};
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@ -244,7 +244,7 @@ static int spi_config(const struct device *dev, const struct spi_config *config)
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ctx->config = config;
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#ifdef CONFIG_SPI_AMBIQ_DMA
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data->iom_cfg.pNBTxnBuf = spi_dma_tcb_buf[data->inst_idx].buf;
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data->iom_cfg.pNBTxnBuf = spi_dma_tcb_buf[cfg->inst_idx].buf;
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data->iom_cfg.ui32NBTxnBufLength = CONFIG_SPI_DMA_TCB_BUFFER_SIZE;
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#endif
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@ -506,8 +506,7 @@ static int spi_ambiq_init(const struct device *dev)
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const struct spi_ambiq_config *cfg = dev->config;
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int ret = 0;
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if (AM_HAL_STATUS_SUCCESS !=
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am_hal_iom_initialize((cfg->base - IOM0_BASE) / cfg->size, &data->iom_handler)) {
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if (AM_HAL_STATUS_SUCCESS != am_hal_iom_initialize(cfg->inst_idx, &data->iom_handler)) {
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LOG_ERR("Fail to initialize SPI\n");
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return -ENXIO;
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}
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@ -575,10 +574,11 @@ static int spi_ambiq_pm_action(const struct device *dev, enum pm_device_action a
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static struct spi_ambiq_data spi_ambiq_data##n = { \
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SPI_CONTEXT_INIT_LOCK(spi_ambiq_data##n, ctx), \
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SPI_CONTEXT_INIT_SYNC(spi_ambiq_data##n, ctx), \
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SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx).inst_idx = n}; \
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SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx)}; \
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static const struct spi_ambiq_config spi_ambiq_config##n = { \
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.base = DT_INST_REG_ADDR(n), \
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.size = DT_INST_REG_SIZE(n), \
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.inst_idx = (DT_INST_REG_ADDR(n) - IOM0_BASE) / (IOM1_BASE - IOM0_BASE), \
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.clock_freq = DT_INST_PROP(n, clock_frequency), \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
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.irq_config_func = spi_irq_config_func_##n}; \
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@ -22,10 +22,12 @@ LOG_MODULE_REGISTER(spi_ambiq_spid);
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#include "spi_context.h"
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#include <am_mcu_apollo.h>
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#define SPID_ADDR_INTERVAL 1
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struct spi_ambiq_config {
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const struct gpio_dt_spec int_gpios;
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uint32_t base;
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int size;
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int inst_idx;
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const struct pinctrl_dev_config *pcfg;
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void (*irq_config_func)(void);
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};
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@ -34,7 +36,6 @@ struct spi_ambiq_data {
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struct spi_context ctx;
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am_hal_ios_config_t ios_cfg;
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void *ios_handler;
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int inst_idx;
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struct k_sem spim_wrcmp_sem;
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};
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@ -331,8 +332,7 @@ static int spi_ambiq_init(const struct device *dev)
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const struct spi_ambiq_config *cfg = dev->config;
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int ret = 0;
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if (AM_HAL_STATUS_SUCCESS !=
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am_hal_ios_initialize((cfg->base - IOSLAVE_BASE) / cfg->size, &data->ios_handler)) {
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if (AM_HAL_STATUS_SUCCESS != am_hal_ios_initialize(cfg->inst_idx, &data->ios_handler)) {
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LOG_ERR("Fail to initialize SPID\n");
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return -ENXIO;
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}
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@ -400,12 +400,12 @@ static int spi_ambiq_pm_action(const struct device *dev, enum pm_device_action a
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static struct spi_ambiq_data spi_ambiq_data##n = { \
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SPI_CONTEXT_INIT_LOCK(spi_ambiq_data##n, ctx), \
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SPI_CONTEXT_INIT_SYNC(spi_ambiq_data##n, ctx), \
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.spim_wrcmp_sem = Z_SEM_INITIALIZER(spi_ambiq_data##n.spim_wrcmp_sem, 0, 1), \
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.inst_idx = n}; \
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.spim_wrcmp_sem = Z_SEM_INITIALIZER(spi_ambiq_data##n.spim_wrcmp_sem, 0, 1)}; \
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static const struct spi_ambiq_config spi_ambiq_config##n = { \
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.int_gpios = GPIO_DT_SPEC_INST_GET(n, int_gpios), \
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.base = DT_INST_REG_ADDR(n), \
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.size = DT_INST_REG_SIZE(n), \
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.inst_idx = (DT_INST_REG_ADDR(n) - IOSLAVE_BASE) / SPID_ADDR_INTERVAL, \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
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.irq_config_func = spi_irq_config_func_##n}; \
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PM_DEVICE_DT_INST_DEFINE(n, spi_ambiq_pm_action); \
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