This commit removes some line breaks from function definitions that were
not needed since it can fit on one line.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
In case of error from the spi_stm32_shift_frames, spi_stm32_complete
could be called twice if one of the condition with the transfer directiion
were true. To prevent this, add a return after the call to
spi_stm32_complete.
Simplify the if/else block with a single if since spi_stm32_complete is
called in every case.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The functions spi_stm32_send_next_frame and spi_stm32_read_next_frame
already exist to send and receive next frame. Use them in slave mode
instead of doing it manually.
Additional checks with spi_context_tx_buf_on and spi_context_rx_buf_on are
done inside these functions but they are already done beforehand in slave
mode.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Create a new function that calculates and set the transfer size depending
on the transfer direction (for H7 compatibles).
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Fixes the Kconfig name of this so that it matches the value from
soc.yml, and deprecates the old name - this is required to support
future build system features. Additionally, it fixes an issue in
Kconfigs of this SoC of duplicating existing symbols
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Adds making a peripheral clock connection to the initialiazation for SCB
based drivers. These drivers are the UART/Serial driver, I2C driver, and
SPI driver.
Signed-off-by: John Batch <john.batch@infineon.com>
Use SHELL_HELP macro for help strings to ensure consistency across
various shell modules and to save on code size.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
RUN_FN_ON_SPI_DEVICE to run a given fn only if the node_id is a direct
child of the SPI controller (i.e. DT_PARENT(node_id) == DT_BUS(node_id)),
and the node itself has status okay. This prevents enumerating sub-nodes
of SPI devices (for example GPIO sub-devices) which are not direct
children of the SPI controller.
Fixes#99785
Signed-off-by: Andreas Schmidt <andreas.schmidt@dormakaba.com>
This adds optional clock control support to the spi_dw driver. The
support currently assumes that the clock control binding uses clkid for
the clock cell name.
Signed-off-by: Łukasz Kędziora <lkedziora@antmicro.com>
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
Signed-off-by: Andreas Weissel <andreas.weissel@synaptics.com>
- Add SPI driver for Microchip SERCOM g1
- Add and update Kconfig files to support the driver
- Update CMakeLists.txt to include the new driver
Signed-off-by: Mohamed Azhar <mohamed.azhar@microchip.com>
Add clock_control_configure() call during initialization to properly
configure the LPSPI clock. The implementation gracefully handles
platforms that don't support clock configuration by checking for
-ENOTSUP and -ENOSYS return codes and continuing with default
settings. Real configuration errors are logged and propagated.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
The condition `!spi_context_rx_buf_on(ctx) && spi_context_rx_on(ctx)`
only returns early when RX is active with a NOP buffer.
However, when `rx_len == 0`, `spi_context_rx_on(ctx)` returns false,
causing the early return to be skipped.
This leaves `ctx->rx_buf` (which can be NULL) to be dereferenced.
Since `lpspi_handle_rx_irq()` already guarantees `spi_context_rx_on(ctx)`
is true before calling this function, only check
`!spi_context_rx_buf_on(ctx)` to safely handle NOP buffers.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Refactor `lpspi_rx_buf_write_words()` to compute `words_read` upfront
using `MIN(rx_len, max_read)`, simplifying control flow and making
the read limit explicit without changing behavior.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Use NRF_DT_INST_IRQ_ macros which support building with and without
SW ISR table for all nordic socs.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
For clarity and compactness, use
`spi_context_max_continuous_chunk()` instead of open-coding
the same tx/rx length selection logic.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
When transceive is called on a chip without CONFIG_SPI_STM32_INTERRUPT,
spi_stm32_shift_frames was called even if there was no transfer ongoing.
This lead to an unwanted SPI transfer shifting the whole connection,
causing drivers to malfunction.
Fix it by replacing the do-while loop with a while loop.
Signed-off-by: Robyn Milas <robyn.milas@valotec.com>
Since RPI_PICO_PIO_GET_PROGRAM returns const variable, so changed
`pio_program_t *` variables in data to `const pio_program_t *`.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Move pinctrl_apply_state() from configure to init to ensure pinctrl
is applied once at boot rather than on every transaction.
When cs-gpios is defined, spi_context_cs_configure_all() runs after
pinctrl and reconfigures the CS pin as GPIO, properly overriding
any CS routing set by pinctrl.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Split the code for DMA setting to consider the tx and rx buffers
separately, this makes the driver work for use cases where tx only or rx
only is needed, such as when using this with the ws2812 driver.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The driver was unconditionally setting hal_dev->cs_pin_id to the target
number, which activates hardware CS lines even when GPIO-based chip
select (cs-gpios) is used. This caused issues when using hardware CS
via pinctrl with reg > 0.
Also update the binding documentation to clarify the interaction between
cs-gpios and hardware CS via pinctrl.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Drop cat1 from the binding files to enable reuse by other
category devices as well.
Fixes#99174
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Remove duplicated #include directives within the same
preprocessor scope across the Zephyr tree.
Duplicates inside different #ifdef branches are preserved
as they may be intentional.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
depending on build configuration, spi_context_cs_configure_all() is a
no-opt, so mark the data variable as maybe unused.
Signed-off-by: Martin Gysel <me@bearsh.org>
- call spi_stm32_pm_policy_state_lock_xxx functions wenn context is
locked
- do not call spi_stm32_pm_policy_state_lock_put() in internal helper
spi_stm32_complete() (which gets called from various places) but at the
end of a transfer where it belong
Signed-off-by: Martin Gysel <me@bearsh.org>
The clock-frequency value in dtsi can be used to change
the bus frequency for rts5912 driver and
it support in the range between 15000 to 50000000.
Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
Currently, clk_div_factor is force to 1 if user request more than 110MHz.
However, in this case, gspi_siwx91x_get_divider() will never return 2 or
more, unless the input clock is >= 220MHz. The si91x is not designed for
such high clock frequency. So, this case has never been tested.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
In gspi_siwx91x_config(), clk_div_factor can't be < 1. Therefore, we can
remove the dead code.
This code has been tested with tests/drivers/spi/spi_loopback, with a PLL
clock configured to 160MHz and a bus clock to 80MHz with success. I have
not found the case where change in GSPI_CLK_CONFIG are required.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Until now, GSPI_DATA_SAMPLE_EDGE was enabled as soon as the user requested
> 40Mhz (even if the actual frequency was in fact 40Mhz). However, at 40MHz
and at 80MHz, use of GSPI_DATA_SAMPLE_EDGE generated read errors on the
last bit of the transaction:
Buffer contents are different:
[...],0xaa,0xaa,0xaa,0xaa,
vs:
[...],0xaa,0xaa,0xaa,0xab,
I have not found any case where GSPI_DATA_SAMPLE_EDGE is useful, so this
patch just remove this parameter.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
In functions requiring to lock/release resources, it is less error prone to
have only one exit point and user goto to manage errors.
The behavior of the new code is exactly identical to the initial one.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
The guard against rx_bufs == NULL was originally added to prevent a
DMA misconfiguration observed when no RX buffer was provided.
The issue can no longer be reproduced, and the check was incomplete
since it did not cover rx_bufs->buffers == NULL or rx_bufs->count == 0,
which lead to the same effective condition.
Removing the check simplifies the driver and avoids blocking valid
TX-only transfers.
Signed-off-by: Alexandre Rey <alx.rey@icloud.com>
If spi_sam_configure() is called with more than 4 chip selects the
current check fails even if the pins are used as gpios. The variable
spi_csr_idx already has the correct index to be checked and must be
used in this check.
Signed-off-by: Munawar Ali <ali@sofiha.de>
Signed-off-by: Axel Utech <utech@sofiha.de>
Allows "egis_et171_spi" to use basic clock information
provided by the clock driver to calculate the runtime
SPI frequency.
Signed-off-by: Jacky Lee <jacky.lee@egistec.com>
The Cadence SPI controller has a hardware issue (Xilinx AR#65885
contains more details) where the RX_NOT_EMPTY (RNE) status bit
reports inconsistent state. This causes the driver to unreliably
detect when RX FIFO contains valid data, leading to transfer
failures and test hangs.
Signed-off-by: Srikanth Boyapally <srikanth.boyapally@amd.com>
Extend the number of SPI data sizes supported for series that allow it.
The driver uses the new property st,stm32-data-width to create a table
with all compatible data widths and to check if the SPI instance
support the required width (some instances may have a limited set
of widths compared to others on the same SoC).
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Inverts ll_func_spi_dma_busy logic so that the function returns true if
the SPI DMA is busy (as suggested by the name) instead of the other way
around.
Also completes the check for H7-compatible with the LL_SPI_IsActiveFlag_EOT
function when transfer size is set.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Guard callback registration with CONFIG_SPI_ASYNC to avoid
build error for blocking SPI transfers using DMA
Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
