The syscall handler functions forward parameters with identical casts
that are redundant since the variables already have those types. Drop
the casts to let the compiler type-check the arguments unobstructed.
Signed-off-by: Flavio Ceolin <flavio@hubble.com>
On USCI the shallow buffer is not SPI FIFO buffers RX words.
The pipelined pattern can't work. So revised spi_numaker_usci_txrx.
More, USCI SPI only supports 4–16 bit words, not accepts 24/32.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
The siwx91x SPI driver required to wait for a very small amouth of time
(100ns to 50µs).
When CONFIG_PM is enabled, the granularity of k_busy_wait() is not
sufficient (~32µs). So, the driver implement a raw busy loop.
This busy loop depends on the frequency of the CPU. This was wrongly
retrieved from CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC.
DT_PROP(DT_NODELABEL(cpu0), clock_frequency) is more accurate.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
When the SPI hardware block is use to send data (without receiving any
data), the DMA callback is called when the data are transmitted to the SPI
controller, but before the data are actually sent over the wire.
Then, the chip-select signal could be released while the Tx was still in
progress.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
The SPI_STM32_BUSY_FLAG_TIMEOUT option had no help text, leaving
users with no explanation of its purpose when browsing menuconfig. Add
a description that documents how long the driver polls for the BSY flag
to clear after a DMA transfer on STM32F7 and STM32L4 devices affected
by the busy-flag errata.
Assisted-by: OpenAI Codex:gpt-5
Signed-off-by: Collins Culbert <coculbert@icloud.com>
Use <> operator to include a Zephyr header file instead of "" that
is intended to local header files, not header files relative to
specifically defined search paths.
This change was made running the sed shell command below:
$ sed -i -E 's/#include "zephyr\/([^"]+)\.h"/#include <zephyr\/\1.h>/g' \
`grep -rsl "#include \"zephyr/" drivers/`
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
This commit deploys a workaround for errata 2.21.3 from ES0491 (and similar
for other H7 SoCs).
This prevent the SPI interrupt to fire when SPI is disabled, by disabling
the EOT and TXP interrupt before disabling the SPI.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The NXP ECSPI represents clock polarity with two separate fields:
channelConfig.polarity (SCLK_POL), the active polarity, and
channelConfig.clockInactiveState (SCLK_CTL), the level SCLK idles at
between bursts. spi_mcux_configure() set polarity from the CPOL bit but
left clockInactiveState at the kECSPI_ClockInactiveStateLow default
applied by ECSPI_MasterGetDefaultConfig().
As a result, transfers to CPOL=1 devices (SPI modes 2 and 3) ran with an
inconsistent clock: the active polarity was inverted as requested while
the idle SCLK level stayed low. Drive clockInactiveState from the same
CPOL bit so the idle level matches the configured mode.
Signed-off-by: Marvin Gnad <marvin.gnad@gmail.com>
When a SPI device uses a GPIO chip select, spi_mcux_configure() initialises
the controller on ECSPI channel 0. However spi_mcux_transfer_next_packet()
started every transfer on transfer.channel = ctx->config->slave.
A device with reg != 0 transfers on an ECSPI channel that was never
configured.
Select the transfer channel the same way spi_mcux_configure() already does:
channel 0 when the chip select is a GPIO, and the slave number only for
native chip selects.
Signed-off-by: Marvin Gnad <marvin.gnad@gmail.com>
Check that the buffer length is a multiple of the data size, and return
an error if it's not the case.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Do not store stack-allocated pointers in the SPI data structure.
Set current_tx and current_rx to NULL since they are not used in RTIO
anyway.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Adapt the STM32 SPI driver so that in RTIO, transactions can be done either
in interrupt or in DMA mode, for different instances (until now, once
CONFIG_SPI_STM32_DMA was enabled, all transactions had to be done with
DMA).
Also use the asynchronous DMA callback for RTIO since it shares a lot of
code.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The transceive and transceive_dma functions had some similar code.
Factorize them to reduce code duplication. transceive_dma is now called
from the transceive function, and only the latter is called from the
.transceive and .transceive_async API functions.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This commit fixes issues that could arise notably when only the slave was
sending data (and the master was only receiving). By keeping track of bytes
transmitted in both directions (the context may not keep track of a
direction if the associated buffer is NULL or the length is 0), we prevent
the master side to abort the transmission prematurely.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Fixes the slave mode for st,stm32h7-spi compatibles by setting the
transfer size also for the slave device, and also waiting for SPI to not be
busy before calling the "complete" function (or else the transaction might
end too early in case where only the slave sends data).
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The SAM SPI peripheral natively supports 8-16 bit word sizes via
the SPI_CSR.BITS field, but the driver rejects anything other than
8-bit with -ENOTSUP.
Remove the 8-bit-only restriction and map word_size to the BITS
field. Add 16-bit-wide fast-path transfer functions (TX, RX, TXRX)
for word sizes > 8, where each word occupies a uint16_t in the
buffer. The spi_sam_fast_{tx,rx,txrx} wrappers added in the
previous commit now dispatch to the 8-bit or 16-bit variant based
on the configured word size.
This enables MIPI DBI Type C (3-wire 9-bit SPI) displays and other
peripherals that require non-8-bit word sizes on SAM MCUs.
Tested on SAM4S with a 9-bit SPI display (ILI9806 via MIPI DBI).
Signed-off-by: Ričards Poriņš <ricards.porins@gmail.com>
Rename spi_sam_fast_{tx,rx,txrx} to *_8 to make the 8-bit nature
explicit, and introduce thin wrappers with the original names that
take a device handle and delegate to the _8 variant. Update the
callers in spi_sam_{tx,rx,txrx} to pass the device handle through.
This is a pure refactor with no functional change; it sets up the
follow-up patch that adds 9-16 bit word size support by dispatching
to a 16-bit variant inside the wrapper.
Signed-off-by: Ričards Poriņš <ricards.porins@gmail.com>
The SPI SCK pin needs to be initialized to match the current SPI
transfer CPOL setting. The SPIM peripheral is enabled after CS is
toggled, thus all pins need to be configured to drive correct
initial state using gpio. Since the SCK pin is defined in pinctrl
rather than as a gpio pin, nrfy is used to get the pin number and
set the pin rather than gpio peripheral driver.
Without this addition, CPOL=1 may cause an incorrect clock to be
registered at the start of the transfer, shifting the data 1 bit.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add target (peripheral) mode to the Espressif SPI driver. The scattered
transfer buffers are coalesced into one FIFO transfer and the received
data is scattered back on completion. Socs with the integrated SPI-DMA
use DMA, as their CPU/FIFO slave path drops the final received byte.
Also fix the controller chip-select hold to track the remaining length
so trailing zero-length buffers no longer keep the line asserted.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
To avoid MXC_SPI_Shutdown having an invalid state (for DMA channels,
specifically), add a call to initialize the internal state of the SPI
driver before calling shutdown. This avoids a bug with DMA channels being
released that shouldn't be by shutdown.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Pull the code for checking if a given peripheral has DMA channels assigned
into a shared inline function.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
To avoid accidentally sending bogus data placed into the dummy buffer
during an RX, use dedicated two-byte buffers for TX/RX each.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Add support for target mode for the MAX32 SPI peripheral, including testing
support for the APARD32690 board.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Fixes for properly setting half duplex mode for the SPI peripheral, and
handle fifo/interrupts properly for that mode of operation.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
CACHE_MANAGEMENT depends on DCACHE,
therfore we should also only select it, if it is
enabled and not just if the cache exists, as the
user could disable DCACHE and then there
would be a problem.
DCACHE btw depends on CPU_HAS_DCACHE
and is enabled by default.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
This reverts commit 8c2a903829.
Chunk transfers are now handled in spi_nrfx_spim_common.c to support
both DMM, RAM and EasyDMA limits for spim and spim_rtio drivers.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The nrfx_spim drivers need to handle transfers larger than the
internal buffers and DMA capabilities by splitting them into chunks.
Additionally, DMM and RAM buffers are mutually exclusive.
Update the common code to split the transfer internally, and update
the event callback to include the result of the transfer, since the
transfer can now fail. Update the spim and spim_rtio drivers to use
the new callback. Add new kconfig for DMM chunk size and update both
common code and kconfig to make it clear DMM and RAM buf are mutually
exclusive.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add build assert which validates that memory region has been defined
for SPIM instance if HAS_NORDIC_DMM is enabled.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Since nordic DMM has been introduced, the SPIM RAM buffer is no
longer used in case DMM is enabled. Before DMM the SPIM RAM buffer
was manually placed in the DMM linker section, now the driver
allocates a buffer from the DMM linker section dynamically instead.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
- Kconfigs in modules/ should not define configs with an SOC_ prefix.
Furthermore, these options are SDK specific, not SoC specific.
- The simplicity_sdk configs do the same.
Signed-off-by: Michael Zimmermann <michael.zimmermann@sevenlab.de>
For STM32H7, disable IRQ in RTIO when tranfer is completed to prevent
spurious IRQ to stall the system.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
For st,stm32h7-spi compatible, always use the TSIZE register and the FIFO
for polling and interrupt mode. This increases performance compared to not
using it, and it reduces code complexity. This removes the need for the
fifo-enable property.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
For st,stm32h7-spi compatibles, when fifo-enable property is set, the
driver was setting the TSIZE register with the size of each buffer in the
transaction, leading to several disable/enable of the SPI instance.
Now, it sets the complete size of the transaction without intempestive
disabling of the SPI.
To add flexibility, the FIFO threshold is now configurable from a dts
property.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This commit simplifies the flow of the STM32 SPI DMA transfer.
For the "st,stm32h7-spi" compatible, do not set the TSIZE register for a
DMA transfer (to define the size of the transfer). This setting was
leading to several disable/enable of the SPI instance in case multiple
buffers were used in the transaction, and it didn't bring noticeable
performance benefit. At the same time, do not use the SPI FIFO because
it's a hurdle to use without the TSIZE.
Rework the flow of initial operation to better match the procedure
described in the Reference Manuals.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
When waiting for DMA transfer done, wait for both TX and RX, instead of
only one of them.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Disable the EUSART transmitter and receiver immediately upon
completion of a transfer, rather than deferring it to PM Device
Runtime suspend.
The transmitter and receiver are always re-enabled as part of
configuring a new transfer.
This fixes an issue when CONFIG_PM=y where the driver would
not block deep sleep when it was idle, but would wake up with
an inconsistent internal shift register state. Safely shut down
the transmitter and receiver whenever they are not used to
avoid this scenario.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
When CONFIG_LOG_DEFAULT_LEVEL is set to 4 and SPI driver is used,
it will log debug messages idependently of CONFIG_SPI_LOG_LEVEL.
This allows disabling debug logs with the SPI log level config.
Signed-off-by: Eliott Speyser <eliott.speyser@st.com>
The spi_nrfx_spim device driver is used in nothread bootloaders, the
wake implementation waits on a k_sem, patch to poll a volatile bool
variable if CONFIG_MULTITHREADING=n
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The reworked SPIM driver passes the whole continuous chunk returned by
spi_context_max_continuous_chunk() straight to the common transfer
layer, which rejects anything larger than the controller MAXCNT with
-EINVAL. On SoCs with a small EasyDMA MAXCNT (e.g. nRF91 SPIM with 13
bits, max 8191 bytes) a transfer of 8192 bytes or more fails outright.
The old monolithic driver used to cap the chunk to the MAXCNT limit and
let the event handler walk the rest of the buffer. That behaviour was
lost in the rework, so any caller pushing a buffer larger than MAXCNT
now breaks. One example is the nRF70 firmware patch download, which
copies the patch in 8192 byte chunks and ends up corrupting RPU memory,
leading to a boot signature mismatch.
Restore the cap in transfer_start() so an oversized chunk is split
across multiple EasyDMA transfers, with the remainder handled by the
next call from the event handler once the current chunk completes.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Assisted-by: Cursor:Opus4.8
The DTS binding documents fifo-depth range as 2-256, but the
struct field is uint8_t which silently overflows 256 to 0.
Widen to uint16_t so the full hardware range is representable.
Signed-off-by: Ofir Shemesh <ofirshemesh777@gmail.com>
On SoCs with AXI GDMA, derive the DMA slot from the trigger
peripheral ID base. Flush the tx buffer and invalidate the rx
buffer around the transfer so CPU and DMA see coherent data.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
SPI_SILABS_SIWX91X_GSPI_DMA and SPI_SILABS_SIWX91X_GSPI_DMA_MAX_BLOCKS are
redundant. We can achieve the same by checking if
SPI_SILABS_SIWX91X_GSPI_DMA_MAX_BLOCKS > 0.
Then, rather than pulling the DMA if one device use it, automatically use
the DMA it exist (the user can still disable it by settings DMA_MAX_BLOCKS
== 0).
Thanks to that change, we can remove allthe #ifdef in the SPI driver.
A test in spi_siwx91x_is_dma_enabled_instance() is sufficient to make the
DMA relative functions orphans.
Then, we can enable the dma instances in the board DTS, so the user just
have to set DMA=y to enable DMA in the drivers.
The two errors cases are:
- DMA=y while referenced DMA instance in the DT is disabled. The user get
a compilation error
- DMA=n (or DMA driver is disabled) but the user explicitly set
DMA_MAX_BLOCKS > 0. The user get an error during runtime.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Until now, the SPI driver had to take care about the size of the blocks
sent to the DMA. There were several drawbacks:
- The SPI driver need to know the DMA internal parameter and the SPI
driver has configured for a specific DMA hardware block.
- For large transfer, the user has to allocate a large number of
descriptor in the SPI driver. The user had to know the DMA block size
of set the right parameter and the descriptors were duplicated with the
DMA driver (which store them in the hardware format).
However, our DMA drivers now automatically split the large blocks. So the
SPI driver no longer need to do that.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Update all drivers to use "flags" instead of "sense" when accessing
interrupt properties from device tree. This aligns with the updated
interrupt controller bindings that now consistently use "flags" as
the cell name for the IRQ type field.
Signed-off-by: Amneesh Singh <amneesh@ti.com>
