Since the RA2L1 uses the macro "ICU_EVENT" instead of
"ELC_EVENT" (which is currently used) to input into
the IELSR register, the ek_ra2l1 board cannot assign
any interrupts for any driver.
This commit aim to correct the Event macro to input correct
value for IELSR register on all the Renesas SoC by using
"BSP_PRV_IELS_ENUM" macro.
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Reintroduce the fast path that skips reconfiguring if we use the same
configuration, this fixes regression that causes a lot of latency at the
start of repeated transfers. Unfortuantely need to find alternative
workaround for S32K3 in order to do this instead of module reset, so
disable skipping for that platform.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
On some platforms, the module is not getting clocked until call to
LPSPI_MasterInit, this will be fixed soon with upcoming update to native
driver and will clock the module in driver init instead of start of
transfer, but for now, move this code within the condition check that
already exists for this purpose.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Personally I found this file hard to understand at first,
but since now it is clear to me, I decided to put these comments
with my understanding to help anyone else who needs to use these.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This fixes failures seen with the SPI loopback test.
The fix waits for the TX and RX side to be complete
i.e when RX SHIFTBUF has been loaded from the RX Shifter
and the TX SHIFTBUF has transferred to the TX Shifter.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
There are two bugs that caused regression for S32:
First there is a silicon errata specifically for the mask version on
this board that causes FIFO flush to not work as expected. The
workaround is to do a module reset before each transfer.
Second there was a division error for word size > 1 byte. The division
should be rounded up, not down, otherwise there will be an infinite
interrupt loop because the TX fifo will not be written to but the TDR
interrupt enabled causes interrupt when TX fifo is empty.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
These two fields were not being used and were a relic of some
intermediate implementation, and forgot to be removed.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The Kconfig description is wrong, this driver can be used with or
without RTIO. Also, rename the kconfig to be less confusing, as _NORMAL
is meaningless, this is the CPU/interrupt based driver.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Change the driver behavior so that if the provided RX buffer set is
bigger than the TX buffer, we will read all the RX buffer and fill the
TX with NOPs. The SPI driver API does not say to do this, and my
original interpretation of the API was that the TX length controls the
entire transfer length, but this behavior might fit better with some de
facto expectations of in tree consumers.
Also add some robustness to the calculation of how many extra bytes to fill
when tx should be nops.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This patch fixes transaction op items not performed within a single
SPI transfer. This is common for Write + Read commands, that depend on
the CS kept asserted until the end, otherwise the context will be lost.
A similar fix was applied to i2c_rtio_default on #79890.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Fixes a bug in nrfx spi when used in modes where only MOSI is needed such
as driving a WS2812. In this mode NRFX_ASSERT() is triggered when sck pin
is configured as no-connect.
Signed-off-by: Anthony Williams <anthony289478@gmail.com>
For the CPU-based drivers, delete the old MCUX based RTIO driver and use
the default RTIO submit implementation instead.
Rationale:
- 300 LOC -> 1 LOC to maintain.
- MCUX SDK based driver cannot control the chip select for the transfer
properly, but the new spi_nxp_lpspi.c driver can. So this fixes the
bug with the PCS when using RTIO.
Also enable the default RTIO implementation for DMA based driver.
In the future a DMA based RTIO driver with custom implementation can be
designed, but for CPU based transfer, which is already not optimal
performance, code maintenance is more important. Only requirement is
asynchronous submit, which is accomplished by p4wq in rtio workq.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
To fix the native hardware chip select, we need to rewrite this driver
to not use the MCUX SDK handle abstraction, which does not fit the
zephyr use case.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add functions to get remaining length in the transfer. Refactor a bit to
avoid duplicate code for the for loop that is the same as in the total
length function.
The difference between the total length and left length function is that
the current buffer total length is counted in the former and the current
buffer remaining length is counted in the latter.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add properties for describing RX and TX fifo sizes.
Also reformat some descriptions and fix the description of the
transfer-delay property which was incorrect. Since zephyr spi bufs are
not continuous, every possible Zephyr LPSPI driver must use
continuous transfer mode, for which the meaning of this delay has
nothing to do with the chip select.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This allows to configure a GPIO pin as a CS line, in order to perform
spi transfers to a particular device in the bus.
Example usage for using GPIO1.12 with GPIO_ACTIVE_LOW:
`spi cs gpio1 12 0x01`
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Make a pointer to data that is specific to a certain type of LPSPI
driver, instead of having all of it in the struct whether it is used
or not.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add DT property to configure the LPSPI instance to use tristated output
instead of retained output when PCS is negated.
Turn on the config on a couple boards for test coverage.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
If DMA-based transaction fails, usually due to a timeout, DMA channels
may need to be explicitly stopped otherwise further calls to transceive
function will immediately return due to DMA constantly being busy.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Hardware chip select is originally handled by the HAL driver. However, a
finer grained control is needed to keep CS asserted between requests and
deassert it after last request is completed. Workaround this problem by
handling hardware chip select in Zephyr driver.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
The EUSART peripheral must always be enabled in configure(), as
its enable state gets cleared when the state machine is unretained
in deep sleep. The rest of the config registers are retained,
so they can continue to not be repainted on every configure() if
the context is the same as last time.
Remove unnecessary duplicated enable at the end of configure(),
the SPIInit HAL function already performs enable.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Determine proper irq setup depending whether the spi is wrapped in an
lpflexcomm or not on an instance basis since some platforms have some
wrapped and some not.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The data size is set using a burst length, the data size for 8/16/32 is
always 1 in those cases.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The internal chip selects are limited to 4, however when using GPIOS
does not pose this limitation.
Also set internal channel to 0 if GPIOS are used.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The commit 2c3165d187 ("drivers: spi: add opaque type to encode SPI
operation flags") introduces new type for operation flag, since it is
16/32-bit depending on CONFIG_SPI_EXTENDED_MODES.
Use the new type for safe, if the function 'spi_stm32_shift_frames' may
use extended operation flag later.
Signed-off-by: Haiyue Wang <haiyuewa@163.com>
The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and
MCLK. The old devices had defined the peripheral clock enable bit at PM.
On the newer devices this was extracted on a dedicated memory section
called Master Clock (MCLK). This change excludes the dedicated bindings
in favor of a generic approach that cover all cases.
Now the clocks properties is complemented by the atmel,assigned-clocks
property. It gives the liberty to user to customize the clock source
from a generic clock or configure the direct connections.
All peripherals drivers were reworked with the newer solution.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The DMA-based path of the lpspi driver is basically
almost a driver of it's own, move it to it's own file.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
There is (almost) a whole separate driver for RTIO,
move this code to its own file and move shared code
and definitions to a common file.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Move this driver to its own subfolder to organize it
since there will be new files added for this hardware.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Updated various device definition macros to use the DT_INST variants for
consistency and improved readability.
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
Update the context state parameters when the context is already locked.
This allows changing the callback information for asynchronous
operations while the context is locked.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Fast SPIM instances (SPIM120 and SPIM121) for correct operation require
the highest frequency from the global HSFLL. This commit adds needed
clock controller requests to the driver. When the runtime device power
management is enabled, the frequency is requested as long as the SPIM
is resumed, otherwise it is requested for the duration of transfers.
This commit also adds a missing call to `pm_device_runtime_put()` when
SPIM reconfiguration fails.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Propagate bit ordering and type of CS pin to HAL layer. Previously,
the driver assumed MSB first and EUSART hardware CS control.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Implement the SPI context lock in the USART SPI driver for
EFM32/EFR32.
Remove incorrect -EBUSY error when spi_release() is called while
there are still bytes in the TX FIFO. This condition does not
cause the act of releasing the lock to fail.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Use shell_device_get_binding() instead of device_get_binding() so that
we get the device based on its name and in addition by its label.
Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
