Commit graph

240 commits

Author SHA1 Message Date
Ioannis Glaropoulos
894eca5e4f soc: arm: rename CPU_HAS_SYSTICK to CPU_CORTEX_M_HAS_SYSTICK
This commit renames the symbol CPU_HAS_SYSTICK to
CPU_CORTEX_M_HAS_SYSTICK, to look similar to all
other CPU_CORTEX_M_HAS_ options, and moves the
K-config symbol definition from arm/core/Kconfig to
arm/core/cortex_m/Kconfig.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-25 23:09:23 -07:00
Ioannis Glaropoulos
ccf90fd9c2 soc: arm: select CPU_HAS_SYSTICK in ARCH Kconfig
ARM SysTick timer is implemented by default in ARMv7-M
and Mainline ARMv8-M processors, so we include the
corresponding Kconfig symbol in arch/arm/core/cortex-M/Kconfig
and remove the selections from the Cortex-M SOCs.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-25 23:09:23 -07:00
Ioannis Glaropoulos
ce0dcea4b1 soc: arm: remove redundant CPU_CORTEX_M selection
CPU_CORTEX_M does not need to be selected by Kconfig
symbols that already select a CORTEX_M variant.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-25 23:09:23 -07:00
Habib Zaid
32367c0dfc soc: arm: stm32: Updated SRAM Region Definitions
This updates the SRAM region definition for stm32

Signed-off-by: Habib Zaid <habibzaid@gmail.com>
2019-04-24 11:06:41 -05:00
Manivannan Sadhasivam
b31adf2d33 drivers: i2c: Add STM32L1X I2C support
Add I2C support for STM32L1X SoC series based on I2C_STM32_V1
driver.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam
0525019b23 drivers: interrupt_controller: Add STM32L1X EXTI support
Add EXTI support for STM32L1X SoC series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam
1eb6177e9b drivers: gpio: Add STM32L1X GPIO support
Add GPIO driver support for STM32L1X SoC series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam
43e56a93bb soc: arm: stm32: stm32l1: Add UART support
Add UART support for STM32L1 series SoCs.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam
c8b0a8d41f drivers: clock_control: Add STM32L1X clock support
Add clock support for STM32L1X SoC series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam
92ac6d8fc6 soc: arm: st_stm32: Add STM32L1 SoC series
Add STM32L1 SoC series support with STM32L15XXB as the target
SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Erwan Gouriou
1847426f32 dts/arm/st: Add serial nodes on stm32wb
Add USART1 and LPUART1 nodes on stm32wb series.
Only these 2 ones are available for now on this series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Erwan Gouriou
eb51ea00b0 soc/arm/st_stm32: stm32wb: Add gpio support
Add GPIO support to stm32wb series.
Only ABCDE and H ports are available for now on this series.
Accordingly, update series dtsi file.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Erwan Gouriou
b11289997f drivers/clock_control: Add support to stm32wb series
Add support to stm32wb series in stm32 clock_control driver.
Ip is similar to stm32l4 one but AHB bus presacler is renamed
to "CPU1" and CPU2 and AHB4 prescalers should be defined.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Erwan Gouriou
6347b87e8f soc/arm/st_stm32: Add support for stm32wb soc
Provide basic soc configuration for STM32WB SoCs support in Zephyr.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Arnaud Pouliquen
776671c7eb drivers/interrupt_controller: stm32: add support of stm32mp1
Add support of the stm32mp1 gpio exti.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-04-19 12:05:27 -05:00
Arnaud Pouliquen
e0afd7e580 soc: stm32: add initial soc support for stm32mp1 family
Add the initial SoC support for the STM32MP1 family. The code was
tested on STM32MP157c, but should work on any STM32MP1XX currently
available.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-04-19 12:05:27 -05:00
Ulf Magnusson
7fdb525754 kconfig: Use 'default' instead of 'def_bool' in Kconfig.defconfig files
Same deal as in commit 4638652214 ("Kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), fixing new stuff that got
introduced since then.

Some symbols, like ALTERA_AVALON_PIO, are only defined in
Kconfig.defconfig files, and so need the def_bool.

Motivation (from the note at the end of
guides/kconfig/index.html#common-shorthands):

For a symbol defined in multiple locations (e.g., in a Kconfig.defconfig
file in Zephyr), it is best to only give the symbol type for the "base"
definition of the symbol, and to use 'default' (instead of 'def_<type>'
value) for the remaining definitions. That way, if the base definition
of the symbol is removed, the symbol ends up without a type, which
generates a warning that points to the other definitions. That makes the
extra definitions easier to discover and remove.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-04-18 12:20:49 -04:00
Kwon Tae-young
a7199b757d soc: st: add STM32F415RG
This commit adds support for STM32F415RG.

Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2019-04-18 11:12:16 -05:00
Alexander Wachter
78714b4ff4 boards: arm: nucleo_f746zg: Activate CAN on nucleo F746zg
This commit adds CAN support for nucleo F746zg.
Furtermore CAN was added in stm32f7.dtsi and pinmuc_stm32f7.h
CAN_RX: PD0, CAN_TX: PD1

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-04-18 09:23:20 -04:00
Georgij Cernysiov
04da64db76 drivers: serial: stm32: dts binding, and fixup for flow control
Allows to enable initial RTS/CTS hardware flow control
in the dts.

Co-authored-by: Benoit Leforestier <benoit.leforestier@gmail.com>
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
2019-04-17 16:09:54 -05:00
Josef Gajdusek
29ffcae80c drivers: usb_dc_stm32: Make pin remapping part of the device tree
The SYSCFG_CFGR1_PA11_PA12_RMP define is present even on packages where
the remap isn't strictly required. This commit makes the remap optional
based on a DT property.

Also fixes syntax error caused by a missing );.

Signed-off-by: Josef Gajdusek <atx@atx.name>
2019-04-17 09:58:09 -05:00
Anas Nashif
3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Patrik Flykt
fd42bf7443 soc: Rename reserved function names
Rename reserved function names in the soc/ subdirectory.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-04-03 17:31:00 -04:00
Erwan Gouriou
f3832a399e drivers/flash: stm32f3/stm32f1: define flash registers as volatile
On STM32F3 devices, a trick was required for normal use of registers.
This was actually an issue in flash registers defintions which should
be defined as volatile.
Fix this and additionaly, fix definition for STM32F1 which was also
lacking the volatile instruction.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-15 06:43:24 -05:00
Erwan Gouriou
70f95a25f5 soc: stm32f4: fixup: Rename UART generated DT_ defines
On stm32f4 series, uart4 is not an usart, so generated with
'st,stm32-usart' compatible and hence generated defined should be
prefixed with DT_ST_STM32_UART_ rather than DT_ST_STM32_USART.

Fixes #14542

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-15 06:39:37 -05:00
Ulf Magnusson
53376394b7 kconfig: Remove blank lines at the beginning/end of files
Maybe this is some "just in case" thing that got copied around. There's
no need to have a blank line at the beginning or end of Kconfig files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-13 07:29:42 -05:00
Erwan Gouriou
809bca4585 soc/arm/st_stm32: Add comments on Kconfig.defconfig organization
There are some implicit rules in STM32 family Kconfig.defconfig
fragments organizations.
Add comments to explicit these rules.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-06 09:38:02 -06:00
Erwan Gouriou
859b630c51 soc/arm/st_stm32/stm32l4: Factorize definition of GPIO_STM32_PORTH
GPIO port H is available on all SoCs of L4 series.
Move Kconfig GPIO_STM32_PORTH symbol deifnition to series Kconfig
fragment Kconfig.defconfig.series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-06 09:38:02 -06:00
Kumar Gala
bb6b1918b2 drivers: can: stm32: Cleanup Kconfig enablement
Follow the pattern we have for other peripherals in that if the driver
class (CAN) is enabled than enable the driver for that class
(CAN_STM32).  Also have the STM32 CAN driver depend on being on a STM32
SoC.

Remove setting of CONFIG_CAN_STM32 in any .conf files as it will get set
of CONFIG_CAN is set/enabled.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-25 10:05:21 -06:00
Piotr Zięcik
240783a229 soc: Cleanup SYS_POWER_*_SUPPORTED Kconfig options
This commit removes "select SYS_POWER_*_SUPPORTED" entries from
Kconfig on SoCs which are not implementing sys_set_power_state()
method used to control power mode.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-02-19 13:25:36 -05:00
Erwan Gouriou
82403f68e2 drivers/flash: Move STM32F3 to generic STM32 series driver
A common driver is shared between stm32 chips, which was not the case
for stm32f3 series. As a consequence stm32f3 was not maintained
equally and was missing features such as flash layout or dts based
configuration.
Besides, drivers had some flows such as wrong bus clock and
missing HSI clock activation which lead to issues on boards not
using HSI as main clock.
As a consequence this commit moves stm32f3 series flash driver to
common stm32 flash drivers.

Fixes #4197

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-19 07:45:50 -06:00
Piotr Zięcik
7a49356c77 power: Fix naming of Kconfig options controlling low power states
The SYS_POWER_LOW_POWER_STATE_SUPPORTED and SYS_POWER_LOW_POWER_STATE
suggests one low power state but these options control multiple
low power state. This commit uses plural in the names to indicate
that.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-02-12 07:46:32 -05:00
Ioannis Glaropoulos
ce4b3728ac soc: arm: stm32: select double-precision FP in STM32F769XI
SoC family STM32F769XI supports both double and single precision
floating-point unit. This commit enables double-precision by
default in this SoC.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-08 14:09:18 -06:00
Erwan Gouriou
d2e305491f soc: stm32: Convert CONFIG_RTC leftover to DT_
Convert CONFIG_RTC_0_IRQ_PRI to DT_ namespace.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-07 16:14:00 -05:00
Erwan Gouriou
3074e393db drivers/counter: stm32 rtc: Use dts to get RTC clock information
RTC clock information should be provided by dts files

Fixes #10451

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-07 16:14:00 -05:00
Erwan Gouriou
458226e1f7 drivers/counter: stm32: Provide STM32 RTC driver using counter API
Provides a STM32 RTC driver using new counter API.
Driver does not support wrap related functions (set, get, ..)

Fixes #11373

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-07 16:14:00 -05:00
Erwan Gouriou
7ae381a808 drivers/watchdog: stm32: move driver to dts based configuration
STM32 watchdog driver is now configured from device tree settings.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-01 19:16:59 -05:00
Erwan Gouriou
1a05f2fae3 soc: stm32: Extended watchdog support to all series
STM32F2, STM32F7 and STM32L0 were missing wtachdog API support.
Fix this.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-01 19:16:59 -05:00
Erwan Gouriou
a985e03349 drivers/interrupt_controller: stm32: Use LL API
exti driver implementation does not fit all SoCs because
some EXTI ip does not match stm32_exti register map provided.
Instead of providing exti register map for all SoCs, use LL API
which abstracts IP variations and enable uniform use of the drivers
on all STM32SoCs.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-01-31 03:18:36 -06:00
Georgij Cernysiov
3b77737208 soc: st: add STM32L452XC
Adds STM32 L452 soc with L452xC variant. L452 has 160 KB SRAM;
therefore, mpu mem config has been extended; IRQ number is based on
'stm32l452xx.h'.

Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
2019-01-23 03:19:15 -06:00
Erwan Gouriou
e25d6a65ac drivers/pinmux: stm32: Clean up after gpio driver factorization
Clean up a left over from GPIO driver factorization.
Definition of GPIO_REG_SIZE and GPIO_PORTS_BASE do not need anymore
to be spread accross SoCs.
Put these definitions directly in STM32 pinmux driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-01-16 08:36:09 -06:00
Song Qiang
2fb616efbe soc: arm: st_stm32: Using LL library to implement gpio functions
The original implementation of gpio functions access registers
directly. Using LL library can add a set of unifying access
functions for all series of stm32 for avoiding accessing low level
code, and improve readability.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-01-10 13:09:19 -06:00
Song Qiang
9612f9d840 soc: arm: st_stm32: Cleanup gpio function code.
All series STM32 have mostly the same GPIO architecture
and can share the same code for GPIO manipulation.
Functions of the external interrupt line control are also the same.
This patch extracts common code from them and put them into the 'common'
folder.

Functions of control GPIO of these series scattered in
soc/arm/st_stm32/stm32xx/ folders contain these functions:
stm32_gpio_flags_to_conf(), stm32_gpio_configure(), stm32_gpio_set(),
stm32_gpio_get, stm32_gpio_enable_int().
This patch merges them into the gpio_stm32.c file.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-01-10 13:09:19 -06:00
Erwan Gouriou
f5d48240e9 drivers/gpio: stm32l4: PortG[15:2] requires dedicated VDDio2
On STM32L4, 14 pins (Port G[15:2]), require external power supply.
Activate this at port G init when PWR_CR2_IOSV is defined.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-01-09 08:05:24 -06:00
Flavio Ceolin
359adfc959 soc: arm: Make statements evaluate boolean expressions
MISRA-C requires that the if statement has essentially Boolean type.

MISRA-C rule 14.4

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2019-01-07 08:52:07 -05:00
Erwan Gouriou
7f4eda501a dts: stm32f1: add uart5
Add uart5 nodes to stm32f1 series dts.
Provide matching dts_fixup add-on.

Signed-off-by: Chen Han <qq1433255094@outlook.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-01-04 10:07:54 -06:00
Loic Poulain
85b8a6b84b clock_control: stm32: Add support for MSI PLL MODE
Add support for Low Speed External 32.768 kHz oscillator (LSE ).
Add support for MSI PLL-Mode offering an automatic calibration feature
in combination with the LSE. This allows the MSI to reach an accurate
+/-0,25% clock perfectly suitable for USB full-speed clock.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2019-01-02 09:33:21 -05:00
AJ Palmer
2f04dc69c0 boards: arm: nucleo_f756zg: Created new board and soc definition
Added board definitions for nucleo_f756zg. Features include gpio,
pinmux, uart (ST Zio, ST-Link and Arduino Uno v3 interfaces).

Added basic documentation and some soc definitions for the
stm32 f756XX soc.

Signed-off-by: AJ Palmer <ajpcode@hotmail.com>
2018-12-17 11:35:27 -06:00
Aurelien Jarno
6752b5df3f drivers: flash: add driver for STM32F7x series
This patch adds a flash driver for the STM32F7x series, inspired from
the STM32F4x one. It has been tested on the STM32F723, but should also
work on other SoCs of the family.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-12-17 08:15:59 -06:00
AJ Palmer
bd8f15f555 stm32: dts: f7: added i2c4 node
Added i2c4 node to stm32f746.dtsi for stm32f74+ socs.
Added device tree fixup for i2c4.

Signed-off-by: AJ Palmer <ajpcode@hotmail.com>
2018-12-14 07:22:51 -06:00