michaelh/zephyr
1
0
Fork 0
Code Releases Activity

soc: arm: Make statements evaluate boolean expressions

Browse source 
MISRA-C requires that the if statement has essentially Boolean type.

MISRA-C rule 14.4

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This commit is contained in:
Flavio Ceolin 2018-12-17 16:15:20 -08:00 • committed by Anas Nashif
commit 359adfc959
9 changed files with 20 additions and 20 deletions
Download patch file Download diff file Expand all files Collapse all files

8
soc/arm/nxp_imx/rt/soc.c
View file

@ -133,11 +133,11 @@ static int imxrt_init(struct device *arg)
oldLevel = irq_lock();
/* Watchdog disable */
if (WDOG1->WCR & WDOG_WCR_WDE_MASK) {
if ((WDOG1->WCR & WDOG_WCR_WDE_MASK) != 0) {
WDOG1->WCR &= ~WDOG_WCR_WDE_MASK;
}
if (WDOG2->WCR & WDOG_WCR_WDE_MASK) {
if ((WDOG2->WCR & WDOG_WCR_WDE_MASK) != 0) {
WDOG2->WCR &= ~WDOG_WCR_WDE_MASK;
}
@ -147,12 +147,12 @@ static int imxrt_init(struct device *arg)
| RTWDOG_CS_UPDATE_MASK;
/* Disable Systick which might be enabled by bootrom */
if (SysTick->CTRL & SysTick_CTRL_ENABLE_Msk) {
if ((SysTick->CTRL & SysTick_CTRL_ENABLE_Msk) != 0) {
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
}
SCB_EnableICache();
if (!(SCB->CCR & SCB_CCR_DC_Msk)) {
if ((SCB->CCR & SCB_CCR_DC_Msk) == 0) {
SCB_EnableDCache();
}

4
soc/arm/st_stm32/stm32f0/soc_gpio.c
View file

@ -27,7 +27,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
int direction = flags & GPIO_DIR_MASK;
int pud = flags & GPIO_PUD_MASK;
if (!pincfg) {
if (pincfg == NULL) {
return -EINVAL;
}
@ -88,7 +88,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
int pval = 1 << (pin & 0xf);
if (value) {
if (value != 0) {
gpio->odr |= pval;
} else {
gpio->odr &= ~pval;

4
soc/arm/st_stm32/stm32f1/soc_gpio.c
View file

@ -29,7 +29,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
{
int direction = flags & GPIO_DIR_MASK;
if (!pincfg) {
if (pincfg == NULL) {
return -EINVAL;
}
@ -140,7 +140,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
int pval = 1 << (pin & 0xf);
if (value) {
if (value != 0) {
gpio->odr |= pval;
} else {
gpio->odr &= ~pval;

4
soc/arm/st_stm32/stm32f2/soc_gpio.c
View file

@ -27,7 +27,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
int direction = flags & GPIO_DIR_MASK;
int pud = flags & GPIO_PUD_MASK;
if (!pincfg) {
if (pincfg == NULL) {
return -EINVAL;
}
@ -88,7 +88,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
int pval = 1 << (pin & 0xf);
if (value) {
if (value != 0) {
gpio->odr |= pval;
} else {
gpio->odr &= ~pval;

4
soc/arm/st_stm32/stm32f3/soc_gpio.c
View file

@ -28,7 +28,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
int direction = flags & GPIO_DIR_MASK;
int pud = flags & GPIO_PUD_MASK;
if (!pincfg) {
if (pincfg == NULL) {
return -EINVAL;
}
@ -90,7 +90,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
int pval = 1 << (pin & 0xf);
if (value) {
if (value != 0) {
gpio->odr |= pval;
} else {
gpio->odr &= ~pval;

4
soc/arm/st_stm32/stm32f4/soc_gpio.c
View file

@ -28,7 +28,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
int direction = flags & GPIO_DIR_MASK;
int pud = flags & GPIO_PUD_MASK;
if (!pincfg) {
if (pincfg == NULL) {
return -EINVAL;
}
@ -88,7 +88,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
{
struct stm32f4x_gpio *gpio = (struct stm32f4x_gpio *)base;
if (value) {
if (value != 0) {
/* atomic set */
gpio->bsr = (1 << (pin & 0x0f));
} else {

4
soc/arm/st_stm32/stm32f7/soc_gpio.c
View file

@ -28,7 +28,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
int direction = flags & GPIO_DIR_MASK;
int pud = flags & GPIO_PUD_MASK;
if (!pincfg) {
if (pincfg == NULL) {
return -EINVAL;
}
@ -88,7 +88,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
{
struct stm32f7x_gpio *gpio = (struct stm32f7x_gpio *)base;
if (value) {
if (value != 0) {
/* atomic set */
gpio->bsrr = (1 << (pin & 0x0f));
} else {

4
soc/arm/st_stm32/stm32l0/soc_gpio.c
View file

@ -27,7 +27,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
int direction = flags & GPIO_DIR_MASK;
int pud = flags & GPIO_PUD_MASK;
if (!pincfg) {
if (pincfg == NULL) {
return -EINVAL;
}
@ -88,7 +88,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
int pval = 1 << (pin & 0xf);
if (value) {
if (value != 0) {
gpio->odr |= pval;
} else {
gpio->odr &= ~pval;

4
soc/arm/st_stm32/stm32l4/soc_gpio.c
View file

@ -54,7 +54,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
int direction = flags & GPIO_DIR_MASK;
int pud = flags & GPIO_PUD_MASK;
if (!pincfg) {
if (pincfg == NULL) {
return -EINVAL;
}
@ -115,7 +115,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
struct stm32l4x_gpio *gpio = (struct stm32l4x_gpio *)base;
int pval = 1 << (pin & 0xf);
if (value) {
if (value != 0) {
gpio->odr |= pval;
} else {
gpio->odr &= ~pval;