This is mostly resulting from the recent change to new integer types.
Change-Id: I16aa4ca645c24d682667985de14687a7dc360b2f
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This should fix the grouping for debugging options appearing in the
main "menuconfig" menu.
Change-Id: I7ddf3a6f3d025bf82ba63099b30e47a40d7c3187
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
With recent changes we now have both SAME70 and SAM3X under
SOC_FAMILY_SAM so we need to limit the watchdog driver only to SAME70 as
it only builds there right now.
Change-Id: I4a7c90247ad22532b2384ca536cfb0cbd65186f9
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We're moving the project code to GitHub folks, so change references
in the documentation from gerrit over to GitHub:
https://github.com/zephyrproject-rtos/zephyr
Change-Id: Ic491a62ed43fc799eb5698e92435cb6eb4d89394
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Per Anas, remove references to the pre-1.5 release documentation
Archived content is still accessible if you know where it is:
https://www.zephyrproject.org/doc/1.3.0/ (for example)
Change-Id: Ia17c9ff04a76b86516f804794d6e3adb1cc2980d
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Converted Stellaris UART driver over to utilize device tree generated
defines. Added a yaml description for the uart, and converted over the
ti_lm3s6965 SoC & qemu_cortex_m3 board port over to utilize it.
Change-Id: Ie20844eb63d2c68eb59ad4160f7f5b5a35e2943b
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a simple device tree for the TI lm3s6965 SoC and QEMU
Cortex-M3 board port. We get flash and memory base addresses and sizes
from the device tree as well as the ARM NVIC number of priority bits.
Change-Id: I4452b5543de7be55518997e54837ccbfd4f121df
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There isn't any reason to export the uart_stellaris_isr function, so
lets make it static and remove the associated header file.
Change-Id: I3a131b584d9d6fb6279a1503512668a71510dd4d
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
As disco_l475_iot1 is default board for HTS221 sample
application, provide default boards settings to get
application functional once it is delivered.
Change-Id: Ie4957538db679d076713550c1555954a6a20d3e2
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This driver implements an I2C interface by driving two GPIO lines under
software control.
Change-Id: Ie49cc67aed6acb30086ee851041fe2470da241cf
Signed-off-by: Jon Medhurst <tixy@linaro.org>
This library implements the I2C single master protocol in software.
It supports the Standard-mode and Fast-mode speeds and doesn't support
optional protocol feature like 10-bit addresses or clock stretching.
Change-Id: I375d572a83714522421f2967dc414b3bec169e95
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Clean-up the pinmux header as a preparatory work before adding more
pinmuxes.
This is achieved by the following two actions:
- Reorder the defines by increasing GPIO order to make it
easier to add more pinmux over time while avoiding a huge mess
- Use tabs to align
Change-Id: I07d9ae28f61287748d33dcf638dcbf2e6865517b
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Reorder config entries alphabetically to make it easier to add new ones.
Change-Id: Ib118405a150a408638232513fba7198b458ecfa7
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Now that all the nRF based board/SoCs have device trees, we can remove
the Kconfig bits that are now coming from device tree.
Change-Id: Ia1a870a50582d4109070d2833660f58fd6f8691f
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add device tree support for nRF51822 SoCs and Arduino 101-BLE,
Curie-BLE, BLE Nano, PCA10028-DK, and Quark-SE BLE boards. This
is minimal support for memory, flash, and UART.
Change-Id: I7e572bea537e384b6d66e520462f023ace0c9b35
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add device tree support for nRF52840 SoC and PCA10056-DK board. This
is minimal support for memory, flash, and UART.
For the nRF52840 we select between "nordic,nrf-uarte", "nordic,nrf-uart"
support for each board.
Change-Id: I1c377e0cb97ff4716ea5489fffaa7c0e2b34d18a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fixup the nRF52840-QIAA to allow getting its SRAM & FLASH sizes from
device tree.
Change-Id: I67ecd7da5f0472402064f158030d9f97f49d7d20
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add device tree support for Nitrogen 96board, BLE Nano 2, and
nRF52-PCA10040 DK boards. This is minimal support for memory, flash,
and UART.
For the nRF52832 we select between "nordic,nrf-uarte", "nordic,nrf-uart"
support for each board.
Change-Id: Ia247b9b710a72416e9ab0de3ca1429bfab8917f8
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit provides support for disco_l475_iot1 board
Pinmux driver is provided with initial support definitions
Change-Id: I17b637a8ba0b033014969eca8fffe76319c47c52
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
We don't use __scs or __scp anymore so we can remove the related linker
script and various defines and such associated with them.
Change-Id: Ibbbe27c23a3f2b816b992dfdeb4f80cf798e0d40
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Nothing calls _ScpMainOscEnable, so lets remove it and associated files
that aren't used anymore.
Change-Id: Ibe900d039c531c4da56baa673d309ee961b09e52
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In order to allow the use of such board, a very preliminar port was
developed. It consists of board files, as well as pinmux, uart, gpio,
spi drivers and device tree files.
Change-Id: I5753064e39e0b023cf4481744c176de26d8dbebb
Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The CC3200 doesn't have on chip flash, so we should be including it in
the dts.
Change-Id: I8d4bbe2b09ed1aa563efe4c979da1f4729b93534
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Cleanup soc code to enable UART_MCUX_LPSCI to support UART0.
Change-Id: I173febffcffc902f228946124e0434f122a67607
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds a shim layer around the mcux lpsci driver to adapt it to the Zephyr
serial interface.
Change-Id: I024f1605e3194f34bb57e8a121900e05b3085a82
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for STM32L475xG SoC as a preliminary for
Discovery IOT board support.
stm32l476.dtsi file is now including stm32l475.dtsi
since STM32L476 SoC is a STM32L475 SoC with LCD support
Change-Id: I7567255e4172231cbf4899474617ecae0cd68d64
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commits align CONFIG_ factor names between stm32f4 and stm32l4
series to enable code factorization such as use of Q_DIVISOR.
Though, it does not concatenate kconfig sections as we might use
a bit of time to see what is needed in this regard
Change-Id: Ia603406d53949abf5675b801a5448397d5ab8462
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Small code refactorisation in order to ease up coming
support of stm32f1 series by stm32 commom clock control
driver
Change-Id: I486cfba137cd048d65f0732e10aa29d877bb03e5
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following activation of stm32 common clock driver for stm32f4 series
remove references to stm32f4 specific driver.
Change-Id: I372a0ea046007bcb34944d6b2b8880077583b1d3
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit disables native stm32f4x clock control
driver and enables stm32 LL clock control driver
for stm32f4 family
Jira: ZEP-2039
Change-Id: I98ba6c89c4a3a1f39658c5808cd47a2d1f344130
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit provides CONFIG_ definitions to support
LL based clock driver on stm32f4 boards:
96b_carbon
nucleo_f401re
nucleo_f411re
This commit sticks to clock configurations previously defined.
Two changes to notice:
-HSE clock value should now be defined
-Prescaler values required as "1" should now be set to "1" instead
of "0".
Change-Id: I003bd226f198217d5e266e11fe37094773c1c62c
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following update of LL clock driver to suport F4 series,
update dma driver to support LL clock driver API.
Change-Id: Ic8ecfe4f33109204f3b5f8c22bcb9c41de81531d
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit enables STM32Cube LL based driver for stm32f4 series.
This generic driver provides a unified API to clock driver for all
stm32 series.
LL API allows driver to be lightweight and to keep genericity across
stm32 family to ease further devlopment and maintenance.
Change-Id: Ie31ae8f433313787f9c9eda77de41925721d54dd
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Added some review changes suggested by TI-er Bill Mills.
Jira: ZEP-1958
Change-Id: I892f22a5740ae7ae4dc949bc72de366e0e85d03c
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
This board is being replaced by the CC3220SF LaunchXL,
which has essentially the same peripheral map, 256Kb
of SRAM, but in addition has 1Mb of on-chip secure flash.
Jira: ZEP-1958
Change-Id: I80629474cab9ce41bce3903213f5c9f148cc138a
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
This to align with previous patch:
"dts: Align uart "baud-rate" property to device tree spec "current-speed""
Jira: ZEP-1958
Change-Id: I65328cf63e25b0378f270b5f60deb9d6a1f49b8c
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
This replaces the cc3220s_launchxl board with the cc3220sf_launchxl
board directory.
Jira: ZEP-1958
Change-Id: I550061319d458d6ba694dbf26082f14666dd150e
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
CC3220SF_LAUNCHXL effectively replaces the CC3200_LAUNCHXL,
with support for the CC3220SF SoC, which is an update for
the CC3200 SoC.
This is supported by the Texas Instruments CC3220 SDK.
Jira: ZEP-1958
Change-Id: I2484d3ee87b7f909c783597d95128f2b45db36f2
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The CC3220SF is a replacement for the CC3200 SoC, comprising
a network coprocessor and Cortex-M4 MPU.
This leverages the CC3220 SDK driver peripheral library in ROM,
and some files built from ext/hal/ti/.
Jira: ZEP-1958
Change-Id: I892b212c178e05d84ff1d716dde593ced653ae6d
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Devicetree.org specifies that serial devices property used to set
baud rate is "current-speed", while zephyr uses "baud-rate".
Align property name in order to keep zephyr dts files compatible
with device tree specification and could be re-used from/to
Linux for instance. We also cleanup a few SoCs that set "baud-rate" in
the SoC dts and not the board.
Jira: ZEP-2048
Change-Id: I097e7439ee46fe77c628b56531772950382fafcc
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This in preparation for adding a cc3220sf DTS file, which
has a different address for sram0 than the cc3200.
Also moved baud-rate out of soc dtsi file to board dts.
Jira: JEP-1958
Change-Id: I641452c0a8a6d1ad4424e132d6ef2de71d8545b4
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Update Cube version for STM32F1XX family
from version: V1.14.0
to version: V1.15.0
Add support for Low Level API on stm32f1 family
Change-Id: I8cb5fe2fd94be3a320e863c7b5ed59e4c2312e87
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The highest endpoint number supported by the STM32F4xx USB device
controller is 3. Change the cdc_acm driver to use endpoint 2
instead of endpoint 4 so that it will work with this platform.
Change-Id: I4a3cd08f546a7fe01558528de0990156f642d93b
Signed-off-by: Christer Weinigel <christer@weinigel.se>
This fixes ZEP-1955. The issue was that the interrupt stack frame only
allocates 4 registers. This means that if any window overflow happens,
only 4 registers can be saved. This implies that the interrupt handler
can not call functions other than using call4. If this rule is not
honored, then it will result in the registers being overwriting other
context information and thus a stack corruption.
The fix consists on using call4 for calling even t logger function,
which is by the way more optimal as the interrupt handler does not need
to save more than 4 registers when these functions are called.
Issue: ZEP-1955
Change-Id: Iacea626443d1d61d95a52253ac8ff15fc3722d2c
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
The installation instructions for Ubuntu 16.04
needed to be updated to use the correct packages
rt:40021
Change-Id: Ia6bfb66b7d24dda2556b76a495988eea20037607
Signed-off-by: Jessica Wagantall <jwagantall@linuxfoundation.org>
