Now that MbedTLS is capable of automatically enabling
CONFIG_ENTROPY_GENERATOR (when available), we can remove forced
enablements in boards|soc deconfig files.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
This is based on the introduction of a helper Kconfig symbol in
"subsys/random/Kconfig" which is named CSPRNG_AVAILABLE. When this is
enabled it means that there is a "zephyr,entropy" property defined in the
device-tree, therefore Mbed TLS can select ENTROPY_GENERATOR to allow
the platform specific driver to be included into the build.
This commit also changes other locations where CSPRNG_ENABLED was used
moving it to CSPRNG_AVAILABLE in order to solve dependency loop
build failures.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Creation of the new zephyr\soc\nxp\common\nxp_nbu.c driver which manage
the interruption of the NBU. This modification is mandatory to support a
coex application which includes Bluetooth and 802.15.4 on the same
narrow band path.
Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
Wakeup pin indices are 1-based, but `LISTIFY` is 0-based. Consequently, the
last element of the pin-to-register-bit lookup table was never populated.
Signed-off-by: Samuel Coleman <samuel.coleman@rbr-global.com>
BICR (Board Information Configuration Registers) are located within the
application UICR region (ref. MRAM mapping, table 38).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Enable CONFIG_HAS_MCUX_IGPIO because device driver CONFIG_GPIO_MCUX_IGPIO
depends on it, so that the driver can be enabled by dts nodes.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
LinkServer can flash only the first time, cannot flash again.
Fix it by setting default mcu security status as unsecure.
Signed-off-by: Michal Smola <michal.smola@nxp.com>
nRFs exposes now all power domains, following their actual name in the
specification. Add support for all of them in the GPD service. Note that
this is a breaking change: running this code requires a new SCFW as IDs
have changed in nRFs and so SCFW.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The clock controller/manager registers are updated with
the correct divider values by bootloader via hand-off
data, so now we can use the clock controller to get the
clock value of each peripheral during the run time.
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
CMakeLists.txt uses the C compiler parameter -include,
This is causing issues for other toolchains and needs to generalized.
Signed-off-by: Robin Kastberg <robin.kastberg@iar.com>
Updates for AMP targets
- use common AMP Kconfig
- update APPCPU linker script
- place AMP common area in the reserved space
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Multiple AMP related updates:
- use common AMP Kconfig
- rework the APPCPU linker script
- use MCUboot image format for APPCPU image
- fix multi-processing startup code
Signed-off-by: Marek Matej <marek.matej@espressif.com>
This is the initial commit to support pinctrl driver for Renesas RZ/G3S
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
This adds minimal support for a new SoC Renesas RZ/G3S
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
LJ packages have 16 ADC channels vs 8 for SZ packages. Enhance
devicetree to account for this as well as conditional defines/code.
Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
Due to Apollo3's internal bootloader, zephyr build is not able
to create correct flash address on linker.cmd while using
mcuboot. The PR configures flash-controller start address
to solve this problem.
Test board: rakwireless/rak11720
Test project: samples/subsys/mgmt/mcumgr/smp_svr
Signed-off-by: Sercan Erat <sercanerat@gmail.com>
Rename "nxp,kinetis-lpuart" compatible to "nxp,lpuart" to remove the
device family from its name.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Logging with STMESP frontend is using custom logging header feature.
Put that specific header file in a custom path which is added to the
build only if that logging frontend is used.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Combine BLE and 802.15.4 monolithic build under a single config to make
it less error prone.
The choice between a BLE/802.15.4 combo firmware and a BLE only firmware
is done depending on the Soc (like RW610 vs RW612).
Signed-off-by: Axel Le Bourhis <axel.lebourhis@nxp.com>
Add 'turbo' logging feature. When enabled, short logs (no argument
or one numeric, 32 bit argument) are handled in a special way that
is much faster than the default one (5-10x faster). Additionally,
there is an option to remove all other logs from the system which
allows to not include almost any logging framework code in the
binary (~170 bytes of code is needed). It may be especially
valueable for memory constraint targets (ppr, flpr) where with
only 170 byte of code (+code for each log message) we can provide
limited formatted string logging support.
'Turbo' logging is using following to achieve that:
- logging strings are put into a memory section and additional
memory section is created which holds addresses of those strings.
Index in that array is used to identify a string (32 bit address
is encoded into a smaller number, 15 bits is more than enough).
This index is used for a STMESP register set (there are 2^16
available). So STMESP channel encodes string.
- Logging level is stringified and prepended to a string
- Source ID is encoded by using DM16 (so far not used).
- Log without arguments is written as DMTS16
- Log with one argumetn is written as DM16+DMTS32
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
This workaround will be replaced with a variant
executed at SystemInit() level, once MDK implements it.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
- Adds a flash runner configuration for mcxn/c/a/w
used for sysbuild multi-image projects.
- Solves sysbuild issue with multiple resets and mass erases.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
smp_log usage should be only used when SMP is enabled.
This is currently causing build issues after the fix
provided by #82377
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add CONFIG_MRAM_LATENCY_AUTO_REQ. When option is enabled then module
requests no latency during the initialization. This option might be
useful for cases where we want to achieve maximum performance and
want to avoid controlling MRAM in the code.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Replaces hard-coded memory addresses and sizes with macros that retrieve
such values from the device tree.
Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
On NXP RT1170 SOC, ADC ETC exists but it can not be enabled because
of dependency on HAS_MCUX_ADC_ETC.
Also, ADC ETC should only work with ADC together, there is no use
case to run it standalone.
Fixes:#81466
Signed-off-by: Raymond Lei <raymond.lei@nxp.com>
In the IOMUXC controller, the PDRV field uses 0b0 to set the pin drive
to high, and 0b1 to set the pin to normal drive. Fix the pinctrl_soc.h
definitions for the iMXRT11xx parts to use the correct setting for this
register, based on the documentation for the pin control binding
Note that for PDRV type pins, this commit effectively switches their
drive strength setting.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Following the binding rename to "nxp,sysmpu", update the Kconfig
option to align with the binding name and to better reflect the
option's purpose.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The MT8196 device has a newer interrupt controller that acts like the
legacy ones once initialized (see intc_mtk_adsp.c). But it has some
(only slightly) more complicated routing control that must be
initialized on reset, as the default is "don't deliver any interrupts
at all". Previous versions of the device integration worked becuase
they relied on a SOF binary to be loaded at boot, but obviously that
doesn't work for a Zephyr-based SOF firmware image.
Signed-off-by: Andy Ross <andyross@google.com>
This driver forgot to enable its interrupt, but has been working
becuase Zephyr apps were always run in a context where the interrupt
controller had been initialized by a SOF binary at boot.
Signed-off-by: Andy Ross <andyross@google.com>
This got missed. Set it correctly for hygiene, though very few things
use it. There is a spot in SOF where it's helpful to have a number for
"fasted cpu clock rate" and this is the best candidate.
Signed-off-by: Andy Ross <andyross@google.com>
I thought I was being clever letting the linker place the entry point
arbitrarily (since the hardware can set it to any value).
But it turns out that the upstream Linux SOF loader code is hard-wired
to start the DSP only at the first byte of SRAM, always, no matter
what entry point is listed in the rimage file. So until/unless this
is fixed, we need to add a trampoline at the start of SRAM (and
frustratingly that needs to be 1024 bytes long becuase of the
alignment requirements of the vector table that follows it, sigh...)
Signed-off-by: Andy Ross <andyross@google.com>
This is mostly a cut/paste copy of similar code in intel_adsp and imx,
which sadly can't be shared given the way the design works. Also
includes a bonus, slightly-passive-aggressive description of why that
is.
Signed-off-by: Andy Ross <andyross@google.com>
