soc: arm: nordic: handle nRF52832 anomaly 109
Enable workaround for anomaly 109 by default when affected peripherals are enabled. Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
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@ -487,6 +487,13 @@
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#define NRFX_WDT1_ENABLED 1
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#endif
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#ifdef CONFIG_NRF52_ANOMALY_109_WORKAROUND
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#define NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1
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#define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1
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#define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1
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#define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1
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#endif
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#if defined(CONFIG_SOC_SERIES_BSIM_NRFXX)
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#include "nrfx_config_bsim.h"
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#endif
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@ -14,3 +14,11 @@ zephyr_library_include_directories(
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if(CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 AND CONFIG_SPI_NRFX_SPIM)
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message(WARNING "Both SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 and an NRF SPIM driver are enabled, therefore PAN 58 will apply if RXD.MAXCNT == 1 and TXD.MAXCNT <= 1")
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endif()
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if(CONFIG_SOC_NRF52832)
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if(NOT CONFIG_NRF52_ANOMALY_109_WORKAROUND)
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if (CONFIG_NRFX_SPIS OR CONFIG_NRFX_SPIM OR CONFIG_NRFX_TWIM OR CONFIG_NRFX_PWM)
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message(WARNING "NRF52_ANOMALY_109_WORKAROUND disabled with SPIS, SPIM, TWIM or PWM enabled. This will occasionally cause the first byte transmitted to be incorrect")
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endif()
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endif()
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endif()
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@ -129,4 +129,15 @@ config NRF52_ANOMALY_198_WORKAROUND
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This anomaly applies to IC revisions "Engineering B" up to "3", the most
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recent one.
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config NRF52_ANOMALY_109_WORKAROUND
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bool "Anomaly 109 workaround"
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default y
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depends on SOC_NRF52832
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depends on NRFX_SPIS || NRFX_SPIM || NRFX_TWIM || NRFX_PWM
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help
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Due to Anomaly 109 the first byte sent out by these peripherals is
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sometimes wrong. This occurs when the system enters IDLE and stops the
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64MHz clock at the same time as the peripheral that is using DMA is started.
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This anomaly applies to IC revisions up to "3", the most recent one.
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endif # SOC_SERIES_NRF52X
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