map_reg() depends on args global variable for knowing it should
load a new firmware or just stand by for logging or Zephyr
shell. The map_regs() code is the very first step to access the
DSP memory, it nees to be shareable if the code is to be accessed
from another python module.
Signed-off-by: Jyri Sarha <jyri.sarha@linux.intel.com>
Do not force argsparse code to all modules importing cavstool.py. The
commit moves argparse code into a separate function, and calls it from
'if __name__ == "__main__":'. Also adds the argsparse call to to
acetool.py that shares cavstool code with the argument parsing.
Signed-off-by: Jyri Sarha <jyri.sarha@linux.intel.com>
Add resource_table section in linker script for i.MX8QXP and
i.MX8QM, for inter-process communication.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Add virtual Cortex R8 SoC. This target does not represent a real SoC,
but can be easily run in Renode.
This will allow to easily test basic architecture support.
Signed-off-by: Krzysztof Sychla <ksychla@antmicro.com>
Signed-off-by: Marek Slowinski <mslowinski@antmicro.com>
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
Signed-off-by: Mateusz Hołenko <mholenko@antmicro.com>
Add support for BeaglePlay, a TI AM6254 SoC based development board with a
CC1352P7 wireless microcontroller for supporting software defined 2.4GHz
and SubGHz wireless protocols. Support for running Zephyr on the
quad-A53 SoC or the programmable M4 on the SoC would be provided
separately.
See https://beagleplay.org for details.
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
Add DT node and clocking of TPM peripherals, which are used for PWM.
Also change the soc clock enable code to not use preprocessor
conditionals.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Base enablement of MCXW merged while z_arm_platform_init was being
deprecated, resulting situation is now that no platform init is
happening, fix by converting to use soc_reset_hook.
Also fix a comment that said the core was being set to 40 MHz, when it
is actually being set up to 96 MHz.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
It is a good practice to add a comment after #endif when the condition
is not obvious. However, when the condition is well known, "Don't Repeat
Yourself" rule applies and no comment should be added.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Most of the Kconfig files in soc/silabs start with a comment describing
the chip. This comment is redundant with the help message in associated
to the chip. Let's don't repeat ourselves.
This patch also ensure the Kconfig help message the full name the chip.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Allows selecting the forward GPIO pins to network core Kconfig
option and enables it by default if the node exists in devicetree
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Add a function which can be used to remap embedded device address,
into addresses which can be used in the simulated native boards.
For the nrf_bsim boards we provide an actual implementation.
For other boards, we provide an optional dummy version which does
nothing.
It is up to each board implementation to decide if they want to
provide one or use the dummy.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Update HAL for Series 2 devices to Simplicity SDK 2024.6.
This HAL deprecates sl_device_init_emu(). Equivalent functions
are now performed by sl_power_manager_init().
For now, soc.c remains compatible with both the Gecko SDK based
HAL for Series 0 and 1, and the Simplicity SDK based HAL for
Series 2. In a future commit, soc.c will be split between the
two platforms.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
- Added `cs-supported` property to nrf-radio devicetree
- Added `HAS_HW_NRF_RADIO_CS` Kconfig option which is set if
`cs-supported` property is enabled
- Enabled `cs-supported` property for nrf54-series devices
- Disabled `cs-supported` on nrf54l15bsim because it is not
yet supported
Signed-off-by: Ivan Iushkov <ivan.iushkov@nordicsemi.no>
Add the necessary entries but keep the usbhs disabled by default on
radio core (it is enabled by default on app core).
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
- Add jlink as possible runner for cyw920829m2evk_02 platform in
board.cmake file
Signed-off-by: McAtee Maxwell (CSS ICW SW MTO INT 2) <maxwell.mcatee@infineon.com>
DBGMCU clock handling was not optimal.
If it exists, enable it before dealing with debug configuration in one
block, then deactivate it after in another block.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Similarly to debug in stop mode, enable debug in sleep mode on H7 series,
as initially described by `STM32_ENABLE_DEBUG_SLEEP_STOP` option.
Not extending it further to other series as I won't be able to test.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
# Conflicts:
# soc/st/stm32/common/soc_config.c
HAL_Enable/DisableDBGStopMode() was one of the last usage of HAL
definitions from Legacy HAL APIs.
Use LL instead to harmonize code across series and remove this dependency.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Update RT5xx and RT6xx clock init to add the code
to set the I3C dividers. This code has been moved
from the I3C driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Renamed soc from ace30_ptl to ace30.
We were previously using the wrong soc name.
The correct name is ace30.
There is only one ptl platform, but there can be several ace30 platforms.
Signed-off-by: Grzegorz Bernat <grzegorzx.bernat@intel.com>
No functional changes were made in this update.
Only code formatting issues were corrected.
This commit is necessary to preserve Git history
continuity for future changes involving the switch from ace30_ptl to ace30.
Signed-off-by: Grzegorz Bernat <grzegorzx.bernat@intel.com>
This reverts parts of commit c344771d8b
related to intel_adsp soc.
There is a dependency on device initialization that was missed.
Reverting until we have a proper way for migrating to hooks.
Fixes#78880
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Reverts bus clock settings. Follows MCUXpresso SDK clock settings, and
sets to output of SysPLL2 PFD3 at 198 MHz.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
These static functions in the `pma.c` are used only when
`CONFIG_NOCACHE_MEMORY` is enabled, so guard them accordingly.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Provide symbols for the creation of dynamic memory pool.
Update the ROM-code SRAM usage according the IDF main.
Fix static allocations size check.
Increase iram_seg memory size for MCUboot.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Provide symbols for the creation of dynamic memory pool.
Fix the loader ROM buffers start address.
Fix static allocation size check.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Add the `CONFIG_ESP_RUNTIME_HEAP` kconfig.
This allows the memory pool to be created starting
at `z_mapped_end` ending at `_heap_sentry`.
Added choice symbol ESP_WIFI_HEAP_* to select which
heap to use in the ESP WiFi adapter module.
Add file heap.c with code to initialize the runtime heap.
Size of the pool is checked during the runtime.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
This lets the SoC to select the correct kconfigs to show that
it supports coredump, and with the ability to dump privilege
stack.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Currently the RAM allocated for the bootloader is not
enough to use MCUBoot with crypto signatures.
This commit bumps the #defines accordingly to fix
compile errors with ecdsa_p256 and RSA.
Signed-off-by: Brandon Allen <brandon.allen@exacttechnology.com>
