drivers: timer: ambiq: add clock source selection for stimer
Add clock source selection for stimer and make it configurable Signed-off-by: Hao Luo <hluo@ambiq.com>
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13 changed files with 73 additions and 5 deletions
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@ -4,6 +4,9 @@
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if BOARD_APOLLO3_EVB
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 32768 if AMBIQ_STIMER_TIMER
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config LOG_BACKEND_SWO_FREQ_HZ
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default 1000000
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depends on LOG_BACKEND_SWO
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@ -85,6 +85,10 @@
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};
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};
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&stimer0 {
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clk-source = <3>;
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};
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&bleif {
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pinctrl-0 = <&bleif_default>;
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pinctrl-names = "default";
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@ -4,6 +4,9 @@
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if BOARD_APOLLO3P_EVB
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 32768 if AMBIQ_STIMER_TIMER
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config LOG_BACKEND_SWO_FREQ_HZ
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default 1000000
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depends on LOG_BACKEND_SWO
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@ -85,6 +85,10 @@
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};
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};
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&stimer0 {
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clk-source = <3>;
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};
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&bleif {
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pinctrl-0 = <&bleif_default>;
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pinctrl-names = "default";
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@ -4,6 +4,9 @@
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if BOARD_APOLLO4P_BLUE_KXR_EVB
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 32768 if AMBIQ_STIMER_TIMER
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config LOG_BACKEND_SWO_FREQ_HZ
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default 1000000
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depends on LOG_BACKEND_SWO
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@ -131,6 +131,10 @@
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};
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};
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&stimer0 {
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clk-source = <3>;
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};
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&xo32m {
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pinctrl-0 = <&xo32m_default>;
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pinctrl-names = "default";
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@ -4,6 +4,9 @@
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if BOARD_APOLLO4P_EVB
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 32768 if AMBIQ_STIMER_TIMER
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config LOG_BACKEND_SWO_FREQ_HZ
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default 1000000
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depends on LOG_BACKEND_SWO
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@ -149,6 +149,10 @@ compatible = "ambiq,adc";
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};
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};
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&stimer0 {
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clk-source = <3>;
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};
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zephyr_udc0: &usb {
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vddusb33-gpios = <&gpio96_127 7 (GPIO_PULL_UP)>;
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vddusb0p9-gpios = <&gpio96_127 5 (GPIO_PULL_UP)>;
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11
boards/rakwireless/rak11720/Kconfig.defconfig
Normal file
11
boards/rakwireless/rak11720/Kconfig.defconfig
Normal file
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@ -0,0 +1,11 @@
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# RAKWIRELESS RAK11720 Board configuration
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# Copyright (c) 2024 RAKwireless Technology Co., Ltd. <www.rakwireless.com>
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# Sercan Erat <sercanerat@gmail.com>
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_RAK11720
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 32768 if AMBIQ_STIMER_TIMER
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endif # BOARD_RAK11720
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@ -61,6 +61,10 @@
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};
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};
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&stimer0 {
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clk-source = <3>;
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};
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&bleif {
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pinctrl-0 = <&bleif_default>;
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pinctrl-names = "default";
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@ -31,6 +31,8 @@
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#define TIMER_IRQ (DT_INST_IRQN(0))
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#define TIMER_CLKSRC (DT_INST_PROP(0, clk_source))
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#if defined(CONFIG_TEST)
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const int32_t z_sys_timer_irq_for_test = TIMER_IRQ;
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#endif
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@ -184,10 +186,10 @@ static int stimer_init(void)
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#if defined(CONFIG_SOC_SERIES_APOLLO3X)
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am_hal_stimer_config((oldCfg & ~(AM_HAL_STIMER_CFG_FREEZE | CTIMER_STCFG_CLKSEL_Msk)) |
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AM_HAL_STIMER_XTAL_32KHZ | AM_HAL_STIMER_CFG_COMPARE_A_ENABLE);
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TIMER_CLKSRC | AM_HAL_STIMER_CFG_COMPARE_A_ENABLE);
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#else
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am_hal_stimer_config((oldCfg & ~(AM_HAL_STIMER_CFG_FREEZE | STIMER_STCFG_CLKSEL_Msk)) |
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AM_HAL_STIMER_XTAL_32KHZ | AM_HAL_STIMER_CFG_COMPARE_A_ENABLE);
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TIMER_CLKSRC | AM_HAL_STIMER_CFG_COMPARE_A_ENABLE);
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#endif
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g_last_time_stamp = am_hal_stimer_counter_get();
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@ -13,3 +13,29 @@ properties:
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interrupts:
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required: true
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clk-source:
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type: int
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required: true
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description: |
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clk-source specifies the clock source that used by the system timer.
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For Apollo3:
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0 - NOCLK : No clock enabled.
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1 - HFRC_DIV16 : 3MHz from the HFRC clock divider.
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2 - HFRC_DIV256 : 187.5KHz from the HFRC clock divider.
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3 - XTAL_DIV1 : 32768Hz from the crystal oscillator.
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4 - XTAL_DIV2 : 16384Hz from the crystal oscillator.
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5 - XTAL_DIV32 : 1024Hz from the crystal oscillator.
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6 - LFRC_DIV1 : Approximately 1KHz from the LFRC oscillator (uncalibrated).
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7 - CTIMER0A : Use CTIMER 0 section A as a prescaler.
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8 - CTIMER0B : Use CTIMER 0 section B (or A and B linked together) as a prescaler.
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For Apollo4:
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0 - NOCLK : No clock enabled.
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1 - HFRC_6MHZ : 6MHz from the HFRC clock divider.
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2 - HFRC_375KHZ : 375KHz from the HFRC clock divider.
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3 - XTAL_32KHZ : 32768Hz from the crystal oscillator.
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4 - XTAL_16KHZ : 16384Hz from the crystal oscillator.
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5 - XTAL_1KHZ : 1024Hz from the crystal oscillator.
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6 - LFRC_1KHZ : Approximately 1KHz from the LFRC oscillator (uncalibrated).
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7 - CTIMER0 : Use CTIMER 0 for the clock source (allows prescaling from other system clocks).
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8 - CTIMER1 : Use CTIMER 1 for the clock source (allows prescaling from other system clocks).
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@ -9,9 +9,6 @@ rsource "*/Kconfig.defconfig"
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config CORTEX_M_SYSTICK
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default n if AMBIQ_STIMER_TIMER
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 32768 if AMBIQ_STIMER_TIMER
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config SYS_CLOCK_TICKS_PER_SEC
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default 1024
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