1. MCXN23x edma1 has 8 channels, not 16.
2. MCXN23x edma0 and edma1 have 94 requests, not 120.
3. MCXNx4x edma0 and edma1 have 117 requests, not 120.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Add a property with which MSPI controllers can indicate their limits
on the maximum amount of data they can transfer in one packet.
Use the property for the SSI controller, for which the clock stretching
feature requires the use of the NDF field of the CTRLR1 register, which
is 16-bit wide, hence the data length limit is 64 kB.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Remove the useless U suffix used for STM32_RESET() macro bit position
argument in the DTS example snippet to prevent it spreads in DTS/DTSI
files while useless.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add device tree binding file for the Synopsys ARC-V RMX RISC-V
CPU core. This binding enables proper device tree property parsing by
the Enhanced Device Tree (EDT) system, allowing Kconfig device tree
macros to access CPU properties like clock-frequency.
The binding includes the standard RISC-V CPU properties by extending
riscv,cpus.yaml, which provides access to properties defined in cpu.yaml
such as clock-frequency.
Also removes hardcoded SYS_CLOCK_HW_CYCLES_PER_SEC from board level
and adds DT-derived value to RMX SoC level.
Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
Update serial driver support for RX MCU:
- Add DTC support for SCI UART driver.
- Implementation Async APIs for serial driver.
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
Initial commit to support DTC driver on Renesas RX130.
* drivers: DTC: implementation for DTC driver on RX130.
* dts: rx: update dts node in SoC layer to support DTC on RX130.
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
Adds a very rudimentary driver for getting some entropy from the
edgelock subsystem random number generator.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Fill out all ADC nodes of all STM32 with the new properties that apply to
them.
Also moves the status at the end of each node.
Also fixes ADC2 and 3 nodes for STM32F103 and ADC3 node for STM32L471 that
were missing some required properties.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add a bunch of new property for the STM32 ADC in order to simplify the
driver. All these properties are hardware-specific and should not be
modified by users.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Move Xuantie supprot from arch/riscv/core/xuantie to the custom common
layer arch/riscv/custom/thead, with the following changes:
1. Rename Kconfig name
CACHE_XTHEADCMO -> RISCV_CUSTOM_CSR_THEAD_CMO
2. Split the original arch/riscv/core/xuantie/Kconfig to
a. arch/riscv/custom/thead/Kconfig: for T-Head extension
b. arch/riscv/custom/thead/Kconfig.core: for T-Head CPU series
(e.g. Xuantie E907)
3. Move cache line size defaults to SoC devicetree
Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
TLSR951x also supports Andes extended CSR. Reworks the following CSR
handling to use the RISC-V custom CSR common code:
1. Use common macros for HWDSP CSR context save/restore.
2. Use common macros for PFT CSR context save/restore.
3. Use common low-level CSR initialization via __reset hook.
Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
Describe mipi_dsi block available on stm32f469 & above
Allow to display data on DSI panels taking output of LTDC
after serializing data.
Signed-off-by: Philippe Peurichard <p.peurichard@gmail.com>
