The RTS5817's SPI is based on snps,designware-spi, but it's not
entirely the same, so DW spi drivers cannot be used directly.
The rts5817 spi driver uses some DW spi code:
1. pin_ctrl is handled in the spi_dw.c code initialization.
2. Several APIs defined in spi_dw.h is used by spi_rts5817.c.
Signed-off-by: Darcy Lu <darcy_lu@realsil.com.cn>
Define Bluetooth interrupts from the devicetree for "st,stm32wb-rf"
compatible devices.
Note mix-len/max-len properties are not set for interrupts DT properties
in st,stm32wb-rf.yaml since current DT parsing process badly handles
them when interrupt-parent property must be used to locate the
interrupt cells size. Rely on min-len/max-len set for interrupt-names
for the properties consistency (edtlib.py ensures interrupts and
interrupt-names have the same number of elements).
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add support for the Texas Instruments ADC081C021/027, ADC101C021/027
and ADC121C021/027 single-channel I2C ADCs. The six parts share one
register map and differ only in the resolution of the left aligned
conversion result, so one driver handles all of them.
Signed-off-by: JaeHwan Jin <jaehwan.jin@rakwireless.com>
A property that is both required and resolves to a default value
is contradictory, since the default guarantees the property is
always present. edtlib warns on every occurrence.
Where a base binding supplies the default, the local required is
dropped, but only where a const or enum still rejects that
default so an absent property remains a build failure. Bindings
whose allowed values include the inherited default keep required,
as dropping it there would silently accept a wrong value. The
serlcd binding is the inverse case, where the base marks the
property required, so the local default is dropped instead.
Assisted-by: Claude Code:opus-4-8
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The "st,stm32-usbphyc" compatible was used for three different hardware
programming models, which goes against the Devicetree Specification.
This was masked though special checks in CMake which is hacky at best.
Split the compatible in three compatibles (2 new + 1 reused):
- "st,stm32-usbphyc" where the PHY clock frequency is configured
through USBPHYC registers in the RCC MMIO interface (STM32H7R/S)
- "st,stm32f7-usbphyc" where the PHY clock frequency is configured
through a distinct MMIO interface with five options available:
12, 12.5, 16, 24 and 25 MHz
- "st,stm32n6-usbphyc" where the PHY clock frequency is configured
through a distinct MMIO interface with three options available:
19.2, 20 and 24 MHz
Update SoC DTSI and drivers (Kconfig, CMakeLists and source) to work
with the new organization brought by these bindings.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Add a disk driver that exposes any device implementing the memc
read/write API as a block device. This enables using external
memory as storage for FAT filesystems or general block I/O without
requiring memory-mapped access.
The driver uses the zephyr,memc-ram-disk compatible and reads the
backing memc device phandle, disk name, and sector configuration
from devicetree. Read and write operations are translated directly
to memc_read() and memc_write() calls.
Signed-off-by: Dhanoo Surasarang <dhanoo.surasarang@nordicsemi.no>
Add ADC driver support for Realtek Bee series SoCs,
including RTL87x2G and RTL8752H.
This driver supports:
- 12-bit resolution
- Divide mode and Bypass mode
Signed-off-by: Yuzhuo Liu <yuzhuo_liu@realsil.com.cn>
Add an SPI SMP transport for mcumgr where the device operates as an
SPI peripheral and exchanges raw SMP packets with the SPI controller,
with no additional framing layer. A single data-ready GPIO signals
the controller when a response is ready to be read, avoiding a
resident polling thread. Zero-byte packets are handled via
smp_reassembly_drop() to clear a partial reassembly buffer.
Includes the Kconfig, the zephyr,smp-spi devicetree binding, and the
SMP_SPI transport enum entry.
Signed-off-by: Sanjay Varghese <Varghesemela@gmail.com>
Add pinctrl support for Renesas RZ/A3M
Remove the default from the binding and use DT_PROP_OR(..., 0) when
extracting FILNUM/FILCLKSEL, so DT_NODE_HAS_PROP() distinguishes an
explicitly requested filter from an absent property.
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Support Zephyr RTOS on Cortex A720 for R-Car X5H.
For more information and documentation, please visit the product page:
https://www.renesas.com/secure/gen5-r-car-x5h
Signed-off-by: Nam Nguyen <nam.nguyen.xn@renesas.com>
Define the Versal IPI controller nodes.
Use the controller addresses, message buffer locations, interrupts, and
agent IDs from the Versal hardware description.
Signed-off-by: Takumi Ando <takumi@spacecubics.com>
Make interrupt-names DT description required for "st,stm32wba-radio"
compatible nodes for consistency since these are expected by the driver
and bound element counts (both interrupts are needed) and supported name
values.
Note mix-len/max-len properties are not set for interrupts DT properties
in st,stm32wba-radio.yaml since current DT parsing process badly handles
them when interrupt-parent property must be used to locate the
interrupt cells size. Rely on min-len/max-len set for interrupt-names
for the properties consistency (edtlib.py ensures interrupts and
interrupt-names have the same number of elements).
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
The property was both `boolean` and `required: true` so it was always
present on nodes with the compatible (i.e., STM32WL5 "SUBGHZSPI" node).
The SPI driver serialized this property into field `use_subghzspi_nss`,
but it really acted as `is_subghzspi` instead... which does not require
a specific property: the SUBGHZSPI node can be identified by its special
compatible `st,stm32-spi-subghz` alone!
Drop the `use-subghz-nss` property from the binding since it is useless,
and update the STM32WL SoC DTSI accordingly. In the STM32 SPI driver,
rename the `use_subghzspi_nss` field to `is_subghzspi` and initialize it
to true iff an SPI node has the special compatible. While at it, inline
function spi_stm32_is_subghzspi() into its only caller and add a comment
explaining why the check is needed to slightly simplify the driver.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Create a new quectel,21-g.yaml device tree binding and modify the
current EG25-G modem cellular code to also support EG21-G, removing
specific references to EG25-G from the implementation and
making sure the proper definitions exist for both EG21 and EG25.
Also make mdm-reset-gpios optional for EG25-G.
Signed-off-by: Guilherme Costa <guilhermecosta@stratioautomotive.com>
The AD4170 driver already supports the "-4" members of this Sigma-Delta
ADC family (AD4170-4, AD4190-4, AD4195-4) from a single shared driver,
differentiated by compatible string and PRODUCT_ID.
Add support for the "-8" variants. Per their datasheets, the AD4195-8
and AD4190-8 both report PRODUCT_ID 0x49 and expose analog inputs
AIN8..AIN15 in addition to AIN0..AIN7; the register map, 24-bit
resolution, 16 channels, 8 setups and filters are identical to the rest
of the family.
Wire up two new compatibles (adi,ad4195-8-adc, adi,ad4190-8-adc),
extend the ad4170_input enum and the dt-bindings header with the extra
analog inputs, and add the parts to the build_all coverage.
Signed-off-by: Robert Budai <robert.budai@analog.com>
`stm32h755.dtsi` includes `stm32h745.dtsi` which in turn includes
`stm32h7_dualcore.dtsi`, so the latter should not be included again from
`stm32h755.dtsi`.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
The core code of the eeprom target library is a simple implementation of
byte oriented read and write against a memory range. The same protocol
is used by a lot of devices that use it to address a set of register and
is useful for other target drivers as well.
Refactor it out to a library so it can be reused, structs, code, api
implementation, dt binding and helpers.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add ti,interface-type = "rgmii" to the enet1g_phy node. The property is
required after the ti,dp83867 binding change that removed the implicit
rgmii default.
Signed-off-by: Venkatesh Odela <venkatesh.odela@amd.com>
Add gmii to the ti,interface-type enum so boards connected
in GMII mode can describe the PHY interface in devicetree.
Make ti,interface-type a required property and remove the rgmii
default.
Signed-off-by: Venkatesh Odela <venkatesh.odela@amd.com>
Add all eight LPSPI controller nodes (lpspi1-lpspi8) to the i.MX943
A55 SoC devicetree, referencing the Linux imx94.dtsi. Each node uses
the "nxp,lpspi" compatible with its register base, GIC interrupt, SCMI
clock and the required tx/rx FIFO sizes. All instances are disabled by
default and can be enabled at the board level.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Add nxp_rt115x.dtsi with the common RT1150 family deltas against the
shared nxp_rt11xx dtsi: 798MHz ARM PLL, 1MB dedicated OCRAM, and
removal of peripherals not present on the family (100M ENET,
LPUART4/10/11, LPI2C5, LPSPI6, FLEXCAN3, SAI4, MU, MIPI DSI).
nxp_rt1151.dtsi and nxp_rt1152.dtsi provide the per-part devicetrees;
the RT1151 additionally removes CSI, eLCDIF and PXP.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Model DMAEND and FRAMETIMEOUT_DMAEND support as a devicetree
capability. Use DMAEND for finite asynchronous RX frame timeouts on
capable UARTE instances and retain STOPRX on unsupported hardware.
Disable TIMER-based byte counting when DMAEND is available. Preserve
buffer accounting when uart_rx_disable() races with an ENDRX rollover,
reject buffer responses during teardown, and restore the interrupt
state after DMM preparation failures.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
Update the documented TMAG5273 axis enum values in the
devicetree binding to match the values used by the driver.
Signed-off-by: Stefan Prisacariu <stefan.prisacariu@prevas.dk>
- Adds node in dts
- Updates the binding yaml of rtc driver with the supported rtc ip
version
Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
Move the devicetree examples from the binding description
to the dedicated examples section.
Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
Update the driver of SCLK (Slow Clock Controller) for compatible with
more MPUs such as sam9x and sama5d2 series.
Signed-off-by: Tony Han <tony.han@microchip.com>
This adds support for the ARM Corstone System Architecture Specification
Ma2 (ARM CRSAS-MA2) Watchdog Timers.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Co-authored-by: Wojciech Sipak <wsipak@antmicro.com>
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
Add a display driver for the LeveTop LT7680. This was tested with the
sample `zephyr/samples/subsys/display/lvgl`.
While this display should theoretically support all 4 orientations, I only
managed to get it working with 0 and 180 degrees, so the driver only
supports these for now.
Signed-off-by: Thomas Fischer <thomas.fischer@jumo.net>
Co-authored-by: Michael Zimmermann <michael.zimmermann@sevenlab.de>
Major rework of the ICBMSG ipc service backend:
1. User callback is called from the mbox interrupt context.
Since RX holding functionality is supported it is possible to
postpone data processing to the thread context and limit the
time spent in the interrupt context to a minimum.
2.Extracted buffer allocation into separate file (heap)
Buffer can now be allocated from interrupt context as well.
3.Changed control path.
Instead of sending messages using icmsg, lightweight queue is used.
Each direction has producer and consumer queue. Each queue has n
(typically 16) byte slots. Producer is writing an index of the buffer
where new message can be found into the next free slot. Receiver is
reading from the producer queue and when buffer is processed then its
index is written to the next free slot in the consumer queue.
TX side, after each sending, is performing a garbage collection by
reading slots from the consumer queue and freeing the buffer. With this
approach producer queue is written only by the TX side and read by RX
side and consumer queue is written by the RX side and read by the
TX side. Additionally, queue supports 2 priority levels. Consumer is
first reading high priority messages.
Rework significantly reduces code size (2,5-4kB) and increases
performance. It also allows to send messages from any context and
reduced round trip time since receiver can respond directly from the
receive callback.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Assisted-by: Cursor:auto
Add a disk_access driver for virtio,blk devices.
It supports negotiated block size and scatter-gather requests.
Signed-off-by: Hongquan Li <hongquan.li@processmission.com>
Commit 6568b31857 ("dts: nordic: nrf7120: Add default memory region
for vtf monitoring") added the vtf_region_default node with a ranges
property but without #address-cells and #size-cells, which all the
sibling memory nodes declare. The parser then falls back to the
default #address-cells of 2, so the three-cell ranges value no longer
divides evenly and every nrf7120dk build fails:
devicetree error: 'ranges' property in
<Node /soc/memory@20000000/memory@fdfe0> has length 12, which is
not evenly divisible by 16
Declare #address-cells = <1> and #size-cells = <1> to match the
sibling ram0x_sram nodes and the intended 1:1 mapping.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Commits f3e371b384 ("dts: arm: nxp: enable FREQME on MCX and RT700
boards") and f7c5e4cbdf ("dts: arm: nxp: mcxn23x: Add qdc and
inputmux node") each added an identical inputmux0: inputmux@6000 node
to different parts of the same &peripheral block. The two changes
merged without a textual conflict, but the devicetree parser rejects
the duplicate node name, breaking every mcxn23x build (e.g. all
frdm_mcxn236 targets in CI):
nxp_mcxn23x_common.dtsi:1298 (column 27): parse error:
/soc/peripheral@50000000/inputmux@6000: duplicate node name
Drop the second copy, which was also out of unit-address order,
keeping the one placed between syscon@0 and freqme@11000.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
vtf monitoring requires a default address that can be accessed from app
and wifi cores. vtf_region_default is set to be top unallocated
memory in RAM03.
Signed-off-by: Robert Robinson <robert.robinson@nordicsemi.no>
