The STM32H5 PLL configuration is similar to the STM32H7 but
maximum achievable frequencies differ.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
add support for the stm32 f series in the
dwmac driver.
Assisted-by: Github Copilot:Claude Haiku 4.5
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
This commit adds board support for the CAN-module project hardware,
including the CANBRIDGE G473, USBCAN ISO, and USBCANFD SOLO/DUAL
adapters. These boards are based on STM32G4 and F0 series MCUs.
Signed-off-by: Oleksii Mamontov <mamontov1@gmail.com>
Add a build assertion to ensure PLL1 DIVP division factor is not
an odd value different from 1 since not allowed as per SoCs reference
manuals.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add a driver for VIRTIO input devices. Events are forwarded to the input
subsystem as-is since the event codes match the Linux ones. ABS_X/ABS_Y
values can optionally be scaled to the resolution of a referenced display.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Add the nxp,wake-timer binding and disabled waketimer0 nodes for
MCX A devices that provide the 32-bit wake timer IP.
The nodes describe the 1 kHz counter clock derived from the 16 kHz
source with OSC_DIV_ENA enabled. Keeping the nodes disabled by
default lets later commits enable the IP on boards after the driver
is present.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
Set min/max properties for PLL/PLLI2S/PLLSAI multiplier and consider
F401xx and F2xx specific min value at build time in driver implementation.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Set min/max properties for PLL/PLLSAI1/PLLSA2 multiplier, input divisor
and PLL/PLLSAI1/PLLSAI2 P divisor on STM32L4/L5 and consider L4 non-L4+
specific ranges at build time in driver implementation.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add microchip,refresh-mode property to Mictochip PAC194X/195X.
This property allows configuring the sensor's refresh behavior
directly from the devicetree.
Signed-off-by: Albert Jakieła <jakiela@google.com>
Added FIFO support for PSE84 autanalog SAR. The FIFO is 512 elements
deep. It can be subdivided into x8 64 elements to support 8 independent
streams of ADC data.
Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Richard Mc Sweeney <Richard.McSweeney@infineon.com>
Added support for FIR filters in the PSE84 autanalog SAR ADC. There
are two filters, each supporting up to 64 taps. The output can
optionally be fed into the SAR FIFOs.
Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Richard Mc Sweeney <Richard.McSweeney@infineon.com>
Add the radio on stm32wba to device tree and move the
bluetooth node and the ieee802154 node inside it.
Signed-off-by: Vincent Tardy <vincent.tardy@st.com>
This commit fixes minor typos in fuel-gauge driver and also fixes the
include guard for the same. It also fixes `fuel_gauge_set_props` API
doxygen comments to reflect the correct return code.
Signed-off-by: Dev Joshi <devbhave@qti.qualcomm.com>
Adds a display driver for the Himax HX8353E 132RGB×162 TFT LCD
controller, driven via MIPI DBI Type B (Intel 8080 parallel bus).
Features:
- Standard MIPI DCS init sequence (SLPOUT, MADCTL, COLMOD, DISPON)
- GRAM cleared to black before display-on to prevent pixel flash
- 20 ms post-DISPON backlight delay: one full frame scan (~16 ms) for
GRAM to paint plus ~4 ms LC layer settling, before enabling backlight
- Four display orientations via MADCTL
- Window caching to skip redundant CASET/PASET on consecutive writes
- RGB565X pixel format: 8-bit bus sends high byte first;
PIXEL_FORMAT_RGB_565X signals byte order to callers
- Optional GPIO backlight on/off
- Optional PWM brightness control via set_brightness()
Signed-off-by: Andrew Yong <me@ndoo.sg>
Add initial support for the Espressif ESP32-S3-BOX-3 development kit.
This commit introduces board definitions for both PRO CPU and APP CPU
variants, including DTS, pinctrl, Kconfig, defconfig, and
documentation.
Signed-off-by: Sidhartha Raghaw <sidhartha.raghaw@notionext.com>
Add the DFSDM peripheral to STM32L5xx series. The DFSDM presents 4
filters for all L5 variants and is basically the same device-tree as
STM32L4 series.
Signed-off-by: Raphaël Gallais-Pou <raphael.gallais-pou@foss.st.com>
Utilize the RAM allocation for nrf7120 tf-m application. Move RAM
macros ram00_sram, ram01_sram, ram02_sram and ram03_sram under
cpuapp_sram for application to use the whole RAM space. Secure RAM
will use 128 Kb while NS ram use 888 Kb out from 1016 Kb from the
total memory size.
Note that ram02_sram and ram03_sram is under AMBIX03 bus and it will
take one more cycle for Appcore to access it from AMBIX00 -> AMBIX03.
Heap allocation of zephyr application normally allocate heap from the
end of address and grow downward. Application that requires lower
latency should prevent usage of RAM02, RAM03, they need
to define overlay file themselves.
Signed-off-by: Travis Lam <travis.lam@nordicsemi.no>
Include ethernet-controller.yaml so local-mac-address on wlan0 nodes is
available to DT_PROP() and DT_PROP_OR(). Without this, overlays set the
property in zephyr.dts but generated headers omit it and applications
fall back to a zero MAC when nRF70 OTP is not programmed.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Assisted-by: Cursor:Auto
In Multi-LED mode, nothing prevents sending an incorrect slot to the chip.
One could unintentionally send a "reserved" slot code, which could result
in unexpected behavior. Values must be between 0 (time slot disabled)
and 3 (Green LED channel). For the MAX30102, the max value should be 2.
This fix limits the sensor binding using min/max properties and simplifies
the translate map generation by testing if the time slot is not disabled.
Signed-off-by: Alban Chauvel <a.chauvel@catie.fr>
When including the `st,stm32-dma.yaml` binding, filter out properties
that are only relevant for dma-v1 / dma-v2. Also update all DTSI files
that contained properties which no longer exist in `st,stm32u5-dma`.
Note that since the `st,stm32-dma` compatible is never used, it would be
wiser to simply move all these properties to the relevant bindings and
delete the base `st,stm32-dma` binding instead (no need for a common
file - once you get rid of the device-specific properties, there isn't
much left to share). However, this is a larger effort and needs careful
consideration so it is left as a future task.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
This change adds the 96MHz PLL frequency configuration required
when the usb interface is enabled. It also introduces a kconfig
option to enable sof calibration for improving usb clock accuracy.
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
Add a native_sim file-backed I2S controller for RX, TX,
and loopback tests.
The driver reads and writes PCM data through host-libc
file I/O and supports configurable stream direction.
It exposes standard I2S trigger handling, provides
command-line overrides for the RX and TX file paths,
is documented in the native_sim board guide, and adds
I2S to the supported peripherals in native_sim.yaml.
Assisted-by: GitHub Copilot:GPT-5.4
Signed-off-by: Tomas Barak <tomas.barak@nxp.com>
- Implement ADS1118 ADC driver
- Add support for temperature sensor mode
- Add ADS1118 ADC configuration in Kconfig
Signed-off-by: Jean Yuan <jyuan@testo.net.cn>
Use the `clocks` phandle to obtain the UART peripheral clock instead
of `clock-frequency` property. Update the binding and BCM2711 DTS
accordingly and rename the driver configuration field from
`clocks` to `pclk`.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Due to top-level SAI nodes lacking the `ranges` property, the sub-blocks
were mapped in a separate address space despite really being MMIO. As a
result, the `DT_REG_ADDR()` value was not correct and the driver had to
compensate by performing arithmetic to obtain the right address.
Update the SAI binding to enable use of `ranges` property at top-level:
notably, `#size-cells = <1>` is needed (instead of `#size-cells = <0>`)
because `ranges` property have no effect if the length is not specified.
Also update DTSI files to follow the new pattern, and drop the manual
math from the driver: `DT_REG_ADDR()` now returns the proper address for
SAI sub-block nodes.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
The sub-blocks are the devices which are I2S controllers and implement
the I2S API; it's them that should derive from `i2s-controller.yaml` and
have `bus: i2s`, not the top-level node which is mostly an empty shell.
Update the "st,stm32-sai" binding to include only `base.yaml` for itself
and `i2s-controller.yaml` for the child-binding (= subblocks). Note that
property "compatible" must be blocked because it is marked as required
in `base.yaml` which is included by `i2s-controller.yaml`, but nodes
must not have this property if they want to inherit the child-binding.
Also update the STM32 DTSI files accordingly: since the subblocks are
now I2S controllers, they must now have `#address-cells = <1>` and
`#size-cells = <0>`.
While at it, also clean up the binding by include other base files
instead of redefining the type for various standard/common properties.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Add support for pinctrl to R-Car X5H SoC. Like for other Renesas SoCs,
a node approach is implemented (no grouping approach).
Pin configuration operations can optionally be performed through SCMI
(System Control and Management Interface).
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Change #address-cells and #size-cells properties from required to
optional in i2s-controller.yaml. These properties are not needed when
the I2S controller node has no children.
This allows I2S nodes without children to omit these properties,
reducing unnecessary devicetree complexity.
Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
Add a separate sai3_2 node with compatible "nxp,mcux-i2s" for the SAI3
hardware block, alongside the existing sai3 dai node with compatible
"nxp,dai-sai".
Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
