Allow providing an unlock configuration for unlocking the padcfg region as
part of the ti,control-module node.
Map the child pinctrl node using the `ranges` property to the base address
space.
Signed-off-by: Amneesh Singh <amneesh@ti.com>
This binding is for TI devices that use control modules for configuring
registers and information related to control MMRs, power, reset and
clocking.
These control modules consist of regions that require writing specific
values to specific kick registers to unlock that region. This is provided
as ti,unlock-offsets property.
Signed-off-by: Amneesh Singh <amneesh@ti.com>
This 'base' file is just an include file, it doesn't actually refer to
a concrete binding. There's a specific binding for the 4050 in another
file that has the right name.
Signed-off-by: Martí Bolívar <marti.bolivar@oss.qualcomm.com>
We have:
- sifive-common.yaml that wants to be a generic include
file for CPUs by that vendor
- riscv.yaml that is *both* a generic include file for CPUs of that
architecture *and* a specific binding with compatible "riscv"
This is a problem for multiple reasons:
1. It means that both sifive-common.yaml and riscv.yaml are different
YAML files with the same "compatible", i.e. "riscv".
This should be a hard error. The only reason this isn't causing build
errors seems to be because of an edtlib optimization (see the
"dt_compats_search" in edtlib.py for details)
2. It means that sifive-common.yaml is a valid binding whose file
name doesn't match its compatible, which is a violation of the
rules for upstream bindings.
Fix both of these problems by factoring out the common properties into
a new "riscv-common.yaml" that doesn't have any "compatible: " set.
That lets sifive-common.yaml just include riscv-common.yaml, allowing
it to be "just" an include file, without breaking any of the common
property definitions expected by CPU bindings for that vendor.
Note that there does appear to be one file
in-tree (dts/riscv/raspberrypi/hazard3.dtsi) that actually uses
"riscv" as a bare compatible. I'm going to take that as a hint that
out-of-tree users are probably doing the same, making it important to
continue to allow riscv.yaml to be a "real" binding and not "just" an
include file.
Signed-off-by: Martí Bolívar <marti.bolivar@oss.qualcomm.com>
The main problem I want to fix here is that the DT binding's file name
doesn't match its compatible, which is a violation of our upstream
bindings rules.
The "dsi" suffix here is not a good practice, DT-wise. The compatible
string represents the programming model for the device in vnd,device
format. We don't put the "-spi" at the end of compatibles for SPI
devices, and we don't put "-pcie" on the compatibles for PCIe devices.
The bus has no place in the DT compatible. So in this case, the
file name seems fine, but the compatible itself is off.
(The other option would have been to change the suffix to "mipi-dsi"
(or "mipi_dsi") as necessary to match the relevant "on-bus:" value in
the binding -- but let's simplify and better align with DT best
practices here.)
Signed-off-by: Martí Bolívar <marti.bolivar@oss.qualcomm.com>
A YAML file with a "compatible:" set is able to be interpreted by the
bindings system as a "real" binding and should have enough information
to feed a driver. YAML files without "compatible:" are meant to be
used with the "include:" feature.
Delete some stray "compatible:" lines that are in YAML files seemingly
meant only to be used as include files.
Signed-off-by: Martí Bolívar <marti.bolivar@oss.qualcomm.com>
These bindings' filenames don't match their compatibles, but the fixes
weren't automated as there were multiple possible outcomes for these.
I looked around and fixed them up by hand.
Signed-off-by: Martí Bolívar <marti.bolivar@oss.qualcomm.com>
Clean up various bindings whose names do not match our naming policy.
These are all unambiguous cases I found and fixed with a quick script.
As a reminder, the policy in bindings-upstream.rst is:
Bindings which match a compatible must have file names based on
the compatible.
- For example, a binding for compatible ``vnd,foo`` must be named
``vnd,foo.yaml``.
- If the binding is bus-specific, you can append the bus to the
file name; for example, if the binding YAML has ``on-bus: bar``,
you may name the file ``vnd,foo-bar.yaml``.
Signed-off-by: Martí Bolívar <marti.bolivar@oss.qualcomm.com>
Add device tree include file for the Alif Ensemble E1C SoC
variant AE1C1F4051920PH0.
The file builds upon the common peripheral definitions from
ensemble_common.dtsi and ensemble_rtss_he.dtsi and defines the
SoC specific clock frequencies, TCM configurations and MRAM
configuration.
Signed-off-by: Silesh C V <silesh@alifsemi.com>
Add support for hardware-generated periodic compare events using
the GRTC interval feature. Once configured, the hardware generates
compare events at a fixed interval without CPU intervention.
The feature is available only on channels defined as
"extended-channels" in the devicetree.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
The STM32N6 embeds two kind of watchdogs for which this
commit adds the nodes.
- System window watchdog (WWDG)
- Independent watchdog (IWDG)
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Add DMA controller node to PSoC 4100TP device tree and introduce
the corresponding binding file `infineon,dmac.yaml`.
Signed-off-by: Dharun krithik k <dharunkrithik@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
In order to add MMIO mapping to specified reg region by name, add
reg-names property for dts binding nxp,imx-flexspi, and then update
existing dts nodes accordingly.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
There's no need for compatible on child nodes, they just confuse the
documentation, drop them. This also implies dropping the child node
inheriting i2c-controller.yaml, just replace it with a bus: i2c so the
node is i2c bus on an i2c bus and port over the basic properties.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add support for the Chipsemi CHSC6540 touch controller and refactor
the driver to support multiple compatible variants.
- Introduce a function pointer (read_data) in driver config to abstract
controller-specific data parsing.
- Implement chsc6x_read_data() and chsc6540_read_data() with
variant-specific register layouts.
- Switch to DT_FOREACH_STATUS_OKAY() for per-compatible device
instantiation.
- Replace instance-based macros with node-based DEVICE_DT_DEFINE().
This change allows the driver to support both chipsemi,chsc6x and
chipsemi,chsc6540 via devicetree without duplicating core logic.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Introduce a new Wakeup Controller (WUC) driver API to manage wakeup
sources in low-power scenarios. The WUC API provides a standardized
interface for enabling, disabling, checking, recording and clearing
wakeup sources that can bring a device out of low-power states.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
Add Atmel SAM USBC driver for SAM4L family. The driver was tested using
CDC-ACM and testusb samples.
Fixes: #74665
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add device tree nodes for the Bouffalo Lab SEC Engine sub-blocks
(SHA, AES, GMAC) across all three SoC families:
- bl60x/bl70x: individual IRQs per sub-block (SHA=30, AES=29,
GMAC=25), peripherals at 0x40004xxx
- bl61x: shared IRQ 26 for all crypto sub-blocks
(SEC_ENG_ID0_SHA_AES_TRNG_PKA_GMAC_IRQn), peripherals at
0x20004xxx
Add corresponding DT binding YAML files for each compatible.
Enable SEC_ENG AES and SHA nodes on ai_m62_12f_kit,
ai_wb2_12f_kit, and dt_xt_zb1_devkit boards.
Signed-off-by: William Markezana <william.markezana@gmail.com>
# Conflicts:
# dts/riscv/bflb/bl60x.dtsi
# dts/riscv/bflb/bl61x.dtsi
# dts/riscv/bflb/bl70x.dtsi
Add a GPIO driver for the Infineon CYW43439 WiFi chip that exposes
WL_GPIO0-2 as standard Zephyr GPIO pins. Pin 0 is the onboard LED
on Raspberry Pi Pico W and Pico 2 W boards.
The GPIO node is a child of the AIROC WiFi device node in the
devicetree. GPIO control is performed via the WHD gpioout iovar,
serialized with a mutex. A shadow register tracks pin state since
the CYW43439 does not support GPIO readback.
Signed-off-by: John Lin <mcjelcom@gmail.com>
This commit is to add DTC transfer feature for both SPI controller mode
and peripheral mode on board RSK-RX130-512KB
Signed-off-by: Minh Tang <minh.tang.ue@bp.renesas.com>
Updated EEPROM dts for PCR and GIRQ property.
Updated pinctrl to access internal EEPROM for MEC5 part.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Add ranges, #address-cells and #size-cells to cpuflpr_mram to
match the cpuapp_mram pattern. Without these the fixed-partitions
child node causes dtc warnings about mismatched address-cells and
default addr/size reliance.
Signed-off-by: Dhanoo Surasarang <dhanoo.surasarang@nordicsemi.no>
Infineon PSOC4 parts share many ports with a single IRQ line. Using the
SHARED_INTERRUPT handler feature of Zephyr results in a very large IRQ
vector table. Instead structure in DT the idea that the ports are
sharing an interrupt with a sort of pseudo interrupt controller.
This also rectifies the need to ifdef on CAT1C/M0+. I added a note
making it clear that in those cases we likely need to rework the way
interrupts are done anyways as there's secondary interrupt
muxes/controllers involved.
Signed-off-by: Tom Burdick <thomas.burdick@infineon.com>
Add device tree nodes for the two Quadrature Decoder (QDC) peripherals
available on NXP MCXNx4x SoCs:
- QDC0 at 0xcf000 with interrupts 124-127
- QDC1 at 0xd1000 with interrupts 128-131
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Add an entropy driver for Bouffalo Lab BL70X that reads
random data from the SEC TRNG block and wires it into
Zephyr's entropy API.
Signed-off-by: William Markezana <william.markezana@gmail.com>
Extend bindings for dppic and ppib to include channels and groups property.
Set channels and groups property in devices with DPPI.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add initial support for Renesas R-Car V4H SoC.
Support Zephyr RTOS on Cortex R52, 1.4GHz core.
For more information and documentation, please visit the product page:
https://www.renesas.com/en/products/r-car-v4h
Signed-off-by: Duy Dang <duy.dang.yw@renesas.com>
stm32-iocell has no bus address so move it out of /soc to fix a warning
Warning (simple_bus_reg): /soc/iocell: missing or empty reg/ranges property
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
For STM32H5 series, only the cell compensation can be configured,
as the HSLV configuration is controlled on a per pin basis and
not on a per domain basis as for other STM32 series.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
Adjust PM residency times to more realistic values. Add power
states to ESP32-C2. Mark soft-off state as disabled, as it must
be called explicitly by application.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Add devicetree binding for the Trinamic TMCM-3216 3-axis stepper
motor controller. The TMCM-3216 communicates over RS485 using the
TMCL protocol and supports up to 3 stepper motors.
Signed-off-by: Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
Add support for the Sony IMX219 CSI sensor.
This sensor supports resolution of 3280x2464 in RGGB bayer format
either 8 or 10 bits and using 2 or 4 CSI lanes.
Only 10 bits on 2 CSI lanes is currently supported, and only in
1920x1080 pixel resolution using cropping using the video_set_format(),
and will need to be converted to video_set_selection() instead.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Co-authored-by: Alan Shaju <alanshaju@rideltech.com>
Co-authored-by: Alain Volmat <alain.volmat@foss.st.com>
