The fractional part of the qdec sensor readout is set to zero (val2 =
0).
Changed the format of the run time data to Q26.6 and adjusted the
assignment of val1 and val2 accordingly.
Signed-off-by: Juraj Lieskovský <lieskovsky.juraj@gmail.com>
SHIM Nordic modification for the ADC driver controlling the SAADC
peripheral. Replaced HAL based implementation in favor of nrfx driver.
As a next step, it is planned to implement a feature that will allow
the peripheral SAADC timer to be used for sampling, and for this it is
necessary to use the nrfx driver in this SHIM.
This will allow more accurate and faster sampling than the kernel
mechanism currently provides.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
New control transfer is started prematurely from device perspective when
host timeout occurs. Any data transfer from previous control transfer
have to be cancelled prior to handling SETUP data. Unconditionally
disable control IN endpoint to prevent race for enqueued buffer between
udc_buf_get_all() called in dwc2_handle_evt_setup() and udc_buf_peek()
called in dwc2_handle_in_xfercompl().
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Texas Instruments MSPM0 series supports device id fields with
various part information and also resgister to hold reset reason.
Reset cause register will defaults to 0 after first read.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
The EDAC shell code previously contained a number of references to the
Intel IBECC driver. Make the shell code more generic to the defined EDAC
API, and make IBECC-specific code dependent on its config option.
Also make NMI control dependent on X86 as it is specific to that
platform.
Rather than looking for a node labeled "ibecc", the EDAC shell code
now simply requires that a chosen entry for "zephyr,edac" be present to
point to the desired device. The Intel Elkhart Lake DTS has been updated
to add this alias.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Add an EDAC driver for the Synopsys DDR memory controller, used in the
Xilinx MPSoC (ZynqMP) devices, to allow monitoring for ECC errors.
Note that currently only the compatible string used for the ZynqMP
(shared with Linux) is currently supported. Support for other Synopsys
core implementations can be added in the future.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
When reconfiguring the SSP, some changes do not immediately take effect
in particular changes to the clock polarity are not applied. Disabling
and re-enabling the SSP forces the new configuration to take effect
immediately.
Signed-off-by: George Norton <george_norton_uk@hotmail.com>
Corrected the timeout condition in the ti_adc_sequencer_start function
to ensure proper timeout handling during ADC sequencer operations.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Ensure proper release of memory slab when dmm_buffer_in_release fails in
the event_handler function.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
For a long time (since version 3.3.0) nrfx contained an incorrectly
defined symbol NRF_SAADC_8BIT_SAMPLE_WIDTH that was set to 8 for nRF54L
and nRF54H Series SoCs, which was probably only true for very early
engineering revisions of those. Based on this, the adc_nrfx_saadc driver
was incorrectly writing consecutive 8-bit samples in supplied buffers,
cutting off the highest 8 bits of the results. And for sequences with
multiple channels, it was even causing that the results written as
16-bit words by hardware were partially overwritten in next iteration.
In nrfx 3.12.0 (see commit f46798fa55)
this was finally corrected - the symbol is now deprecated and it is
always set to 16. This commit is a follow-up to the above and removes
parts of adc_nrfx_saadc that now became dead code to prevent further
confusion regarding 8-bit sampling.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
When set 'wifi reg_domain' CMD, need to create and download countryinfo
to sync driver and FW for embedded supplicant case
Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
Instead of using 32 bit enum values for event numbers, convert
the code to use 64 bit long bit fields. This means that the
user API is changed to use 64 bit event values instead of 32
bit event values.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
This change will allow the VIRTIO-MMIO register definitions
to be shared.
Additionally, the register names from Ver1 were being used,
even though the implementation was based on the Ver2 specification.
Also, I addressed this issue.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
The `end` variable should be calculated based on the device's register
size, not the address. Probably never caught before as user typically
provides a buffer of reasonable size...
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
While it would likely not directly cause issues with the current
implementation, the logic of turning off the sensor should be to
actually reset the flags, not to toggle them.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Updated the CONF_STATUS0_DEV_ROLE macro to ensure proper bitwise
operation by adding parentheses around the bitmask operation.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Add error handling for the return value of gnss_nmea0183_snprintk
so as to avoir sending garbage to the modem.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Correct improper doc for return value, document the negative error
codes, and add more details re: what the function does.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
I3C callbacks are registered by upper layer. Driver layer must check if
a callback is not NULL before calling it
Signed-off-by: Nghia Phung <nghiap@amperecomputing.com>
When Hotjoin complete and dynamic address is assigned to target,
INTR_DYN_ADDR_ASSGN_STAT interrupt will be triggered, we can use sem_hj
to notify dw_i3c_target_ibi_raise_hj() about Hotjoin completion
Signed-off-by: Nghia Phung <nghiap@amperecomputing.com>
Some external flash modules have extra commands to support, for example,
reading/writing an OTP zone. Given that the commands are highly specific
and difficult to generalize, we add two ex ops that can be used to
transmit a custom command (in the form of a full QSPI_CommandTypeDef) and
then read or write a user-provided buffer.
Signed-off-by: Federico Di Gregorio <fog@dndg.it>
The utility may be used during development stage to get
ambiq platform specific timing parameters for mspi devices.
Signed-off-by: Swift Tian <swift.tian@ambiq.com>
This device driver supports ISSI is25w/lx032/64 series flash.
Only extended SPI mode(1s-1s-1s, 1s-8s-8s, 1s-1s-8s) is implemented.
Signed-off-by: Swift Tian <swift.tian@ambiq.com>
add missing break statement so that CLOCK_CONTROL_AMBIQ_TYPE_LFXTAL case
is handled correctly.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
