Prevents building the driver entirely if the PM symbol is selected instead
of erroring out via a compiler pragma.
Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
Rewrites the logic used to select the matching target config during address
match events.
Handles 7-bit and 10-bit modes more clearly, adds fallback to slave2_cfg
if slave_cfg is NULL, and reduces nesting.
Fixes a case where the primary target (slave_cfg) could be unregistered
before an address match interrupt fires, which could lead to a null
pointer dereference.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Rewrites the logic used to select the matching target config during address
match events.
Handles 7-bit and 10-bit modes more clearly, adds fallback to slave2_cfg
if slave_cfg is NULL, and reduces nesting.
Fixes a case where the primary target (slave_cfg) could be unregistered
before an address match interrupt fires, which could lead to a null
pointer dereference.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Set `port_pin_mask` in the GPIO driver for Silicon Labs Series 2
based on Devicetree `ngpios` and `gpio-reserved-ranges`. This
mask is used to validate that the pin numbers passed to the GPIO
API are valid on a given device.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Check the used XSPIx peripheral before calling the corresponding function
instead of hard-coded calling the LL_PWR_EnableXSPIM2() and
LL_SBS_EnableXSPI2SpeedOptim() during flash_stm32_xspi_init(...).
Signed-off-by: Thomas Decker <decker@jb-lighting.de>
Add a native Zephyr driver for Semtech SX1261/SX1262 LoRa transceivers that
does not depend on external modules (loramac-node or lora-basics-modem).
The driver is experimental and must be explicitly enabled by selecting
CONFIG_LORA_MODULE_BACKEND_NONE.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Add DCP auto status support and update the control stage update
sequence to adapt with hardware auto response mode
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
The e1000 Ethernet driver TX staging buffer is sized to NET_ETH_MTU
(1500 bytes), but the Ethernet L2 layer prepends headers (14 bytes
standard, 18 bytes with VLAN) before calling the driver's send function.
When transmitting MTU-sized packets, net_pkt_get_len() returns the full
L2 frame size (up to 1514+ bytes), causing a 14-18 byte out-of-bounds
write into adjacent RX buffers. This is remotely triggerable by inducing
large TX responses such as ICMP echo replies.
The RX staging buffer has the same issue - it is sized to NET_ETH_MTU
but receives complete L2 frames from the network which include headers.
Fix by sizing both TX and RX buffers to NET_ETH_MAX_FRAME_SIZE and
adding a defensive bounds check to the TX path.
Signed-off-by: Pavel Kohout <pavel.kohout@aisle.com>
Addressed stability and security issues identified by Coverity in
the ATaes132a crypto driver:
- CID 434625: Added range validation for 'count' to prevent tainted
scalar usage and buffer underflow in response processing.
- CID 487700 & 487763: Implemented overflow guards for 'buf_len' to
prevent integer overflow and type truncation when calling
ataes132a_send_command.
- CID 487746: Applied explicit type casting to CRC calculations to
satisfy static analysis regarding integer promotion.
Signed-off-by: Shreya Kulkarni <kulkarnishreya2421@gmail.com>
Add OTP driver for the SiFli SF32LB series eFuse controller.
This driver provides read-only access to the eFuse OTP memory
with the following features:
- Cache mechanism: all eFuse content is loaded into RAM during
initialization for improved read performance
- Support for 4 banks x 32 bytes = 128 bytes total OTP storage
- LDO voltage adjustment before reading as required by hardware
Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
The base address was written to an incorrect register, which caused
incorrect data to be read from the I2C target. This has been fixed by
writing to the correct register.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Fix inconsistent macro name from IOMUX_GET_SCTIMER_IN_CLR_ENABLE
to IOMUX_GET_CTIMER_CLR_ENABLE to align with the actual CTimer
functionality and related macro naming convention.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
The actual_velocity pointer is dereferenced unconditionally before
the NULL check, making the conditional LOG_DBG() guard ineffective.
Since actual_velocity must be valid to reach this point, the
conditional check is redundant and misleading.
Remove it and log the value unconditionally to reflect the actual
control flow.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Remove a dead error check which check ret but ret wasn't even
assigned before the test.
Remove the useless condition to make the intent explicit and clean
up the code.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Correct a clock initialization ordering issue where IMO, an internal
high speed oscillator, was being setup before ILO. This does not match
the MTB initialization order and would cause the part to fault.
Sets up the default clock configuration on the part to be 48MHz. Adjusts
the default WCO (low speed external crystal source) to be 32768 as the
eval board has this crystal on it. Enables common clock elements
(hf_clk, clock_pump) as needed in the part dts rather than the board.
Signed-off-by: Tom Burdick <thomas.burdick@infineon.com>
According to the manual, device should wait:
AT+QPOWD=1
OK
POWERED DOWN
before shutting down. This should take about 300 ms.
Correct the timing to match BG96 manual, where power_key pulse
is 500ms (on a shut down, it say 650ms).
The start-up time of UART is described as >=4900ms so start_ms
is now set to 5s. It does not require 10s.
We require more than 100ms to reset from CMUX to AT mode UART,
500ms seems to be enough. Manual does not describe this delay.
Shutdown time is described as 2s, but we don't typically use that
as the shutdown script receives the POWERED DOWN message and is now
faster.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
When net_if_down() is called, the PPP_DEAD event is handled
in state machine before the modem_ppp_ppp_api_stop()
requests the driver to suspend.
Prevent non-wanted re-dial script by checking the admin
state (UP/DOWN) of the PPP interface, before dealing with
lost connection.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
We converted the QMSPI-LDMA driver to linux style with a local
register header in the driver folder. This is part of the long
term plan to remove the MEC5 HAL and have common drivers for
as many SoC's as possible. QMSPI register definitions are in
the SoC layer to be shared with other drivers (MSPI). The driver
was also updated based on changes in the SPI config structure.
The lastest SPI config structure changes force hardware controlled
chip selects and GPIO controlled chip selects to be mutually exclusive.
NOTE: driver works with the flash driver sample
and passes the common flash driver test.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Before that commit spi was not available for the soc sy1xx.
With this commit a basic usage of spi is possible.
Signed-off-by: Sven Ginka <s.ginka@sensry.de>
Co-authored-by: Fin Maaß <f.maass@vogl-electronic.com>
This change adds optional reset via GPIO support to u-blox M8 driver.
This is useful if host is reset separately from the u-blox M8 GNSS
receiver.
Signed-off-by: Vytautas Virvičius <vytautas@virvicius.dev>
The out_div dts setting differs to the register setting
causing the frequency calcuation to be incorrect.
This was originally intended to be fixed in NRFX but
this requires further investigation on how to approach
translation of literal values to enums in NRFX. This PR
adds a helper function for the conversion for now and
changes the devicetree bindings to align with the literal
value.
Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
Let's get rid of deprecated sl_wifi_set_callback. The new
sl_wifi_set_callback_v2 changes the callback prototypes, but they kept the
semantic.
We also take this opportunity to slightly clean up the prototupes of the
callbacks.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
sl_wifi_performance_profile_t is deprecated. The migration to
sl_wifi_performance_profile_v2_t is pretty easy, so there is not reason to
delay it (in fact, the two versions only differ in binary compatibility,
the API is still compatible).
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
sli_save_ap_configuration() and sli_get_saved_ap_configuration() have been
renamed respectively in sli_wifi_save_ap_configuration() and
sli_wifi_get_saved_ap_configuration().
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
It is possible that some uart devices ns16550 do not support interrupts.
As an example, using main domain uarts from mcu domain m4f core in AM62
processors does not support uarts.
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
Add pinctrl support to the bcm2711 aux UART driver to allow
uart pin configuration via the pinctrl driver.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
The BCM2711 GPIO controller provides 58 GPIO pins (0-57) that can be
configured for various functions including GPIO input/output and
alternate functions for peripherals like SPI, I2C, UART, PWM, etc.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Fixes VEVIF task receiver driver to work correctly on both nRF7120 and
nRF54h20 by correcting the mapping between Task IDs and Interrupts.
Signed-off-by: Erdem Simsek <erdem.simsek@nordicsemi.no>
For STM32F4, the SAI HAL writes into the RCC DCKCFGR register to set the
clock source. To ensure that is conforms with what is declared in the
device tree, the ClockSource field in the Init structure needs to be
correctly configured before calling HAL_SAI_InitProtocol.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
If a device has multiple flashes, likely it has multiple partition tables.
This change updates the `flash partitions` command to print all partitions
for all partition tables, instead of just one partition table.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
Use SHELL_HELP macro for help strings to ensure consistency across
various shell modules and save flash.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Select COUNTER_64BITS_TICKS for ACE counters to enable this
functionality by default.
This restores the default state which was disabled by recent commits.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Wrap counter_ace_v1x_rtc_get_value in #ifdef
to avoid an unused function warning when
64-bit ticks are disabled.
Fixes 7fc848153c
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
'tm_wday' (and potentially all other time and date values in the
TM structure) may retrieve corrupted data during readout from the
hardware via the Pico SDK when the call to rtc_get_datetime() comes
back with error.
If the referenced data structure 'datetime_t dt' is only partially
filled or not filled at all via the Pico SDK due to invalid RTC data
in the hardware, random data will be copied from the stack to the
TM structure without further verification.
Now the Pico RTC driver follows the general idiom: If the answer is
unknow, the caller-provided TM structure must not be updated.
Signed-off-by: Stephan Linz <linz@li-pro.net>
The W1_VND_INIT() has defined the one parameter 'n', but the variable
name 'inst' was used inside the stringifications.
In addition, clang-format was invoked to meet the CI conformance
rule ClangFormat.
Signed-off-by: Stephan Linz <linz@li-pro.net>
1.Extend the NXP MCUX PWM driver to support three channels (A, B, and X)
instead of two.
2.Add special handling for channel X polarity control via the OCTRL
register, as it uses VAL0 for pulse width instead of the VAL2/VAL3 pair
used by channels A and B.
3.Restore VAL0 when configuring channels A/B to preserve channel X pulse
4.Adjust LDOK timeout to one PWM period
5.Get clock frequency in init function
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Add driver for ADH Technology GT5X series optical fingerprint
sensors. Supports GT-511C1R, GT-511C3, GT-521F32, and GT-521F52
variants.
Features:
- 3-stage enrollment with retry support
- 1:1 verification and 1:N identification
- LED control
- Model-agnostic design via device tree configuration
Signed-off-by: Siratul Islam <email@sirat.me>
Add emulated biometrics driver for testing shell commands
and application logic. Implements full API:
- Configurable attributes
- Template storage with simulated enrollment workflow
- Match operations with configurable success simulation
- LED state tracking
Signed-off-by: Siratul Islam <email@sirat.me>
Add driver for ZFM-x0 series optical fingerprint sensors supporting
ZFM-X0, R30x, JM-101, DY-50, FPM10A, and compatible modules.
Features:
- Multi-sample enrollment flow (2 samples)
- 1:1 verification and 1:N identification matching
- LED control
- Configurable security level and timeout
Signed-off-by: Siratul Islam <email@sirat.me>
Introduces a new drivers subsystem for biometric sensors.
The API supports enrollment, matching, and template storage.
Signed-off-by: Siratul Islam <email@sirat.me>
