drivers: pinctrl: add pinctrl drivers for arm mps3

Adds pinctrl driver for all Arm mps3 targets

Signed-off-by: Samuel Chee <samche01@arm.com>
Signed-off-by: Sudan Landge <sudan.landge@arm.com>

drivers/pinctrl/CMakeLists.txt

@@ -7,6 +7,7 @@ zephyr_library_sources(common.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_TELINK_B91 pinctrl_b91.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_AMBIQ pinctrl_ambiq.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_ARM_MPS2 pinctrl_arm_mps2.c)
+zephyr_library_sources_ifdef(CONFIG_PINCTRL_ARM_MPS3 pinctrl_arm_mps3.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_GD32_AF pinctrl_gd32_af.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_GD32_AFIO pinctrl_gd32_afio.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_ITE_IT8XXX2 pinctrl_ite_it8xxx2.c)

drivers/pinctrl/Kconfig

@@ -37,6 +37,7 @@ config PINCTRL_DYNAMIC
 source "drivers/pinctrl/Kconfig.b91"
 source "drivers/pinctrl/Kconfig.ambiq"
 source "drivers/pinctrl/Kconfig.arm_mps2"
+source "drivers/pinctrl/Kconfig.arm_mps3"
 source "drivers/pinctrl/Kconfig.gd32"
 source "drivers/pinctrl/Kconfig.it8xxx2"
 source "drivers/pinctrl/Kconfig.npcx"

drivers/pinctrl/Kconfig.arm_mps3

@@ -0,0 +1,9 @@
+# Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
+# SPDX-License-Identifier: Apache-2.0
+
+config PINCTRL_ARM_MPS3
+	bool "Arm MPS3 pin controller driver"
+	default y
+	depends on DT_HAS_ARM_MPS3_PINCTRL_ENABLED
+	help
+	  Arm MPS2 pinctrl driver

drivers/pinctrl/pinctrl_arm_mps3.c

@@ -0,0 +1,37 @@
+/*
+ * Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "zephyr/device.h"
+#include "zephyr/drivers/gpio.h"
+#include <zephyr/drivers/pinctrl.h>
+#include <zephyr/devicetree/gpio.h>
+#include <zephyr/drivers/gpio/gpio_cmsdk_ahb.h>
+
+static const struct device *const gpio_ports[] = {DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpio0)),
+						  DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpio1)),
+						  DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpio2))};
+
+static int pinctrl_configure_pin(const pinctrl_soc_pin_t *pin)
+{
+	uint32_t flags = pin->input_enable ? GPIO_INPUT : GPIO_OUTPUT;
+
+	/* Each gpio has 16 pins, so divide by 16 to get specific gpio*/
+	const struct device *gpio_dev = gpio_ports[pin->pin_num >> 4];
+
+	return cmsdk_ahb_gpio_config(gpio_dev, pin->pin_num % 16, flags);
+}
+
+int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
+{
+	ARG_UNUSED(reg);
+	for (uint8_t i = 0U; i < pin_cnt; i++) {
+		if (pinctrl_configure_pin(pins++) == -ENOTSUP) {
+			return -ENOTSUP;
+		}
+	}
+
+	return 0;
+}

dts/bindings/pinctrl/arm,mps3-pinctrl.yaml

@@ -0,0 +1,82 @@
+# Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
+# SPDX-License-Identifier: Apache-2.0
+
+description: |
+    The Arm Mps3 pin controller is a node responsible for controlling
+    pin function selection and pin properties, such as routing a UART3 TX
+    to pin 1.
+
+    The node has the 'pinctrl' node label set in your SoC's devicetree,
+    so you can modify it like this:
+
+      &pinctrl {
+              /* your modifications go here */
+      };
+
+    All device pin configurations should be placed in child nodes of the
+    'pinctrl' node, as shown in this example:
+
+      &pinctrl {
+        /* configuration for the usart0 "default" state */
+        uart3_default: uart3_default {
+          /* group 1 */
+          group1 {
+            /* configure P1 as UART3 TX */
+            pinmux = <UART3_TXD_EXP>;
+          };
+          /* group 2 */
+          group2 {
+            /* configure P0 as UART3 RX */
+            pinmux = <UART3_TXD_EXP>;
+            /* enable input on pin 1 */
+            input-enable;
+          };
+        };
+      };
+
+    The 'uart3_default' child node encodes the pin configurations for a
+    particular state of a device; in this case, the default (that is, active)
+    state.
+
+    As shown, pin configurations are organized in groups within each child node.
+    Each group can specify a list of pin function selections in the 'pinmux'
+    property. Here is a list of supported standard pin properties:
+    - input-enable
+
+    A group can also specify shared pin properties common to all the specified
+    pins, such as the 'input-enable' property in group 2.
+
+    To link pin configurations with a device, use a pinctrl-N property for some
+    number N, like this example you could place in your board's DTS file:
+
+       #include "board-pinctrl.dtsi"
+
+       &uart3 {
+             pinctrl-0 = <&uart3_default>;
+             pinctrl-1 = <&uart3_sleep>;
+             pinctrl-names = "default", "sleep";
+       };
+
+
+compatible: "arm,mps3-pinctrl"
+
+include: base.yaml
+
+child-binding:
+  description: |
+    Definitions for a pinctrl state.
+  child-binding:
+
+    include:
+      - name: pincfg-node.yaml
+        property-allowlist:
+          - input-enable
+
+    properties:
+      pinmux:
+        required: true
+        type: array
+        description: |
+          An array of pins sharing the same group properties. Each
+          element of the array is an integer constructed from the
+          pin number and the alternative function of the pin.

include/zephyr/dt-bindings/pinctrl/arm-mps3-pinctrl.h

@@ -0,0 +1,54 @@
+/*
+ * Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#define MPS3_ALT_FUNC_POS 0
+#define MPS3_ALT_FUNC_MASK 0x7
+
+#define MPS3_EXP_NUM_POS 3
+#define MPS3_EXP_NUM_MASK 0x1F8
+
+#define MPS3_PINCTRL_FUNC_UART 0
+#define MPS3_PINCTRL_FUNC_GPIO 1
+#define MPS3_PINCTRL_FUNC_I2C 2
+#define MPS3_PINCTRL_FUNC_SPI 3
+#define MPS3_PINCTRL_FUNC_PMOD 4
+
+#define MPS3_PINMUX(alt_func, exp_num) (exp_num << MPS3_EXP_NUM_POS | \
+	alt_func << MPS3_ALT_FUNC_POS)
+
+/* GPIO 0 */
+#define PMOD1_IO1_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_PMOD, 0)
+#define PMOD1_IO0_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_PMOD, 1)
+#define PMOD1_SS_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_PMOD, 3)
+#define PMOD0_IO2_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_PMOD, 7)
+#define PMOD0_IO3_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_PMOD, 8)
+#define PMOD1_SCK_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_PMOD, 9)
+#define PMOD0_SS_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_PMOD, 10)
+#define PMOD0_IO0_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_PMOD, 11)
+#define PMOD0_IO1_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_PMOD, 12)
+#define PMOD0_SCK_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_PMOD, 13)
+#define PMOD1_IO3_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_PMOD, 14)
+#define PMOD1_IO2_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_PMOD, 15)
+
+#define UART3_RXD_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_UART, 0)
+#define UART3_TXD_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_UART, 1)
+#define SPI3_SS_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_SPI, 10)
+#define SPI3_MOSI_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_SPI, 11)
+#define SPI3_MISO_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_SPI, 12)
+#define SPI3_SCK_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_SPI, 13)
+#define SBCON2_SDA_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_I2C, 14)
+#define SBCON2_SCL_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_I2C, 15)
+
+
+/* GPIO 1 */
+#define UART4_RXD_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_UART, 16)
+#define UART4_TXD_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_UART, 17)
+#define SPI4_SS_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_SPI, 26)
+#define SPI4_MOSI_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_SPI, 27)
+#define SPI4_MISO_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_SPI, 28)
+#define SPI4_SCK_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_SPI, 29)
+#define SBCON3_SDA_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_I2C, 30)
+#define SBCON3_SCL_EXP MPS3_PINMUX(MPS3_PINCTRL_FUNC_I2C, 31)

soc/arm/mps3/pinctrl_soc.h

@@ -0,0 +1,51 @@
+/*
+ * Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/pinctrl/arm-mps3-pinctrl.h>
+
+/**
+ * @brief Type to hold a pin's pinctrl configuration.
+ */
+struct mps3_pinctrl_soc_pin {
+	/** Pin number 0..52 */
+	uint32_t pin_num : 6;
+	/** Alternative function (UART, SPI, etc.) */
+	uint32_t alt_func : 3;
+	/** Enable the pin as an input */
+	uint32_t input_enable : 1;
+};
+
+typedef struct mps3_pinctrl_soc_pin pinctrl_soc_pin_t;
+
+/**
+ * @brief Utility macro to initialize each pin.
+ *
+ * @param node_id Node identifier.
+ * @param prop Property name.
+ * @param idx Property entry index.
+ */
+#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx)				\
+	{									\
+		MPS3_GET_PIN_NUM(DT_PROP_BY_IDX(node_id, prop, idx)),		\
+		MPS3_GET_PIN_ALT_FUNC(DT_PROP_BY_IDX(node_id, prop, idx)),	\
+		DT_PROP(node_id, input_enable),					\
+	},
+
+/**
+ * @brief Utility macro to initialize state pins contained in a given property.
+ *
+ * @param node_id Node identifier.
+ * @param prop Property name describing state pins.
+ */
+#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop)				\
+	{DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop),			\
+				DT_FOREACH_PROP_ELEM, pinmux,			\
+				Z_PINCTRL_STATE_PIN_INIT)}
+
+#define MPS3_GET_PIN_NUM(pinctrl)				\
+	(((pinctrl) >> MPS3_EXP_NUM_POS) & MPS3_EXP_NUM_MASK)
+#define MPS3_GET_PIN_ALT_FUNC(pinctrl)				\
+	(((pinctrl) >> MPS3_ALT_FUNC_POS) & MPS3_ALT_FUNC_MASK)