Add BUILD_ASSERT to check max val of ngpios. If someone sets ngpios to
more than 32, and acts on pin 32 or higher, memory corruption will
result. This is only a problem with the emulator, real hardware
will have limits that are probably much smaller.
Signed-off-by: Jeremy Bettis <jbettis@google.com>
The return values of esp_wifi_set_mode(), and esp_wifi_set_config() were
overwritten once esp_wifi_start() is executed.
This commit fixes that by ORing the return value to the others.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
PR #49550 missed adding proper RTCIO pin mapping
in a few rtcio functions calls, which causes board
to crash. This fixes it.
Closes#50238
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
With the move to start/stop functions the transceiver is not expected
to be enabled after driver initialization.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The USART or LPUART, especially on stm32wl, must set the EXTI
lines corresponding to the wakeUp source.
This LL_EXTI_LINE_xx is given by the Device Tree property.
This makes the system exiting lowpower stop mode on EXTI irq.
The LL_EXTI_LINE_x is exactly the bit(X) set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fix the issue that the initialization will fail when both
CONFIG_SPI_NOR_SFDP_RUNTIME and CONFIG_SPI_NOR_IDLE_IN_DPD are enabled.
The cause of this problem is simply calling the wrong function.
Fixes#33015
Signed-off-by: Xinyang Tan <xinyang.tan@delve.com>
Previously, the lora_send() function would have returned zero regardless
of any error encountered while waiting for the transmit to complete.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
Up until now, the Zephyr CAN controller drivers set a default bitrate (or
timing) specified via devicetree and start the CAN controller in their
respective driver initialization functions.
This is fine for CAN nodes using only one fixed bitrate, but if the bitrate
is set by the user (e.g. via a DIP-switch or other HMI which is very
common), the CAN driver will still initialise with the default
bitrate/timing at boot and use this until the application has determined
the requested bitrate/timing and set it using
can_set_bitrate()/can_set_timing().
During this period, the CAN node will potentially destroy valid CAN frames
on the CAN bus (which is using the soon-to-be-set-by-the-application
bitrate) by sending error frames. This causes interruptions to the ongoing
CAN bus traffic when a Zephyr-based CAN node connected to the bus is
(re-)booted.
Instead, require all configuration (setting bitrate, timing, or mode) to
take place when the CAN controller is stopped. This maps nicely to entering
"reset mode" (called "configuration mode" or "freeze mode" for some CAN
controller implementations) when stopping and exiting this mode when
starting the CAN controller.
Fixes: #45304
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This adds a very basic driver to utilize the I3C IP block
on MCUX (e.g. RT685). Note that, for now, this only supports
being the active controller on the bus.
Origin: NXP MCUXpresso SDK
License: BSD 3-Clause
URL: https://github.com/zephyrproject-rtos/hal_nxp
Commit: 2302a1e94f5bc00ce59db4e249b688ad2e959f58
Purpose: Enabling the I3C controller on RT685.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds support for a global workqueue so drivers can defer
IBI callbacks instead of doing it in interrupt context.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This introduces the I3C API for I3C controllers. Currently,
this supports one controller per bus under Zephyr.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Currently, the sdhc_card_busy function is unimplemented in the
SDHC SPI-driver. This causes some functions which rely on f_sync(),
such as fs_close(), to fail as it will timeout the busy-check. This PR
implements sdhc_card_busy by checking if the MISO-line is kept high to
check if the SD-card is idle (not busy).
Solves https://github.com/zephyrproject-rtos/zephyr/issues/49982
Signed-off-by: Ivan Herrera Olivares <ivan.herreraolivares@uantwerpen.be>
1. enable timer5 on dts
2. Replace all BTMR_Type with struct btmr_regs, to make it compatiable
on both mec 15 and 17
3. As MEC15 and MEC17 have different ways to access the register, use
"#if defined" to access counter_cfg->girq_id on different board.
Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>
Ensure that the FIFO of each endpoint is initialized during endpoint
configuration, to prevent a NULL FIFO from being encountered during the
first call to usb_dc_ep_write() for a given endpoint.
Signed-off-by: Nick Kraus <nick@nckraus.com>
Add the flash channel support by implementing the controller attached
flash sharing APIs, including flash_read, flash_write, and flash_erase.
For flash_read, the max data payload the module can support is 64 bytes
in one transaction.
For flash_write, the max data payload the module can support is 16
bytes in one transaction.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
DT node "st,stm32f105-pll2-clock" already exists but was not actually used
and PLL2 was not being configured.
PLL2 is available on STM32F105/F107 and should be turned off after turning
off PLL and turned on before turning on PLL again since PLL2 can be
used as a source for PLL. Source for PLL2 is always HSE.
Signed-off-by: Pierre-Emmanuel Novac <piernov@piernov.org>
Fixes an issue with outgoing mcumgr frames that are larger than the
transport MTU size whereby they would wrongly be split up into multiple
frames with multiple start frame headers, which affected SMP over
console transports.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Add support to at86rf212[b] sub-giga devices. This work enables use of
pages 0, 2 and 5 in accordance with IEEE-802.15.4/2003/2006/2011. The
proprietary speeds can be object of future work.
Note: It is recommended that user define a power table for better
performance, low emissions and to save power. A reference power table
can be found in the datasheet and should be used for tests only and
not on a final product.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current version of power table is hardcoded in the driver which is a
problem when use devices in production. This change remove all hardcode
from driver and reimplement the feature to allow people create a table
which is defined in devicetree. The big advantage is that each board can
define their own table based on lab tests and allows use of FEM devices
inclusive.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
In old way, gic_rdists[cpu] is calculated via MPIDR_TO_CORE(), but in
real hardware, MPIDR_TO_CORE() isn't a value increment from 0 one by
one, and that will lead gic_rdists[cpu] to point to a wrong address.
GICv3 provides the register GICR_TYPER[1] and it has a field named
Affinity_Value. This field can help to determine where gic_rdists[cpu]
should point.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
1. Move the defines from usb_dc_mcux.h to usb_device_config.h
and fsl_os_abstraction.h. These headers are used by
the SDK USB driver. usb_dc_mcux.h header file is not longer
needed and hence deleted.
2. Delete the Zephyr implementation of the usb_device_struct
driver and use the one implemented inside the SDK USB
driver. This requires updating the references to
usb_device_struct inside the USB driver
3. Move defines and structures used by the driver
out of the header file that is included by the SDK and
into the MCUX USB driver.
4. Use end point defines provided by Zephyr instead of adding
them locally.
5. Add a Kconfig to set the thread stack size
6. Move code to enable interrupts back to usb_attach function.
Interrupts should be enabled after the init is successful,
else we see errors of the ISR getting called before the
init is complete causing Faults
6. Update west.yml to update the NXP HAL to get the updated
SDK USB driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This commit introduces the 1-wire master driver for maxim ds2485.
The ds2485 master has nearly the same (1-wire) feature set and
i2c-interface as the ds2477.
Therefore the common parts are extracted, but to avoid
any nda troubles only the ds2485 specific part is included.
Compared to older 1-wire masters, the ds2485 supports higher level
commands, supporting multi byte operations, search next, automatic crc
calculation.
In this driver only basic read and write operations are supported,
further hardware features are not yet utilized by the driver.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
In some configurations, a udf instruction may be generated
when compiling code where static global variable lptim_clock_freq is
used as a divisor.
To avoid this, initialize variable on declaration so that compiler
could see that it can't be used uninitialized in this division.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update timer drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
* Enable hardware flow control on Kconfig
* Enable HSI48 clock on sdmmc_stm32 driver
Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
On some stm32 mcus, the LSE is enabled as system clock (LSESYS)
only when the LSEON and LSERDY are both set.
The bit LSESYSEN is set in the RCC BDCR register
and the driver is waiting for the LSESYSRDY to be set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The baudrate register (BRR) of a stm32 USART cannot be lower than 16.
The baudrate register (BRR) of a stm32 LPUART cannot be lower than 0x300
and greater than 0xFFFFF.
Add assertion to check the range.
This could be the case when configuring a baudrate of 9600 on usart
clocked by LSE (32768Hz).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
USBC port (Port 0/1/2/3) OCP (Over Current Protection) status
should be sent to PCH over eSPI VW index 0x50h. But there is
no dedicated VW register mapped to VW index 0x50h.
In this patch, configuring spare VW register SMVW06 to OCP VW
index 50h.
Signed-off-by: Diwakar C <diwakar.c@intel.com>
This driver provides an interface to SocketCAN interfaces of the Linux
system running a Zephyr application with the native_posix board. These
interfaces may be virtual or actual CAN buses.
Signed-off-by: Martin Jäger <martin@libre.solar>
An `ifdef CONFIG_SOC_SERIES_INTEL_ACE1X` currently always evaluates to
true, as `drivers/mm/mm_drv_intel_adsp_mtl_tlb.c` is only built when
`CONFIG_MM_DRV_INTEL_ADSP_MTL_TLB=y`, which depends on
`CONFIG_SOC_SERIES_INTEL_ACE1X`. So remove the ifdef.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Migrate information to DTS and get it from there on the code. Note that
for CAVS 15, the information is not migrated as there's no DTS entry for
it. It can be brought back (in the DTS) if TLB support is enabled for
it.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Instead of using SoC versions, define the information about base and
extended ports on Kconfig, and use this information from there.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Instead of using version of the SoC, declare on Kconfig the need for it,
and use this information to decide upon enabling the code or not.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Update the GPIO-controlled CAN transceiver driver to use the
DT_HAS_CAN_TRANSCEIVER_GPIO_ENABLED Kconfig symbol to expose the driver and
enable it by default based on devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add emulator functionality to the serial_test driver, so that it can be
used to simulate a device on the other end of the uart.
If you don't set the buffer-size property in the dts node, there should
be effectively no change from the previous behavior.
Signed-off-by: Jeremy Bettis <jbettis@google.com>
