michaelh/zephyr
1
0
Fork 0
Code Releases Activity

drivers: fix style issues

Browse source 
Fix issues reported by checkpatch.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2022-01-18 18:21:55 +01:00 • committed by Carles Cufí
commit 8398105d82
7 changed files with 25 additions and 24 deletions
Download patch file Download diff file Expand all files Collapse all files

12
drivers/dma/dma_sam_xdmac.c
View file

@ -53,7 +53,7 @@ static void sam_xdmac_isr(const struct device *dev)
const struct sam_xdmac_dev_cfg *const dev_cfg = dev->config;
struct sam_xdmac_dev_data *const dev_data = dev->data;
Xdmac *const xdmac = dev_cfg->regs;
Xdmac * const xdmac = dev_cfg->regs;
struct sam_xdmac_channel_cfg *channel_cfg;
uint32_t isr_status;
uint32_t err;
@ -84,7 +84,7 @@ int sam_xdmac_channel_configure(const struct device *dev, uint32_t channel,
{
const struct sam_xdmac_dev_cfg *const dev_cfg = dev->config;
Xdmac *const xdmac = dev_cfg->regs;
Xdmac * const xdmac = dev_cfg->regs;
if (channel >= DMA_CHANNELS_NO) {
return -EINVAL;
@ -127,7 +127,7 @@ int sam_xdmac_transfer_configure(const struct device *dev, uint32_t channel,
{
const struct sam_xdmac_dev_cfg *const dev_cfg = dev->config;
Xdmac *const xdmac = dev_cfg->regs;
Xdmac * const xdmac = dev_cfg->regs;
if (channel >= DMA_CHANNELS_NO) {
return -EINVAL;
@ -287,7 +287,7 @@ int sam_xdmac_transfer_start(const struct device *dev, uint32_t channel)
{
const struct sam_xdmac_dev_cfg *config = dev->config;
Xdmac *const xdmac = config->regs;
Xdmac * const xdmac = config->regs;
if (channel >= DMA_CHANNELS_NO) {
return -EINVAL;
@ -310,7 +310,7 @@ int sam_xdmac_transfer_stop(const struct device *dev, uint32_t channel)
{
const struct sam_xdmac_dev_cfg *config = dev->config;
Xdmac *const xdmac = config->regs;
Xdmac * const xdmac = config->regs;
if (channel >= DMA_CHANNELS_NO) {
return -EINVAL;
@ -337,7 +337,7 @@ static int sam_xdmac_initialize(const struct device *dev)
{
const struct sam_xdmac_dev_cfg *const dev_cfg = dev->config;
Xdmac *const xdmac = dev_cfg->regs;
Xdmac * const xdmac = dev_cfg->regs;
/* Configure interrupts */
dev_cfg->irq_config();

8
drivers/flash/flash_sam.c
View file

@ -96,7 +96,7 @@ static int flash_sam_wait_ready(const struct device *dev)
{
const struct flash_sam_dev_cfg *config = dev->config;
Efc *const efc = config->regs;
Efc * const efc = config->regs;
uint64_t timeout_time = k_uptime_get() + SAM_FLASH_TIMEOUT_MS;
uint32_t fsr;
@ -137,7 +137,7 @@ static int flash_sam_write_page(const struct device *dev, off_t offset,
{
const struct flash_sam_dev_cfg *config = dev->config;
Efc *const efc = config->regs;
Efc * const efc = config->regs;
const uint32_t *src = data;
uint32_t *dst = (uint32_t *)((uint8_t *)CONFIG_FLASH_BASE_ADDRESS + offset);
@ -246,7 +246,7 @@ static int flash_sam_erase_block(const struct device *dev, off_t offset)
{
const struct flash_sam_dev_cfg *config = dev->config;
Efc *const efc = config->regs;
Efc * const efc = config->regs;
LOG_DBG("offset = 0x%lx", (long)offset);
@ -320,7 +320,7 @@ static int flash_sam_write_protection(const struct device *dev, bool enable)
{
const struct flash_sam_dev_cfg *config = dev->config;
Efc *const efc = config->regs;
Efc * const efc = config->regs;
int rc = 0;
if (enable) {

4
drivers/pwm/pwm_sam.c
View file

@ -41,7 +41,7 @@ static int sam_pwm_pin_set(const struct device *dev, uint32_t ch,
{
const struct sam_pwm_config *config = dev->config;
Pwm *const pwm = config->regs;
Pwm * const pwm = config->regs;
if (ch >= PWMCHNUM_NUMBER) {
return -EINVAL;
@ -79,7 +79,7 @@ static int sam_pwm_init(const struct device *dev)
{
const struct sam_pwm_config *config = dev->config;
Pwm *const pwm = config->regs;
Pwm * const pwm = config->regs;
uint32_t id = config->id;
uint8_t prescaler = config->prescaler;
uint8_t divider = config->divider;

6
drivers/serial/uart_sam.c
View file

@ -95,7 +95,7 @@ static int uart_sam_poll_in(const struct device *dev, unsigned char *c)
{
const struct uart_sam_dev_cfg *const cfg = dev->config;
Uart *const uart = cfg->regs;
Uart * const uart = cfg->regs;
if (!(uart->UART_SR & UART_SR_RXRDY)) {
return -EBUSY;
@ -111,7 +111,7 @@ static void uart_sam_poll_out(const struct device *dev, unsigned char c)
{
const struct uart_sam_dev_cfg *const cfg = dev->config;
Uart *const uart = cfg->regs;
Uart * const uart = cfg->regs;
/* Wait for transmitter to be ready */
while (!(uart->UART_SR & UART_SR_TXRDY)) {
@ -385,7 +385,7 @@ static const struct uart_driver_api uart_sam_driver_api = {
\
static const struct uart_sam_dev_cfg uart##n##_sam_config; \
\
DEVICE_DT_INST_DEFINE(n, &uart_sam_init, \
DEVICE_DT_INST_DEFINE(n, &uart_sam_init, \
NULL, &uart##n##_sam_data, \
&uart##n##_sam_config, PRE_KERNEL_1, \
CONFIG_SERIAL_INIT_PRIORITY, \

6
drivers/serial/uart_sam0.c
View file

@ -504,7 +504,7 @@ static int uart_sam0_init(const struct device *dev)
const struct uart_sam0_dev_cfg *const cfg = dev->config;
struct uart_sam0_dev_data *const dev_data = dev->data;
SercomUsart *const usart = cfg->regs;
SercomUsart * const usart = cfg->regs;
#ifdef MCLK
/* Enable the GCLK */
@ -633,7 +633,7 @@ static int uart_sam0_poll_in(const struct device *dev, unsigned char *c)
{
const struct uart_sam0_dev_cfg *config = dev->config;
SercomUsart *const usart = config->regs;
SercomUsart * const usart = config->regs;
if (!usart->INTFLAG.bit.RXC) {
return -EBUSY;
@ -647,7 +647,7 @@ static void uart_sam0_poll_out(const struct device *dev, unsigned char c)
{
const struct uart_sam0_dev_cfg *config = dev->config;
SercomUsart *const usart = config->regs;
SercomUsart * const usart = config->regs;
while (!usart->INTFLAG.bit.DRE) {
}

5
drivers/serial/usart_sam.c
View file

@ -95,7 +95,8 @@ static int usart_sam_init(const struct device *dev)
static int usart_sam_poll_in(const struct device *dev, unsigned char *c)
{
const struct usart_sam_dev_cfg *config = dev->config;
Usart *const usart = config->regs;
Usart * const usart = config->regs;
if (!(usart->US_CSR & US_CSR_RXRDY)) {
return -EBUSY;
@ -111,7 +112,7 @@ static void usart_sam_poll_out(const struct device *dev, unsigned char c)
{
const struct usart_sam_dev_cfg *config = dev->config;
Usart *const usart = config->regs;
Usart * const usart = config->regs;
/* Wait for transmitter to be ready */
while (!(usart->US_CSR & US_CSR_TXRDY)) {

8
drivers/watchdog/wdt_sam.c
View file

@ -47,7 +47,7 @@ static void wdt_sam_isr(const struct device *dev)
{
const struct wdt_sam_dev_cfg *config = dev->config;
uint32_t wdt_sr;
Wdt *const wdt = config->regs;
Wdt * const wdt = config->regs;
struct wdt_sam_dev_data *data = dev->data;
/* Clear status bit to acknowledge interrupt by dummy read. */
@ -83,7 +83,7 @@ static int wdt_sam_disable(const struct device *dev)
{
const struct wdt_sam_dev_cfg *config = dev->config;
Wdt *const wdt = config->regs;
Wdt * const wdt = config->regs;
struct wdt_sam_dev_data *data = dev->data;
/* since Watchdog mode register is 'write-once', we can't disable if
@ -108,7 +108,7 @@ static int wdt_sam_setup(const struct device *dev, uint8_t options)
{
const struct wdt_sam_dev_cfg *config = dev->config;
Wdt *const wdt = config->regs;
Wdt * const wdt = config->regs;
struct wdt_sam_dev_data *data = dev->data;
if (!data->timeout_valid) {
@ -216,7 +216,7 @@ static int wdt_sam_feed(const struct device *dev, int channel_id)
* reloaded/feeded with the 12-bit watchdog counter
* value from WDT_MR and restarted
*/
Wdt *const wdt = config->regs;
Wdt * const wdt = config->regs;
wdt->WDT_CR |= WDT_CR_KEY_PASSWD | WDT_CR_WDRSTT;