drivers: pwm: drop DEV_DATA/DEV_CFG usage
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and dev->config instead. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
parent
ccdaf45ba5
commit
1de05e6095
4 changed files with 23 additions and 30 deletions
|
@ -23,15 +23,12 @@ struct pwm_gecko_config {
|
|||
uint8_t pin;
|
||||
};
|
||||
|
||||
#define DEV_CFG(dev) \
|
||||
((const struct pwm_gecko_config * const)(dev)->config)
|
||||
|
||||
static int pwm_gecko_pin_set(const struct device *dev, uint32_t pwm,
|
||||
uint32_t period_cycles, uint32_t pulse_cycles,
|
||||
pwm_flags_t flags)
|
||||
{
|
||||
TIMER_InitCC_TypeDef compare_config = TIMER_INITCC_DEFAULT;
|
||||
const struct pwm_gecko_config *cfg = DEV_CFG(dev);
|
||||
const struct pwm_gecko_config *cfg = dev->config;
|
||||
|
||||
if (BUS_RegMaskedRead(&cfg->timer->CC[pwm].CTRL,
|
||||
_TIMER_CC_CTRL_MODE_MASK) != timerCCModePWM) {
|
||||
|
@ -68,7 +65,7 @@ static int pwm_gecko_get_cycles_per_sec(const struct device *dev,
|
|||
uint32_t pwm,
|
||||
uint64_t *cycles)
|
||||
{
|
||||
const struct pwm_gecko_config *cfg = DEV_CFG(dev);
|
||||
const struct pwm_gecko_config *cfg = dev->config;
|
||||
|
||||
*cycles = CMU_ClockFreqGet(cfg->clock) / cfg->prescaler;
|
||||
|
||||
|
@ -83,7 +80,7 @@ static const struct pwm_driver_api pwm_gecko_driver_api = {
|
|||
static int pwm_gecko_init(const struct device *dev)
|
||||
{
|
||||
TIMER_Init_TypeDef timer = TIMER_INIT_DEFAULT;
|
||||
const struct pwm_gecko_config *cfg = DEV_CFG(dev);
|
||||
const struct pwm_gecko_config *cfg = dev->config;
|
||||
|
||||
CMU_ClockEnable(cfg->clock, true);
|
||||
|
||||
|
|
|
@ -18,12 +18,8 @@ LOG_MODULE_REGISTER(pwm_imx);
|
|||
#define PWM_PWMCR_SWR(x) (((uint32_t)(((uint32_t)(x)) \
|
||||
<<PWM_PWMCR_SWR_SHIFT))&PWM_PWMCR_SWR_MASK)
|
||||
|
||||
#define DEV_CFG(dev) \
|
||||
((const struct imx_pwm_config * const)(dev)->config)
|
||||
#define DEV_DATA(dev) \
|
||||
((struct imx_pwm_data * const)(dev)->data)
|
||||
#define DEV_BASE(dev) \
|
||||
((PWM_Type *)(DEV_CFG(dev))->base)
|
||||
((PWM_Type *)((const struct imx_pwm_config * const)(dev)->config)->base)
|
||||
|
||||
struct imx_pwm_config {
|
||||
PWM_Type *base;
|
||||
|
@ -44,7 +40,7 @@ static int imx_pwm_get_cycles_per_sec(const struct device *dev, uint32_t pwm,
|
|||
uint64_t *cycles)
|
||||
{
|
||||
PWM_Type *base = DEV_BASE(dev);
|
||||
const struct imx_pwm_config *config = DEV_CFG(dev);
|
||||
const struct imx_pwm_config *config = dev->config;
|
||||
|
||||
*cycles = get_pwm_clock_freq(base) >> config->prescaler;
|
||||
|
||||
|
@ -56,8 +52,8 @@ static int imx_pwm_pin_set(const struct device *dev, uint32_t pwm,
|
|||
pwm_flags_t flags)
|
||||
{
|
||||
PWM_Type *base = DEV_BASE(dev);
|
||||
const struct imx_pwm_config *config = DEV_CFG(dev);
|
||||
struct imx_pwm_data *data = DEV_DATA(dev);
|
||||
const struct imx_pwm_config *config = dev->config;
|
||||
struct imx_pwm_data *data = dev->data;
|
||||
unsigned int period_ms;
|
||||
bool enabled = imx_pwm_is_enabled(base);
|
||||
int wait_count = 0, fifoav;
|
||||
|
@ -145,7 +141,7 @@ static int imx_pwm_pin_set(const struct device *dev, uint32_t pwm,
|
|||
|
||||
static int imx_pwm_init(const struct device *dev)
|
||||
{
|
||||
struct imx_pwm_data *data = DEV_DATA(dev);
|
||||
struct imx_pwm_data *data = dev->data;
|
||||
PWM_Type *base = DEV_BASE(dev);
|
||||
|
||||
PWM_PWMPR_REG(base) = data->period_cycles;
|
||||
|
|
|
@ -22,14 +22,12 @@ struct sam_pwm_config {
|
|||
uint8_t divider;
|
||||
};
|
||||
|
||||
#define DEV_CFG(dev) \
|
||||
((const struct sam_pwm_config * const)(dev)->config)
|
||||
|
||||
static int sam_pwm_get_cycles_per_sec(const struct device *dev, uint32_t pwm,
|
||||
uint64_t *cycles)
|
||||
{
|
||||
uint8_t prescaler = DEV_CFG(dev)->prescaler;
|
||||
uint8_t divider = DEV_CFG(dev)->divider;
|
||||
const struct sam_pwm_config *config = dev->config;
|
||||
uint8_t prescaler = config->prescaler;
|
||||
uint8_t divider = config->divider;
|
||||
|
||||
*cycles = SOC_ATMEL_SAM_MCK_FREQ_HZ /
|
||||
((1 << prescaler) * divider);
|
||||
|
@ -41,7 +39,9 @@ static int sam_pwm_pin_set(const struct device *dev, uint32_t ch,
|
|||
uint32_t period_cycles, uint32_t pulse_cycles,
|
||||
pwm_flags_t flags)
|
||||
{
|
||||
Pwm *const pwm = DEV_CFG(dev)->regs;
|
||||
const struct sam_pwm_config *config = dev->config;
|
||||
|
||||
Pwm *const pwm = config->regs;
|
||||
|
||||
if (ch >= PWMCHNUM_NUMBER) {
|
||||
return -EINVAL;
|
||||
|
@ -77,10 +77,12 @@ static int sam_pwm_pin_set(const struct device *dev, uint32_t ch,
|
|||
|
||||
static int sam_pwm_init(const struct device *dev)
|
||||
{
|
||||
Pwm *const pwm = DEV_CFG(dev)->regs;
|
||||
uint32_t id = DEV_CFG(dev)->id;
|
||||
uint8_t prescaler = DEV_CFG(dev)->prescaler;
|
||||
uint8_t divider = DEV_CFG(dev)->divider;
|
||||
const struct sam_pwm_config *config = dev->config;
|
||||
|
||||
Pwm *const pwm = config->regs;
|
||||
uint32_t id = config->id;
|
||||
uint8_t prescaler = config->prescaler;
|
||||
uint8_t divider = config->divider;
|
||||
|
||||
/* FIXME: way to validate prescaler & divider */
|
||||
|
||||
|
|
|
@ -34,8 +34,6 @@ struct pwm_sam0_config {
|
|||
#endif
|
||||
};
|
||||
|
||||
#define DEV_CFG(dev) ((const struct pwm_sam0_config *const)(dev)->config)
|
||||
|
||||
/* Wait for the peripheral to finish all commands */
|
||||
static void wait_synchronization(Tcc *regs)
|
||||
{
|
||||
|
@ -46,7 +44,7 @@ static void wait_synchronization(Tcc *regs)
|
|||
static int pwm_sam0_get_cycles_per_sec(const struct device *dev, uint32_t ch,
|
||||
uint64_t *cycles)
|
||||
{
|
||||
const struct pwm_sam0_config *const cfg = DEV_CFG(dev);
|
||||
const struct pwm_sam0_config *const cfg = dev->config;
|
||||
|
||||
if (ch >= cfg->channels) {
|
||||
return -EINVAL;
|
||||
|
@ -60,7 +58,7 @@ static int pwm_sam0_pin_set(const struct device *dev, uint32_t ch,
|
|||
uint32_t period_cycles, uint32_t pulse_cycles,
|
||||
pwm_flags_t flags)
|
||||
{
|
||||
const struct pwm_sam0_config *const cfg = DEV_CFG(dev);
|
||||
const struct pwm_sam0_config *const cfg = dev->config;
|
||||
Tcc *regs = cfg->regs;
|
||||
uint32_t top = 1 << cfg->counter_size;
|
||||
uint32_t invert_mask = 1 << ch;
|
||||
|
@ -102,7 +100,7 @@ static int pwm_sam0_pin_set(const struct device *dev, uint32_t ch,
|
|||
|
||||
static int pwm_sam0_init(const struct device *dev)
|
||||
{
|
||||
const struct pwm_sam0_config *const cfg = DEV_CFG(dev);
|
||||
const struct pwm_sam0_config *const cfg = dev->config;
|
||||
Tcc *regs = cfg->regs;
|
||||
|
||||
/* Enable the clocks */
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue