drivers: watchdog: drop DEV_DATA/DEV_CFG usage
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and dev->config instead. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
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44679c7bd8
commit
b00150339a
4 changed files with 38 additions and 39 deletions
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@ -64,12 +64,9 @@ struct wdt_esp32_config {
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int irq_source;
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};
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#define DEV_CFG(dev) \
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((const struct wdt_esp32_config *const)(dev)->config)
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#define DEV_DATA(dev) \
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((struct wdt_esp32_data *)(dev)->data)
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#define DEV_BASE(dev) \
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((volatile struct wdt_esp32_regs_t *)(DEV_CFG(dev))->base)
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((volatile struct wdt_esp32_regs_t *) \
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((const struct wdt_esp32_config *const)(dev)->config)->base)
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/* ESP32 ignores writes to any register if WDTWPROTECT doesn't contain the
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* magic value of TIMG_WDT_WKEY_VALUE. The datasheet recommends unsealing,
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@ -126,20 +123,23 @@ static int wdt_esp32_feed(const struct device *dev, int channel_id)
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static void set_interrupt_enabled(const struct device *dev, bool setting)
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{
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*DEV_CFG(dev)->irq_regs.timer_int_clr |= TIMG_WDT_INT_CLR;
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const struct wdt_esp32_config *config = dev->config;
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struct wdt_esp32_data *data = dev->data;
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*config->irq_regs.timer_int_clr |= TIMG_WDT_INT_CLR;
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if (setting) {
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*DEV_CFG(dev)->irq_regs.timer_int_ena |= TIMG_WDT_INT_ENA;
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irq_enable(DEV_DATA(dev)->irq_line);
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*config->irq_regs.timer_int_ena |= TIMG_WDT_INT_ENA;
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irq_enable(data->irq_line);
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} else {
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*DEV_CFG(dev)->irq_regs.timer_int_ena &= ~TIMG_WDT_INT_ENA;
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irq_disable(DEV_DATA(dev)->irq_line);
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*config->irq_regs.timer_int_ena &= ~TIMG_WDT_INT_ENA;
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irq_disable(data->irq_line);
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}
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}
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static int wdt_esp32_set_config(const struct device *dev, uint8_t options)
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{
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struct wdt_esp32_data *data = DEV_DATA(dev);
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struct wdt_esp32_data *data = dev->data;
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uint32_t v = DEV_BASE(dev)->config0;
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if (!data) {
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@ -195,7 +195,7 @@ static int wdt_esp32_set_config(const struct device *dev, uint8_t options)
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static int wdt_esp32_install_timeout(const struct device *dev,
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const struct wdt_timeout_cfg *cfg)
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{
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struct wdt_esp32_data *data = DEV_DATA(dev);
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struct wdt_esp32_data *data = dev->data;
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if (cfg->flags != WDT_FLAG_RESET_SOC) {
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return -ENOTSUP;
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@ -217,8 +217,8 @@ static int wdt_esp32_install_timeout(const struct device *dev,
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static int wdt_esp32_init(const struct device *dev)
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{
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const struct wdt_esp32_config *const config = DEV_CFG(dev);
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struct wdt_esp32_data *data = DEV_DATA(dev);
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const struct wdt_esp32_config *const config = dev->config;
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struct wdt_esp32_data *data = dev->data;
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#ifdef CONFIG_WDT_DISABLE_AT_BOOT
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wdt_esp32_disable(dev);
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@ -268,13 +268,14 @@ static const struct wdt_driver_api wdt_api = {
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static void wdt_esp32_isr(void *arg)
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{
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const struct device *dev = (const struct device *)arg;
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struct wdt_esp32_data *data = DEV_DATA(dev);
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const struct wdt_esp32_config *config = dev->config;
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struct wdt_esp32_data *data = dev->data;
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if (data->callback) {
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data->callback(dev, 0);
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}
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*DEV_CFG(dev)->irq_regs.timer_int_clr |= TIMG_WDT_INT_CLR;
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*config->irq_regs.timer_int_clr |= TIMG_WDT_INT_CLR;
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}
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@ -41,10 +41,6 @@ struct wdt_gecko_data {
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};
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#define DEV_NAME(dev) ((dev)->name)
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#define DEV_DATA(dev) \
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((struct wdt_gecko_data *)(dev)->data)
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#define DEV_CFG(dev) \
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((const struct wdt_gecko_cfg *)(dev)->config)
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static uint32_t wdt_gecko_get_timeout_from_persel(int perSel)
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{
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@ -93,8 +89,8 @@ static int wdt_gecko_convert_window(uint32_t window, uint32_t period)
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static int wdt_gecko_setup(const struct device *dev, uint8_t options)
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{
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const struct wdt_gecko_cfg *config = DEV_CFG(dev);
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struct wdt_gecko_data *data = DEV_DATA(dev);
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const struct wdt_gecko_cfg *config = dev->config;
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struct wdt_gecko_data *data = dev->data;
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WDOG_TypeDef *wdog = config->base;
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if (!data->timeout_installed) {
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@ -130,8 +126,8 @@ static int wdt_gecko_setup(const struct device *dev, uint8_t options)
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static int wdt_gecko_disable(const struct device *dev)
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{
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const struct wdt_gecko_cfg *config = DEV_CFG(dev);
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struct wdt_gecko_data *data = DEV_DATA(dev);
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const struct wdt_gecko_cfg *config = dev->config;
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struct wdt_gecko_data *data = dev->data;
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WDOG_TypeDef *wdog = config->base;
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WDOGn_Enable(wdog, false);
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@ -144,7 +140,7 @@ static int wdt_gecko_disable(const struct device *dev)
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static int wdt_gecko_install_timeout(const struct device *dev,
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const struct wdt_timeout_cfg *cfg)
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{
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struct wdt_gecko_data *data = DEV_DATA(dev);
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struct wdt_gecko_data *data = dev->data;
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data->wdog_config = (WDOG_Init_TypeDef)WDOG_INIT_DEFAULT;
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uint32_t installed_timeout;
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@ -216,7 +212,7 @@ static int wdt_gecko_install_timeout(const struct device *dev,
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static int wdt_gecko_feed(const struct device *dev, int channel_id)
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{
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const struct wdt_gecko_cfg *config = DEV_CFG(dev);
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const struct wdt_gecko_cfg *config = dev->config;
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WDOG_TypeDef *wdog = config->base;
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if (channel_id != 0) {
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@ -232,8 +228,8 @@ static int wdt_gecko_feed(const struct device *dev, int channel_id)
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static void wdt_gecko_isr(const struct device *dev)
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{
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const struct wdt_gecko_cfg *config = DEV_CFG(dev);
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struct wdt_gecko_data *data = DEV_DATA(dev);
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const struct wdt_gecko_cfg *config = dev->config;
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struct wdt_gecko_data *data = dev->data;
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WDOG_TypeDef *wdog = config->base;
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uint32_t flags;
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@ -248,7 +244,7 @@ static void wdt_gecko_isr(const struct device *dev)
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static int wdt_gecko_init(const struct device *dev)
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{
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const struct wdt_gecko_cfg *config = DEV_CFG(dev);
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const struct wdt_gecko_cfg *config = dev->config;
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#ifdef CONFIG_WDT_DISABLE_AT_BOOT
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/* Ignore any errors */
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@ -43,13 +43,11 @@ struct wdt_sam_dev_data {
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static struct wdt_sam_dev_data wdt_sam_data = { 0 };
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#define DEV_CFG(dev) \
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((const struct wdt_sam_dev_cfg *const)(dev)->config)
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static void wdt_sam_isr(const struct device *dev)
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{
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const struct wdt_sam_dev_cfg *config = dev->config;
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uint32_t wdt_sr;
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Wdt *const wdt = DEV_CFG(dev)->regs;
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Wdt *const wdt = config->regs;
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struct wdt_sam_dev_data *data = dev->data;
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/* Clear status bit to acknowledge interrupt by dummy read. */
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@ -83,7 +81,9 @@ int wdt_sam_convert_timeout(uint32_t timeout, uint32_t sclk)
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static int wdt_sam_disable(const struct device *dev)
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{
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Wdt *const wdt = DEV_CFG(dev)->regs;
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const struct wdt_sam_dev_cfg *config = dev->config;
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Wdt *const wdt = config->regs;
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struct wdt_sam_dev_data *data = dev->data;
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/* since Watchdog mode register is 'write-once', we can't disable if
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@ -106,8 +106,9 @@ static int wdt_sam_disable(const struct device *dev)
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static int wdt_sam_setup(const struct device *dev, uint8_t options)
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{
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const struct wdt_sam_dev_cfg *config = dev->config;
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Wdt *const wdt = DEV_CFG(dev)->regs;
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Wdt *const wdt = config->regs;
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struct wdt_sam_dev_data *data = dev->data;
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if (!data->timeout_valid) {
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@ -208,12 +209,14 @@ static int wdt_sam_install_timeout(const struct device *dev,
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static int wdt_sam_feed(const struct device *dev, int channel_id)
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{
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const struct wdt_sam_dev_cfg *config = dev->config;
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/*
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* On watchdog restart the Watchdog counter is immediately
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* reloaded/feeded with the 12-bit watchdog counter
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* value from WDT_MR and restarted
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*/
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Wdt *const wdt = DEV_CFG(dev)->regs;
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Wdt *const wdt = config->regs;
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wdt->WDT_CR |= WDT_CR_KEY_PASSWD | WDT_CR_WDRSTT;
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@ -59,10 +59,9 @@ struct wdt_sifive_dev_data {
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bool timeout_valid;
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};
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#define DEV_CFG(dev) \
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((const struct wdt_sifive_device_config *const)(dev)->config)
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#define DEV_REG(dev) \
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((struct wdt_sifive_reg *)(DEV_CFG(dev))->regs)
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((struct wdt_sifive_reg *) \
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((const struct wdt_sifive_device_config *const)(dev)->config)->regs)
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/**
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* @brief Set maximum length of timeout to watchdog
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