The pressure compensation computed X2 as B1 * B6^2 / 2^27 because the
divisor constant was 0x8000000 instead of 0x10000000. The datasheet
specifies X2 = (B1 * (B6 * B6 / 2^12)) / 2^16, i.e. B1 * B6^2 / 2^28,
so reported pressure was too low by up to ~10 hPa at temperature
extremes.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
To support external USB hubs, we need to distinguish
data not only by endpoint number, but also by device
address. For this purpose additional members were
added to the channel data structure, that now holds
the information and do not interfere, when several
devices has the same endpoint number.
Signed-off-by: Roman Leonov <jam_roma@yahoo.com>
Interrupt transfer is a periodic transfer which USB host
needs periodically to poll at a fixed interval.
ch_handle_in_interrupt() handles the IN interrupt during the
channel IRQ handling.
ch_schedule_interrupt and ch_start_interrupt() to schedule the
frame for periodic transfer and start it, using the enqueued
xfer.
validate_interrupt_xfer() to verify the correctness of the
enqueued xfer to provide the better debug options.
Signed-off-by: Roman Leonov <jam_roma@yahoo.com>
The SQE-exhaustion error path cleared data->stream.iodev_sqe before
passing it to rtio_iodev_sqe_err(), so the pending submission was always
completed with a NULL pointer. Cache the pointer in a local first, as the
two neighbouring error paths already do.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The millimetre conversion evaluated 2^31 / (2^shift * 1e6) as an integer
division before applying it, truncating the scale factor to 0 for shift
>= 12 and to a ~4.6% low value otherwise. Fold the 2^31/2^shift into a
single left shift applied before the 1e6 divide.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The streaming path only read the RESOLUTION X/Y LOWER registers, leaving
the high bytes of the packed 16-bit resolution values in the RTIO
mempool buffer uninitialized, which made the decoder compute a bogus CPI
and shift. Read all four registers, as the one-shot path already does,
so the resolution comes from the sensor itself.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The stream completion callback armed the data-ready backup timer before
flushing the bus CQEs, then errored the SQE without clearing
data->stream.iodev_sqe, so the timer later dereferenced an SQE already
returned to the RTIO pool. Arm the timer only after the error check, use
handle_result_on_error() on the failure path, and stop the timer there.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
paa3905_stream_submit() and pat9136_stream_submit() switched on
read_config->channels[i].chan_type while comparing SENSOR_TRIG_*
values and reading triggers[i].opt. channels and triggers alias the
same union but have different strides unless enums are 2 bytes wide,
so any entry past index 0 decoded garbage and the stream was rejected
with -ENOTSUP. Switch on read_config->triggers[i].trigger instead.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The MAXUSB HAL kills every pending request on a bus reset without
running its completion callback, and udc_setup_received() clears the
busy flag for the control pair only. A bulk endpoint that was
mid-transfer therefore stays busy for good, and udc_event_xfer_out()
returns before arming it without a word: the endpoint never delivers
again until the part is reset.
Clear it where the transfer is abandoned - in ep_dequeue, as every other
UDC driver does, and in ep_disable, whose MXC_USB_ResetEp() drops the
transfer too.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
WIFI_NM_WPA_SUPPLICANT_WEP is deprecated and insecure, and selecting it
from the driver forces it on for every application, failing twister
now that deprecated Kconfig symbols are treated as errors. Drop the
select; applications needing WEP can still enable it.
Assisted-by: Claude:opus-5.5
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
i3c_bus_init() temporarily raises the Open-Drain SCL high period
so I3C Basic targets disable their I2C spike filter. Restoring
the configured value before ENTDAA caused some targets to miss
dynamic address assignment. Restore it after DAA instead.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
TIMINGR0 is read-only while the I3C peripheral is enabled. Disable the
peripheral before updating the clock waveform and restore its previous
state afterward.
This allows i3c_bus_init() to apply the required Open-Drain SCL high
period before broadcast commands. Remove the no-longer-needed
od-thigh-min-ns workaround from the X-NUCLEO-IKS4A1 sample overlays.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
The STM32 I3C peripheral exposes one SCLH_I3C timing field that is
shared by both Open-Drain and Push-Pull high phases.
Update the STM32 timing path to derive the programmed SCL high period
from the strictest controller requirement by taking the maximum of:
- scl_od_min.high_ns
- scl_pp_min.high_ns
- the hardware minimum
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
CONFIG_UDC_DRIVER_LOG_LEVEL only exists when CONFIG_LOG is enabled, so
using it in a plain C condition breaks any build that compiles this
driver without logging.
Assisted-by: Claude:claude-fable-5
Signed-off-by: Tom Burdick <thomas.burdick@infineon.com>
This change enhances USB_HostHelperGetPeripheralInformation()
so the MCUX USB host driver can correctly report hub-related
topology data, including the parent hub address, port number,
nearest high speed hub, HS hub port, hub think time and level.
The goal is to ensure proper device identification and routing,
especially when full speed or low speed devices are connected
behind multi level or high speed hubs.
Signed-off-by: Aiden Hu <weiwei.hu@nxp.com>
Dynamically allocating fifo sizes leads to very complex code that yields
subpar results. DWC2 controller has very specific requirements related
to configured FIFO sizes that significantly increase the complexity:
* each fifo has specific upper bound on both size and starting
location (fixed for each silicon)
* assigned locations must be contiguous
* assigned locations cannot be changed on-the-fly
Zephyr tried to dynamically assign fifos using simple but essentially
broken algorithm that:
* assumed 1-to-1 endpoint number to TxFIFO mapping
DWC2 controller can be configured with non-contiguous IN endpoint
numbers, but TxFIFOs are always contiguous.
* allocated minimum required space for each endpoint
There is no benefit in using less SPRAM than hardware has available,
but using only 128 locations per bulk endpoint significantly limits
maximum transfer rate when using DMA. At least 256 locations allows
DMA to load next packet data before previous packet is transmitted
on the bus. Actual performance degradation depends on clock rates
and latencies. MSC on nRF54H20 using bulk endpoints with only 128
locations can achieve no more than 15.6 MB/s throughput, while with
256 locations speeds up to 36.9 MB/s are possible (running otherwise
identical software).
* used one-size-fits-all defaults for RxFIFO
Remedied with some upper limits calculated at runtime, but the limit
was not taking into account complete configuration.
* was unable to effectively handle multiple alternate settings
This did lead to set interface failures where e.g. HID interface
with wMaxPacketSize > 64 was not using the highest numbered IN
endpoint within active configuration.
Instead of trying to come up with bandaid for each issue that would
significantly complicate the code, just shift the responsibility towards
firmware developer. While for many typical applications board defaults
are perfectly fine, the application developer may want to come up with
specific devicetree overrides best suited for their use case.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Add an init-only display bridge driver for the Analog Devices ADV7535.
Configure the bridge over I2C, program its video timings, and attach it
to a Zephyr MIPI DSI host. The DSI link is described by the auxiliary
adi,adv7535-dsi node pointed at by dsi-device: the host device, the
virtual channel and the lane and pixel format settings all come from
there. Support four-lane RGB888 16:9 video modes.
Add Kconfig and CMake integration and instantiate the driver in the
display build-all test.
Assisted-by: Claude:claude-opus-5.5
Signed-off-by: Paolo Wattebled <paolo.wattebled@savoirfairelinux.com>
Signed-off-by: Jerome LAMY <jerome.lamy@savoirfairelinux.com>
Passing a wait of K_NO_WAIT to the pwm_capture_cycles() function causes
the k_sem_take function to return -EBUSY unless the capture has
completed. This condition is not tested for and causes the function
to ignore the error case and allow the function to use capture status
and data values that have not been initialized, reporting success
whenever the data happens to be zero. The capture is also left armed
with a pointer to the stack frame being unwound.
A single capture cannot complete without waiting, so change the
pwm_capture_cycles() function to reject a K_NO_WAIT timeout with -EINVAL
before configuring a capture. Update the API documentation to reflect
this behavior.
Assisted-by: Copilot:claude-opus-5
Signed-off-by: John Batch <john.batch@infineon.com>
The driver did not support consecutive read or write transactions from
different buffers without a STOP and START being injected onto the bus.
When this happens during a write transaction, the target device interprets
the first byte(s) of the second transaction is interpreted as an address,
storing the rest of the data at the wrong location.
Implement the I2C state machine such that the bus is held for
consecutive same-direction messages, appending each buffer without
re-addressing and ending a run when I2C_MSG_STOP, I2C_MSG_RESTART,
or a direction changes are requested.
I2C Read transactions now use the hardware RX FIFO, reducing interrupt
overhead for read transactions on this platform.
Assisted-by: Copilot:claude-opus-5
Signed-off-by: John Batch <john.batch@infineon.com>
uart_mchp_init() assumes the SERCOM it is handed has never been used.
It issues no software reset and makes no check, and then writes the
character size, parity, stop bits, clock source and baud rate straight
into registers the SERCOM write-protects while CTRLA.ENABLE is set.
From a cold reset that assumption holds. Under a bootloader it does not:
MCUboot drives its own console out of this same SERCOM and hands it over
still enabled, so none of the configuration above takes effect and the
application's console never comes up. On a PIC32CM5112GC00100 the image
chainloaded by MCUboot faults during this device's init, which is
visible over SWD as the console device being the one entry in
device_states that never reaches initialized.
The fix is the sequence the datasheet prescribes: when the peripheral is
found enabled, clear ENABLE, wait for synchronization, assert
CTRLA.SWRST and wait again. On a cold boot the branch is not taken, so
nothing changes for the case that already worked.
This is the same defect as the DPLL patch beside it, in another driver -
init code that reads its own state rather than the hardware's and so
only works on the first boot after reset.
Signed-off-by: Arkadiusz Grzelka <devitwise@gmail.com>
Add AES support for STM32 SocS based on STM32 HAL2
(CONFIG_STM32_HAL2=y). This change covers only AES ciphering,
not AEAD modes.
Update manifest to upgrade hal_stm32 module for enabling by default
AES modes in the AES HAL driver and to allow it to compile when
DMA support is disabled.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add some helper macros and typedefs and move some sequences location
in the source file to better add support for STM32 SoCs based on
STM32 HAL2 (CONFIG_STM32_HAL2).
No functional changes.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Map the vendor MESH_EVENT_LAYER_CHANGE event to a new
ESP_WIFI_MESH_EVENT_LAYER_CHANGE notification so the application
learns when this node's tree depth changes, not just on
attach/detach. The mesh samples log the new layer.
Assisted-by: Claude:claude-sonnet-5
Signed-off-by: Humphrey Chiramba <humphrey@plentify.co.za>
apollox_blue.h declares bt_apollo_vnd_setup() with a struct
bt_hci_lockstep parameter but does not include the header that defines
the type, relying on its includers to have done so. Include it, and
document the parameter. Both includers already include it first, so
nothing changes for them.
Assisted-by: Claude:claude-fable-5-1
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
A failed open() stops the RX thread and takes the controller down, but
leaves transport_open set and the session counter unchanged, so a send
that is waiting for the SPI semaphore, or sleeping between its attempts,
goes on to talk to a controller that is down, or to the one a later
open() brings up. End the session in the failed-open unwind the way
close() does. The semaphore take gets an explicit void cast: the
semaphore is never reset, so the take cannot fail, and there is nothing
the unwind could do about it if it did.
Build-tested on apollo4p_blue_kxr_evb. Not run on hardware.
Assisted-by: Claude:claude-fable-5-1
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
bt_apollo_controller_init() resets the controller through its reset
line and loads it over the raw SPI path, outside the lockstep helper,
so the helper's command allowance does not follow. After a close(), the
helper is left in whatever state the last command left it, and the
freshly started controller allows one command again without announcing
it. Restore the helper's initial allowance with bt_hci_lockstep_reset()
before the vendor setup sends its first command.
Build-tested on apollo4p_blue_kxr_evb. Not run on hardware.
Assisted-by: Claude:claude-fable-5-1
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
After an I2C software reset the FXAS21002 NACKs bus transactions
until its boot sequence finishes. The datasheet states that the
digital interface is accessible 50 ms after VDD/VDDIO power-up or
reset. Sleep that interval before polling CTRL_REG1 so initialization
does not fail while the device is still booting.
Signed-off-by: Sudarshan Iyengar <sudarshan.iyengar@alifsemi.com>
Add initial ADC driver support for Texas Instruments ADS1262
and ADS1263 devices.
The driver supports ADC1 32-bit conversions with DRDY-based conversion
completion, runtime single-ended and differential input configuration,
programmable PGA gain from 1 to 32, an internal 2.5-V reference, and an
optional hardware reset GPIO.
Signed-off-by: Dharanipathi Parthiban <dharanipathi@sacrasys.com>
The comments named coprocessor build options, which the
undefined Kconfig symbol check reports because it cannot tell
a comment from code. They mean nothing in this tree.
Assisted-by: Claude:opus-5
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The 5 GHz gate used a soc capability defined only by the HAL.
Add it to the esp32c5 caps, the only part that has it, under
the SOC_ESP32 prefix the soc folder uses.
Read the modem sleep frequency from the HAL as well, dropping
a second option that the HAL provided.
Assisted-by: Claude:opus-5
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The switch to the crystal re-sources the console uart to xtal
without checking that the console is a uart at all. With the
usb serial jtag console the uart number is the rom usb device
index, which maps to the lp uart. The hal aborts on it on the
c5, c6 and p4; on the c61 it silently reconfigures uart2
instead.
Guard the block on CONFIG_ESP_CONSOLE_UART like the pll branch
already does, and move the preceding tx drain inside the guard
so it no longer passes the rom device index, or -1 when no
console is chosen, to the rom helper.
Assisted-by: Claude:opus-5
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Adds support for basic CS35L56 smart amplifier functionality. This
only supports the integrated DSP running in ROM mode.
Signed-off-by: Ricardo Rivera-Matos <ricardo.rivera-matos@cirrus.com>
The return value of icm4xxxx_set_accel_ln_bw() was dropped, so the
following "if (err < 0)" guard re-tested the stale gyro result and
could never catch a failure. Assign the result to err so that a
failing accel low-pass filter configuration aborts initialization.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The FIFO flush branch of the stream completion handler prepared the
FIFO_CONFIG2 write SQEs but never submitted them, leaving the flush
stranded in the bus RTIO queue until an unrelated submission ran it.
Submit the bus context right after preparing the write.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The event handler dereferenced data->stream.iodev_sqe to fetch the
read config before the NULL/canceled guard that exists precisely to
handle a missing submission. Defer the assignment until after the
guard. The same defect in icm566xx is fixed as well.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
icm45686_get_shift() did not handle ICM45686_DT_GYRO_FS_15_625, so
decoding any gyro channel failed with -EINVAL (and left the FIFO
decoder's shift uninitialized) when that full-scale range was
selected in devicetree. Add the missing case with shift 4, following
the existing progression.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The SENSOR_CHAN_APEX_MOTION case in icm45686_channel_get() had no
break statement, so it fell through to the default case and always
returned -ENOTSUP even though valid APEX data had been written to
the output values. Add the missing break so the channel returns 0.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The driver read the WHO_AM_I register under a "Confirm ID Value
matches" comment but never compared the result, so init succeeded on
any device that ACKed. Store the expected per-variant ID in the
config and return -ENODEV on mismatch.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
Now that wake-up pins can be used for something other than poweroff,
drop the wake-up configuration path's dependency on CONFIG_POWEROFF.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
The function exported by this module was branded as `gpioport` and its
signature was in `stm32_gpio_shared.h`, even though the function can
work with all GPIO port controllers disabled since it only operates
on PWRC registers.
Rebrand the function as `pwrc` instead of `gpioport` and move it to the
`stm32_common.h` header instead, for lack of a better location...
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Create a dedicated Kconfig option which controls compilation of the
STM32 GPIO port manager module, and select this option explicitly in
the Kconfig for the STM32 GPIO and PINCTRL drivers which require this
module.
This replaces the previous approach where the SoC common CMakeLists
would add the GPIO port manage module to the build automatically if
either of the STM32 GPIO or PINCTRL module was enabled; an explicit
select at Kconfig level makes the dependency more visible.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Add an architectural entropy driver based on the seed CSR of the RISC-V
Zkr extension. Like the ARM64 driver it has no devicetree node, it is
enabled when the harts implement Zkr and is returned by
entropy_get_default_device() if no zephyr,entropy node is chosen.
Each access to the seed CSR delivers 16 bits of entropy or a status
telling that none is available yet. In that case the driver retries a
limited number of times if it is allowed to busy-wait. The entropy is
returned as delivered by the hardware, without conditioning.
The seed CSR is accessed with csrrw as read-only accesses trap, and the
value is truncated to the 32 bits of the CSR, since QEMU returns it
sign-extended on RV64.
Assisted-by: Claude:claude-fable-5-1
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
The VirtIO MMIO init wrapper enables its IRQ even when
virtio_mmio_init_common() returns an error, leaving an interrupt
unmasked for a transport that failed initialization.
Return immediately on failed common initialization so the IRQ is only
enabled after the transport initializes successfully.
Assisted-by: ChatGPT:GPT-5.6 Sol
Signed-off-by: Alejandro Sánchez <alesangreat@gmail.com>
- Connect all RTC IRQ lines for PIC32CZ CA using
LISTIFY instead of only index 0.
- PIC32CZ CA supports multiple RTC interrupt lines,
while the existing code connects only the first IRQ line.
- Increase the RTC synchronization timeout from 5 ms
to 10 ms to accommodate the synchronization delay on PIC32CZ CA.
- Also update the timeout message to correctly indicate RTC
synchronization rather than an RTC reset.
Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
Four vendor scripts still asked the module for a hardcoded N1 of 127
while the CMUX transmit cap follows CONFIG_MODEM_CMUX_MTU, so raising
that symbol left the host willing to emit frames the module was told
never to expect. Convert them as the other thirteen already are.
Signed-off-by: Paulo Santos <pauloxrms@gmail.com>
Stop active Xen domain watchdog timers during device PM suspend and
recreate them on resume. The PM path keeps the watchdog setup state
owned by the public watchdog API: suspend only records PM state and
tears down the Xen timers temporarily, while disable remains the path
that clears installed channel configuration.
Reject setup, disable, and timeout installation while the device is
suspended. This prevents public API calls from racing with PM resume and
losing a Xen timer ID or re-arming a watchdog that the application meant
to disable.
Use a non-blocking take of the device-wide setup/teardown semaphore in
the PM callback and return -EBUSY if another watchdog operation owns it.
The suspend path also uses non-blocking per-channel locks before
tearing down active Xen timers, so it reports -EBUSY instead of waiting
for an in-flight feed operation.
Signed-off-by: Vladyslav Goncharuk <vladyslav_goncharuk@epam.com>
Assisted-by: Codex:gpt-5
Expose Xen domain watchdog timers through Zephyr's watchdog driver API.
The backend maps each Zephyr channel to the Xen watchdog ID returned by
xen_sched_watchdog(), converts Zephyr millisecond timeouts to Xen's
second-based timeout values, and takes the number of exposed channels
from devicetree.
Xen owns the actual timer and applies the domain watchdog policy when
the guest misses a feed, so unsupported Zephyr features are rejected
explicitly: callbacks, windowed timeouts, pause options, reset semantics
other than domain reset, and timeout windows shorter than one second.
Track installed and active channel state with atomics so feed operations
can run without taking the setup/teardown semaphore. Feed and teardown
of the same channel use a per-channel semaphore, so teardown blocks in
the scheduler while a feed hypercall is in progress instead of spinning
on a manually tracked in-flight count.
Map watchdog API failures to the documented errno values. Timeout
installation reports -ENOMEM when no channel is available, and feed
reports -EINVAL for invalid or inactive channels.
Signed-off-by: Vladyslav Goncharuk <vladyslav_goncharuk@epam.com>
Assisted-by: Codex:gpt-5
Add xen_sched_watchdog() as the Zephyr Xen wrapper for the Xen
SCHEDOP_watchdog scheduler operation. The Xen ABI returns a newly
created watchdog identifier as the hypercall return value, while later
updates and destroy requests pass the existing identifier in the request
structure.
Keeping that convention inside drivers/xen gives watchdog users a normal
errno-style helper: callers pass an ID pointer, receive the Xen-assigned
ID through that pointer, and see zero on success. The wrapper rejects an
ambiguous destroy request where both the ID and timeout are zero, and it
also treats a zero ID returned by the create path as an I/O error so the
caller cannot later leak an untracked Xen watchdog timer.
Signed-off-by: Vladyslav Goncharuk <vladyslav_goncharuk@epam.com>
Assisted-by: Codex:gpt-5
