Commit graph

24538 commits

Author SHA1 Message Date
Anders Bjørn Nedergaard
18bff321be drivers: sensor: temperature: Add i.MX RT die temperature sensor
Added driver for i.MX RT118X die temperature sensor

Signed-off-by: Anders Bjørn Nedergaard <abn@polytech.com>
2025-09-12 16:06:31 -04:00
Matthias Hauser
5d0644627f drivers: sensor: include z-axis in Anymotion interrupt on the BMI270
include z-axis in Anymotion interrupt on the BMI270

Signed-off-by: Matthias Hauser <Matthias.Hauser@we-online.de>
2025-09-12 16:05:40 -04:00
Khanh Nguyen
bc15acc0fa drivers: dma: add support for Renesas RA DMAC driver
Add support for the Renesas RA Direct Memory Access Controller,
including driver source files, Kconfig options, and DTS bindings.

- Add initial implementation of the RA DMAC driver
- Add dedicated Kconfig and CMake integration
- Provide Devicetree bindings for the RA DMAC
- Update module Kconfig to include the new driver

This enables DMA functionality on Renesas RA series MCUs.

Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
2025-09-12 14:23:37 -04:00
Pete Johanson
f51ba58dfd drivers: serial: Fix TX of single byte on MAX32.
MAX32 UART's "almost empty" fires when the FIFO gets down to one byte, but
when sending just one byte, no interrupt is raised, resulting in stalled
TX. Use a timer to ensure the ISR is invoked and TX processing continues in
that scenario.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2025-09-12 14:22:55 -04:00
Riadh Ghaddab
a4f5d9fb31 drivers: flash: nrf_rram: add support for RRAM throttling
Some applications need to throttle RRAM writes to handle peak current
management.
Add CONFIG_NRF_RRAM_THROTTLING_DATA_BLOCK which defines the maximum
chunk length that can be written at once.
Add CONFIG_NRF_RRAM_THROTTLING_DELAY which configures the sleep delay in
microseconds after each write.

Signed-off-by: Riadh Ghaddab <riadh.ghaddab@nordicsemi.no>
2025-09-12 18:32:23 +02:00
Andre Heinemans
45abb7215c drivers: nxp: flash_mcux_flexspi: fix id check on octal spi
The jedec-id cannot be read after flash device is set to octal mode.
Fixed by moving the jedec-id comparison to
flash_flexspi_nor_check_jedec() which already reads the jedec-id when
flash device is still in single spi mode.

Signed-off-by: Andre Heinemans <andre.heinemans@nxp.com>
2025-09-12 18:30:44 +02:00
Adib Taraben
27711e69d3 eth_nxp_enet_qos_mac: adapt MAC configuration to actual PHY link speed
This adjust the MAC CONFIGURATION register settings to 10MBit/s if needed.
The reduction is needed for 10MBit only PHYs.

Signed-off-by: Adib Taraben <theadib@gmail.com>
2025-09-12 18:30:30 +02:00
Armin Kessler
85ad69d491 drivers: video: esp32: add selection api
Forward get/set selection to the camera source and update the driver's
video_format on set so buffer sizing and streaming follow the selected
region.

Signed-off-by: Armin Kessler <ake@espros.com>
2025-09-12 14:03:45 +01:00
Tim Lin
24de607380 drivers/i2c: it8xxx2: Allow I2C target entry power saving mode
Add I2C_TARGET_ALLOW_POWER_SAVING config. Enable this config makes I2C
target device can enter Doze/Deep doze states while the bus is idle.
Ongoing transfers will block low-power entry until they are completed,
ensuring correct communication while still reducing overall power
consumption.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-09-12 13:20:51 +02:00
Yangbo Lu
5aaf69e145 net: ethernet: make inclusion relation clear for DSA and Ethernet headers
DSA is part of Ethernet and will utilize more Ethernet definitions for
more features support. So, it's proper to let DSA header include
Ethernet header with moving some DSA definiton from DSA header to
Ethernet header and adding DSA header including in c files using DSA
definition.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-09-12 13:19:41 +02:00
Yangbo Lu
0501be8090 net: ethernet: use void pointer for dsa switch context
In ethernet_context structure, it just needs a void pointer
for dsa switch context.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-09-12 13:19:41 +02:00
Fin Maaß
d2988fc91f drivers: serial: litex: trivial changes
some trivial changes

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-09-12 13:18:30 +02:00
Fin Maaß
cf3701ccad drivers: serial: litex: only clear rx pending if needed
only clear rx pending if needed

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-09-12 13:18:30 +02:00
Fin Maaß
b97a0b174a drivers: serial: litex: fix set pending in uart_litex_fifo_fill function
fix set pending in uart_litex_fifo_fill function

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-09-12 13:18:30 +02:00
Fin Maaß
d245529329 drivers: serial: litex: remove unneeded soft irq
remove unneeded soft irq, as disabeled irqs
will still be registered, but just not propagated
to the cpu until it is enabled again.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-09-12 13:18:30 +02:00
Samuel Coleman
8cc80069a7 drivers: serial: stm32: expand DMAT errata test.
I manually checked the errata sheets for all STM32Hxx/STM32Uxx parts to
confirm the defect's presence or absence. It appears to have been resolved
in silicon on newer parts (e.g., STM32U3xx family), so hopefully this test
will not need grow further (knock on wood).

Co-authored-by: Nicolas Zuluaga <nicolas.zuluaga@rbr-global.com>
Signed-off-by: Samuel Coleman <samuel.coleman@rbr-global.com>
2025-09-12 08:19:25 +01:00
Johan Alfvén
48ad0d9644 drivers: ethos_u: update dcache API for new HAL
Update ethosu_flush_dcache() and ethosu_invalidate_dcache() to accept
base_addr and base_addr_size arrays, with num_base_addr as the element
count, as required by the new Ethos-U driver. Add (uintptr_t) casts to
support 32-bit targets.

Signed-off-by: Johan Alfvén <johan.alfven@arm.com>
2025-09-11 18:08:43 +01:00
Andre Heinemans
7a2ba69a54 drivers: flash_mcux_flexspi_nor: take write-block-size from dts
Some devices supported by this driver do not have a write-block-size
of 1 such as the mt35xu01gbba. This value is assigned in the dts and can
be used instead.

Signed-off-by: Andre Heinemans <andre.heinemans@nxp.com>
2025-09-11 18:08:09 +01:00
Holt Sun
d7e41fd2e3 drivers: rtc: add counter RTC driver for virtual RTC device.
Counter RTC driver is written using the counter API as a
target instead of a hardware. It can adapt to all RTC
device without broken-down time register but with counter.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-09-11 18:07:59 +01:00
Holt Sun
7ac4180c58 drivers: counter: update nxp rtc counter drivers.
Don't clear match register when stop counter.
Fix some build warning.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-09-11 18:07:59 +01:00
Wai-Hong Tam
c2e47bdc89 led_strip: ws2812_spi: Optimize for 8-bit symbols with build-time check
The ws2812_spi driver supports both a fast path for 8-bit symbols and
a generic path for other sizes.

This change introduces a devicetree-based, build-time check to
determine if all enabled instances use 8-bit symbols. If so, the
generic path logic is removed from the build.

Signed-off-by: Wai-Hong Tam <waihong@google.com>
2025-09-11 14:17:38 +01:00
Alain Volmat
a5bc5fa57d video: stm32: dcmipp: add (semi)planar support
Add support for NV12/NV21, NV16/NV61 and YUV420/YVU420
(semi)planar formats which can be output by the main #1 pipe.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-09-11 14:17:23 +01:00
Alain Volmat
0c81a6bf91 video: stm32: dcmipp: make isp handling depends on pixel pipes
ISP is part of the pixel pipes hence it doesn't make any sense to
try to call ISP external handlers if the DCMIPP doesn't have pixel
pipes available.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-09-11 14:17:23 +01:00
Julien Panis
051539e867 drivers: dma: cc23x0: Add power management
Add runtime PM support to cc23x0 DMA module.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-09-11 14:17:11 +01:00
Thomas Decker
ea82349594 drivers: clock: stm32_ll_h7: fix max. frequency defines for stm32H7RS
The maximum frequencies for SYSCLK, AHB and APB bus have changed since
the first issue of the datasheet. Setting values according to the up-
to-date datasheet.

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2025-09-11 06:27:58 -04:00
Jakub Klimczak
f7d8688a35 drivers: serial: Add UART VIRTIO Console
Add a UART driver for the VIRTIO console device.
This driver has support for both polling- and interrupt-based i/o,
as well as interacting with up to 32 console ports (disabled by
default). Based on the Xen HVC driver.
Tested with the console subsystem sample programs. Aside from
enabling CONFIG_PCIE, setting CONFIG_HEAP_MEM_POOL_SIZE to a
high enough value (for example 100000) is necessary -- as is done
in the virtiofs sample.

Signed-off-by: Jakub Klimczak <jklimczak@internships.antmicro.com>
2025-09-11 06:26:02 -04:00
Jakub Klimczak
af0dfb9418 drivers: virtio: Fix writing feature bits, follow VIRTIO spec
This fixes:
 * if-statements that check whether a given bit lies within
specification-defined ranges
 * a behavior in virtio_pci.c -- where it would read feature bits
from the device and write them back whenever the user tried to
set their own -- which led to bugs
 * struct virtio_pci_common_cfg, adding two new fields, bringing
it in line with the specification; the entire struct definition
was reformatted as following the existing style would trigger
warnings

Signed-off-by: Jakub Klimczak <jklimczak@internships.antmicro.com>
2025-09-11 06:26:02 -04:00
Arunmani Alagarsamy
86cc0f99c8 drivers: wifi: siwx91x: Round up listen interval calculation
Use DIV_ROUND_UP to ensure listen_interval is rounded up instead of
being truncated during division by the beacon interval.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-09-11 09:55:13 +02:00
Hao Luo
53e28e0de2 driver: uart: ambiq: need to wait for IO stable after resume
Add a short delay to wait for IO stable when resume from sleep
to prevent printing gibberish.

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-09-11 09:55:05 +02:00
Hao Luo
1f95b06c95 drivers: uart: ambiq: fix incorrect uart tx ready status
This commit fixes incorrect uart tx ready status

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-09-11 09:55:05 +02:00
Hao Luo
7d09c83fc6 drivers: timer: fix ambiq stimer MIN_DELAY incorrect define
Change to use HAL macro instead of magic number.

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-09-11 09:54:12 +02:00
Arunmani Alagarsamy
b48cdc40fc drivers: wifi: siwx91x: Disable HT capabilities on channel 14
In the Japan regulatory domain, channel 14 is restricted to
802.11b/g operation and does not support HT (802.11n) capabilities.
Disable HT capabilities when operating on channel 14 in AP mode.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-09-11 09:53:48 +02:00
Etienne Carriere
694eaf43b1 drivers: flash: restore stm32 xspi mutex on memory mapping
Fix stm32 XSPI driver to restore the bus command concurrent access
protection that was mistakenly removed on memory mapping operation
by commit e5620e07c9 ("drivers: flash: stm32 xspi flash read with
memcopy when executing").

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-09-11 09:53:36 +02:00
Khoa Nguyen
db981f65e9 drivers: Add assign event for current core for all Renesas drivers
Add assign event for current core for all Renesas drivers

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-09-11 09:53:13 +02:00
Khoa Nguyen
7ea7e13b9c soc: renesas: ra: Update init flow to start second core
- Add ``R_BSP_SecondaryCoreStart`` for the primary core to start
the secondary core
- Disable ``clock_init`` for the secondary core

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-09-11 09:53:13 +02:00
Clark Kim
3778309413 drivers: mfd: add pca9422 drivers(mfd+charger+regulator)
Add drivers for NXP PCA9422 PMIC that includes charger and regulators.

Signed-off-by: Clark Kim <clark.kim@nxp.com>
2025-09-10 22:44:33 -04:00
Aditi Bhaskar
2d854b3e50 Drivers: UART pdl-based driver bug fixed
- Resolved failure in uart_basic_api test (rx now handled)
 - Fixed interrupt mask configuration in uart-pdl driver
 - Removed redundant irq handling functions

Signed-off-by: Aditi Bhaskar <aditi.bhaskar@infineon.com>
2025-09-10 22:43:32 -04:00
Anisetti Avinash Krishna
767dc4d87d drivers: misc: timeaware_gpio: Enable support for ARTV_CTRL
Enabled support for ARTV_CTRL for ART value read operation.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2025-09-10 22:42:58 -04:00
Shreehari HK
16963d38f7 drivers: i3c: dw: Add clock subsystem and pinctrl support
Add support for clock subsystem configuration and pinctrl in the
DesignWare I3C driver to enable proper clock control and pin
management on platforms that require them.

Changes include:
- Add clock_subsys field to dw_i3c_config structure.
- Update clock_control_get_rate() and clock_control_on() calls to use
  the configured clock subsystem instead of NULL.
- Use COND_CODE_1 with DT_INST_PHA_HAS_CELL to conditionally extract
  clock subsystem ID from devicetree, providing backward compatibility
  for platforms without clkid cell.
- Include pinctrl-device.yaml in devicetree binding to enable pinctrl
  support for platforms that need pin configuration.
- Gracefully fallback to NULL behavior when clkid is not specified.

This follows the same pattern used by other I3C drivers (mcux, renesas_ra)
and enables proper clock management for SoCs that require clock subsystem
identifiers while maintaining compatibility with existing devicetree
configurations.

Signed-off-by: Shreehari HK <shreehari.hk@alifsemi.com>
2025-09-10 22:42:14 -04:00
James Growden
c1d305ef4d drivers: i2c: Correct i2c_dw target implementation
The I2C target implementation for i2c_dw does not follow the
zephyr target specification. The following three issues are corrected:

1) The read_requested CB is called on every byte of the transaction
    - it must be called only on the first byte of the transaction
2) The read_processed CB is called on every byte of the transaction
    - it must be called only on bytes following the first byte
3) Bytes returned in the data ptr param of read_processed are not
    sent to the controller
     -These bytes must be sent to the controller

Signed-off-by: James Growden <jgrowden@tenstorrent.com>
2025-09-10 22:40:13 -04:00
Andrzej Głąbek
9223235a49 drivers: flash_mspi_nor: Fix XIP_DEV_CFG_MASK definition
This is a follow-up to commit cafa288197.

Bit masks should use the bitwise OR operator, not the logical one...

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-09-10 22:37:04 -04:00
Mickael Bosch
6e018bbf04 drivers: i2c: stm32: fix compilation with DMA
fixes:
- implicit declaration of function 'stm32_buf_in_nocache'
- undefined reference to 'stm32_buf_in_nocache'

Signed-off-by: Mickael Bosch <mickael.bosch@linux.com>
2025-09-10 18:37:47 +02:00
Sanjay Vallimanalan
35c485b6ec drivers: gpio: Add GPIO Fast Wake support
The fast wake feature in the MSPM0 GPIO peripheral allows the GPIO module
to stay in a low-power state and detect interrupt events on the device pins
without requiring a high-speed clock. This allows the device to support
fast wakeup from low-power modes, such as STOP and STANDBY, on any GPIO
pin.

Signed-off-by: Sanjay Vallimanalan <sanjay@linumiz.com>
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2025-09-10 18:37:11 +02:00
Dhanoo Surasarang
8053d23c39 drivers: misc: nordic_vpr_launcher: add DMA secure attribute support
Extend vpr_launcher and device tree bindings to support configuring
the DMA secure attribute.

Signed-off-by: Dhanoo Surasarang <dhanoo.surasarang@nordicsemi.no>
2025-09-10 16:40:39 +02:00
Bill Waters
7973535ec6 drivers: pwm: Infineon: PWM driver improvements and bug fixes
This change makes improvements and bug fixes for the Infineon PWM
driver.  These include:

* Removes hard coded register addresss from driver.
* Addresses issues causing pwm_api and pwm_gpio_loopback tests to
fail, as well as functional failures.
* Restructures device tree file to better represent the hardware
architecture of the tcpwm module.
* Allows configuration of hardware behavior when PWM is disabled.

Signed-off-by: Bill Waters <bill.waters@infineon.com>
2025-09-10 16:38:19 +02:00
Bill Waters
8e1f2c70de drivers: pwm: Infineon: replace cat1 naming with tcpwm
* Changes driver naming to reflect hardware IP being used (TCPWM)
instead of referencing cat1.  Cat1 is an internal infineon
reference which has little meaning to users and is being phased
phased out.

Signed-off-by: Bill Waters <bill.waters@infineon.com>
2025-09-10 16:38:19 +02:00
David Jewsbury
d9e22a7314 drivers: audio: dmic_nrfx: add support for audio_auxpll clk src
Added support for auxpll being used as audio clock source
for DMIC PDM driver.

Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
2025-09-10 16:37:08 +02:00
Fin Maaß
2e3a57fc96 drivers: spi: litex: litespi: flush pending irq before enable
flush pending irq before enableing the irq.

In the litex soc, if an irq is not enabled, it will
it can still be registered and will be pending
if it occurs, it will just not be send to the cpu
until the irq is enabled.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-09-10 13:02:10 +02:00
Andrzej Głąbek
77f00f06bb drivers: flash_mspi_nor: Add support for DDR in mx25u family
When Octal IO mode is to be used with DDR in mx25u family chips,
bit 1 instead of 0 must be set in the Configuration Register 2 at
address 0.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-09-10 13:02:01 +02:00
Andrzej Głąbek
835d77389c drivers: flash_mspi_nor: Add support for "supply-gpios" property
Add support for supplying power to the flash chip by activation of
a GPIO specified through the "supply-gpios" property. Implementation
of gpio_reset() is also slightly modified so that it is consistent
with soft_reset() and the new power_supply() and so that all these
functions can use a common routine that performs a reset recovery
delay.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-09-10 13:02:01 +02:00