Commit graph

23353 commits

Author SHA1 Message Date
Benjamin Cabé
b4e4c8ed48 drivers: pinctrl: wch: remove useless operations
Remove redundant register updates in pinctrl_configure_pins, and replace
the improper (and inefficient) use of bitwise OR assignment (|=) with
direct assignments when writing to the write-only BSHR registers

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-21 18:34:02 +02:00
Benjamin Cabé
6176b2ca1b drivers: gpio: wch: simplify port_toggle_bits logic
computation of BSHR was unnecessarily complex, with redundant
XOR/masking operations.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-21 15:31:27 +02:00
Dmitrii Sharshakov
639bccf969 Bluetooth: drivers: make H4 and H5 follow CONFIG_BT_HCI_INIT_PRIORITY
In some cases UART drivers might have too high init priorities
so HCI must be initialized even later if used with those.

One example is zephyr,native-tty-uart.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-06-21 13:14:45 +02:00
Benjamin Cabé
1e27c46015 drivers: clock_control: npcm: add missing const qualifiers
Ensure that the various configuration and conversion tables are marked
as const to save on RAM usage.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-21 13:14:39 +02:00
Benjamin Cabé
1c1ec64ab6 drivers: clock_control: npcm: fix clock_control_off
Align code with the comment :) There apparently was a copy-paste issue
from the clock_control_on code.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-21 13:14:39 +02:00
Benjamin Cabé
48a1a2a248 drivers: intc: nxp_pint: fix off-by-one error in pin_enable
Prevent out-of-bounds access in nxp_pint_pin_enable by fixing the
comparison to use >= instead of >.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-21 10:40:28 +02:00
Camille BAUD
46b5d05ae1 drivers: clock_control: Introduce bl60x clock driver
This introduces a clock_control driver for bl60x

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-06-21 10:40:20 +02:00
Benjamin Cabé
747bf7bc50 drivers: spi: esp32_spim: use size_t for DMA buffer lengths
Updated buffer length variables to be size_t as they need to be able to
represent the maximum buffer size which is 4092.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-21 08:19:37 +02:00
Benjamin Cabé
2408ca6795 drivers: adc: renesas_rz: fix error handling
Fix a bunch of occurrences of API calls returning error codes that were
being ignored.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-21 08:19:28 +02:00
Francois Ramu
958087f49d drivers: flash: stm32 ospi driver size and address of the external NOR
New property of the st,stm32-ospi-nor compatible gives
the external NOR flash in bits.
The property of the st,stm32-ospi compatible gives
the external NOR flash base address

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-06-20 14:41:41 -05:00
Camille BAUD
3787be931e drivers: display: Introduce SSD1363
This introduces a driver for the SSD1363 PMOLED controller

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-06-20 14:41:31 -05:00
Peter van der Perk
32d68bed22 drivers: timer: remove fsl_power.h for MCXN series
Initial it was only removed for mcxn236 but mcnx947 would fail to
compile then

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-06-20 13:26:41 -04:00
Mario Paja
0637ec4821 drivers: i2s: stm32 sai add mclk-divider property
This property enables the user to configure the Master Clock Divider.

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-06-20 13:26:14 -04:00
Benjamin Cabé
8365dd5cfc drivers: dai: fix bad GENMASK in NXP driver
Fixed swapped GENMASK arguments causing bad mask to be generated.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-20 13:26:03 -04:00
Jérôme Pouiller
fbc70337e8 modules: hal_silabs: Update WiseConnect SDK
Import the new version of the WiseConnect SDK.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-06-20 13:22:57 -04:00
Mathieu Choplain
fcd30046cb drivers: pinctrl: stm32: add support for STM32N6 pinctrl
Modify the STM32 pinctrl driver and SoC-specific pinctrl macros
to introduce support of the st,stm32n6-pinctrl variant.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2025-06-20 13:21:55 -04:00
Colin Evrard
97f9411f32 drivers: adc: esp32: check reference at compile time
Check that the channels are configured with the reference
ADC_REF_INTERNAL when compiling the driver.

Signed-off-by: Colin Evrard <colin.evrard@mind.be>
2025-06-20 16:24:09 +02:00
Hoang Nguyen
87177d1ac4 drivers: gpio: rz: improve gpio driver for Renesas RZ/A2M
- Adding support for GPIO_DISCONNECTED mode.
- Removing redundant interrupt configuration logic from the
.pin_configure API (already handled in pin_interrupt_configure).

Signed-off-by: Hoang Nguyen <hoang.nguyen.jx@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
2025-06-20 16:24:01 +02:00
Maochen Wang
7e3f5814e4 drivers: wifi: nxp: only enable NXP_WIFI_TC_RELOCATE for RW612
Only by default enable NXP_WIFI_TC_RELOCATE for RW612, which will
relocate traffic API into RAM. But for other platform, for example
the RT series, the ITCM/DTCM is a more suitable place for critical
code.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2025-06-20 16:23:52 +02:00
Nick Ward
3b05fd12a5 drivers: gnss: tidy satellite count kconfig symbols
CONFIG_GNSS_LUATOS_AIR530Z_SATELLITES_COUNT
and CONFIG_GNSS_U_BLOX_M8_SATELLITES_COUNT
would unnecessarily be in .config file.

Signed-off-by: Nick Ward <nix.ward@gmail.com>
2025-06-20 16:23:43 +02:00
Benjamin Cabé
d5af2f7dde drivers: sensors: fxls8974: fix compilation error in fxls8974_transceive
SPI code wasn't tested in CI so this compilation error was missed.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-20 16:23:25 +02:00
Andrzej Głąbek
8415f7f7a7 drivers: flash_mspi_nor: Omit quad_enable_set() when QER is set to NONE
When the quad-enable-requirements property is set to "NONE" or is not
present, no Quad Enable operation should be performed.
This fixes an issue with the mx25uw6345g flash chip that is present
on the nRF54h20 DK and supports the Single I/O mode, but cannot be
used in that mode.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-06-20 16:22:58 +02:00
sudarsan N
48bbbfe976 drivers: video: fix NULL dereference in mipid02_get_fmt
Category: Null pointer dereference (CWE-476)

Corrects the logic that validates the result of mipid04_get_format_desc().
Previously, the check was inverted, which could lead to a NULL pointer
dereference when accessing desc->pixelformat.

Fixes Coverity CID: 525183

Signed-off-by: sudarsan N <sudarsansamy2002@gmail.com>
2025-06-20 11:50:49 +01:00
Qingling Wu
2016f05860 drivers: nxp: wifi: Enable 11AX density config by default for IW610
Enable NXP_WIFI_MMSF by default for IW610

Signed-off-by: Qingling Wu <qingling.wu@nxp.com>
2025-06-20 08:52:53 +02:00
Phi Bang Nguyen
10deca2ef6 drivers: video: Fix skipped CIDs when enumerating controls
When enumerating controls with VIDEO_CTRL_FLAG_NEXT_CTRL, if child devices
have controls with IDs lower or equal to the ones in the parent devices,
those controls will be accidentally skipped.

Fix this by resetting the query's ID and tracking of the queried device in
the query when moving to the next device in the pipeline.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-06-19 22:37:54 -07:00
Jilay Pandya
d25b1d1959 drivers: stepper: add check for inval resolution in set_microstep_res
Add check for invalid microstep resolution directly in api to avoid the
check in each and every driver
Set microstep resolution is made a mandatory function now as all
stepper drivers support it and hence should implement it

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-06-19 22:35:51 -07:00
Erwan Gouriou
41664ebda0 drivers: memc: stm32 psram: Fix XSPI configuration for performance
Correct XSPI configuration in order to improve PSRAM access on the
STM32N6 discovery board.
Ideally, this should be defined by device tree, but I'm fixing
the only user for now.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-06-19 22:33:37 -07:00
Hao Luo
f1348d3954 drivers: i2c: ambiq: buffer overflow issue fixed
Bugfix for possible out-of-bounds operation when buffer address
is not 4 bytes aligned

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-06-19 22:31:06 -07:00
Khaoula Bidani
f568b0d68a drivers: adc: update adc driver to integrate stm32u3
add u3 config_soc conditions in adc driver to handle
news peripherals.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-19 22:27:35 -07:00
Kate Wang
e2d97c7ca6 drivers: video: ov7670: update the camera init sequence
The previous initialization sequence fails to configure the module
properly. Update the sequence using the code provided by vendor.
The update is verified using the FRDM-MCXN947 SmartDMA camera case
under samples/drivers/video/capture.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-06-19 14:04:45 +02:00
Joakim Andersson
e5093f41b2 drivers: flash: Fix timeout handling in STM32 flash driver
Fix timeout error that can occur in rare case.
When the thread writing to flash is pre-emptive it can be scheduled
out after reading the status register, but before checking if timeout
has expired. In this case it will report timeout without re-checking
the status register.

When writing a lot to flash, for example a firmware update process
then this situation is very likely to occur.

Signed-off-by: Joakim Andersson <joerchan@gmail.com>
2025-06-19 14:02:32 +02:00
Benjamin Cabé
45920741dc drivers: adc: max1125x: fix typo in GPIO config
Corrected the property assignment for gpo0_enable.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-19 14:01:31 +02:00
Benjamin Cabé
6c4ed097ff drivers: pwm: Fix priority handling for Renesas RA
Fixed a typo causing interrupt priority from DT to be ignored.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-19 14:00:21 +02:00
Alain Volmat
b1e55bd342 display: stm32: ltdc: add SMH buffer alignment config option
Add the CONFIG_STM32_LTDC_FB_SMH_ALIGN option in order to
indicate the alignment required for the buffer allocated via
SMH.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-06-19 13:57:51 +02:00
Alain Volmat
b7f73710b2 memc: stm32_xspi_psram: init shared_multi_heap area
Initialize the whole psram as a shared_multi_heap_area
if SHARED_MULTI_HEAP is enabled.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-06-19 13:57:51 +02:00
Declan Snyder
84d2f7f4de spi_nxp_lpspi: Fix extra byte sent on v1 lpspi
This stupid errata will not leave me alone, here is another bandaid to
deal with an issue where an extra byte was being sent on version 1
LPSPIs due to the algorithm of filling NOPs when only RX is left was not
expecting the situation where the LPSPI actually consumed everything
from the fifo but is not sending it due to this ridiculous stalling errata.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Declan Snyder
f6a9a1f3bc spi_nxp_lpspi: Fix unit of buf_len in fill_tx_fifo
The buf_len parameter of lpspi_fill_tx_fifo is supposed to be bytes, so
we do not need to convert it. This could cause an issue if the end of
the buffer is less bytes than the word size.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Declan Snyder
e9d964f628 spi_nxp_lpspi: Fix fifo fill logic
Fixing some issues with the TX fifo fill logic in two places:

First in the normal fill function, it didn't take into account a
situation where the TX fifo is already partially filled. This currently
doesn't cause a problem because the driver is written in a way that the
watermark is always 0 for TDF, but in case the watermark were anything
else it would cause a problem.

Second, when filling the TX fifo with NOPS in order to clock the rest of
the RX in from the bus, the calculation regarding the current TX fifo
length was just wrong and was leading to a bug in some cases where there
was a subtraction underflow and billions of NOPs were being filled.
Also, there could be a problem where a few extra NOPs are put in the TX
fifo if we don't count what we already have in the TX fifo, so fixing
that as well.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Declan Snyder
7aa0778901 spi_nxp_lpspi: Simplify tx ctx update
There is no need to update the tx context in interrupt instead of
directly after the fill, this just makes the code more complex. Also,
the spi context header already handled iterating over buffers so we can
remove that code too.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Declan Snyder
877fa975cc spi_nxp_lpspi: Remove MCUX branding
Since the LPSPI drivers no long use MCUX at all, remove the MCUX
branding, to avoid confusion. In the future if an implementation uses
the MCUX SDK driver, it should specifically be called by MCUX in the
name.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Declan Snyder
2aad9ebb78 spi_nxp_lpspi: Remove call to MasterInit
For optimization purpose, remove calls to SDK. Since we know exactly
what we want, this results in smaller code size.

Also, this code calculates the SCK parameters more efficiently than the
SDK driver did it by using a binary (instead of linear) search.

Lastly, remove call to LPSPI_Reset in the init call and replace with
native driver code, and remove inclusion of SDK header.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Declan Snyder
c0e3ec7f08 spi_nxp_lpspi: Add maximum wait time of fifo empty
Instead of waiting forever and potentially allowing infinite loop on
ISR, wait some arbitrary amount of cycles to error out if it isn't
happening. Still make this configurable for debugging purposes.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Declan Snyder
691e7598ff spi_nxp_lpspi: Add version ID to data struct
Since I expect that the drivers will need to read this version ID maybe
multiple times, instead of repeatedly doing so over the peripheral bus,
it is probably worth it to store a byte in RAM representing this
version. The behavior of the LPSPI is fairly significantly different
between versions. Not enough to warrant separate drivers but enough to
need a few workarounds or different code branches depending on this.

Also, the interrupt based driver is currently using a wrong macro to
read this, and that is a bug.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Declan Snyder
aeedf86da6 spi_nxp_lpspi: Clarify configuration function
Clarify at the top of the common lpspi file what is the purpose of the
file to be clear to future developers that this file is not supposed to
make any assumption about a particular implementation of the zephyr API
using the LPSPI, because I imagine it could be very likely that more
lpspi implementation will be done in the future to make different
tradeoffs than the current two. Also the current two are different
enough that we should avoid making assumptions even if they currently
hold for both because they might not always, as things change.

We should disable interrupt events while configuring the LPSPI
regardless of implementation. The specific implementation should enable
the interrupts it needs on its own transceive implementation.

Also clarify and simplify some code in the configure function. Namely,
we no longer need to check if we are already configured to write to
registers because a recent commit made it so that we clock the
peripheral from the zephyr driver init instead of upon the MasterInit
call on the SDK. There is also a redundant CR write which I have removed.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Declan Snyder
2aa9ec43dc spi_nxp_lpspi: Remove dev pointer from data struct
The dev pointer in the data struct is not being used, so remove it.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Mahesh Mahadevan
bfd5fab28a drivers: pinctrl: Do not confgure sleep pins in NXP MCI IOMUX driver
The sleep-output property is no longer used. This results in the sleep
bit to be always cleared. Delete this code so we can retain any sleep
mode configuration done.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-06-18 17:50:48 -04:00
Pieter De Gendt
a540ee6143 drivers: hdlc_rcp_if: Add HDLC SPI adapter driver
Implement the HDLC over SPI adapter driver to support the Openthread RCP
with SPI communication.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-06-18 17:50:31 -04:00
Pieter De Gendt
b24085ddda drivers: hdlc_rcp_if: Select EVENTS
The HDLC platform implementation uses the k_event API.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-06-18 17:50:31 -04:00
Van Petrosyan
04057e15ec sensor: lps22hh: clang-format cleanup
Style-only reformatting, no functional change.

Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
2025-06-18 17:50:22 -04:00
Van Petrosyan
1aa07db0ae sensor: lps22hh: add device power management support
Registers driver with pm_device_driver_init(); implements TURN_ON,
SUSPEND and RESUME.  Sets ODR = 0 on suspend per datasheet

Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
2025-06-18 17:50:22 -04:00