For some reason, a regression happened where the phy monitor was never
happening. Fix by starting the monitor at the end of init function. The
monitor will then reschedule itself from then on.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Remove useless assignments to `val` parameter in sbs_gauge_set_prop()
and bq27z746_set_prop(). Since `val` is passed by value, modifying it
has no effect. Also remove unused `tmp_val` variable.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This commit introduces a compatibility layer for older EUSART hardware
that lacks the RXTO interrupt. It fix the test uart_async_api when using
xg22 soc.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
When running uart_elementary on the xg22 SoC, some tests are failing due
to the lack of checks inside the configuration function. This patch adds
a check for the parity parameter.
I've also noticed an error in the ISR function where we check all the
ISR flags and not only the enabled ones. It has no impact but needs to be
changed in order to be accurate.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
The current implementation checking for the validity of the spi slave
number is wrong. First of all, there is an off by one error where it
allows SPI_CHIP_SELECT_COUNT value as a valid slave, when really it
should be that value minus one. Secondly, it doesn't take into account
the fact that having software controlled GPIO CS can technically have
any number of slaves on the bus. So fix by finding the max of these two
values and fixing the off by one mistake. Also, for RW612, only one HW
native CS is available due to SOC pinmux limitations.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The I2C state machine may fail to generate a valid STOP condition.
This may happen when the firmware sets the STOP bit in SMBCTL1 register
approximately half an SMB clock cycle following the last ACK bit in the
transaction.
Note:
1. This issue is not expected to occur when the core clock runs at
the default frequency (15 MHz). However, since more applications
reuquires higher core clock frequency, this commit introduce the
bypass to prevent the potential risk.
2. Only NPCXn variant chips require this workaround.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
There are multiple issues in this driver:
1. gpio_pca_series_part_cfg_pca6416 is not using correct macros
2. gpio_pca_series_interrupt_handler_standard not updating input when
no interrupt configured
Fixing these issues.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
When setting endpoint capabilities, the driver uses the MPS stored in each
instance's configuration for OUT endpoints, but used a hardcoded 1023 for
IN endpoints.
Use the instance MPS when preparing IN endpoints' capabilities too.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
When cyclic mode is enabled, do not disable RX.
This mode ensures continuous availability of RX buffers.
Signed-off-by: Wojciech Slenska <wsl@trackunit.com>
Fix the STM32 DMA driver did not check if the optional dma_callback was
set in dma_stm32_configure(). This could lead to a hard fault when an
interrupt occurs and the callback is NULL, even though the API allows
the callback to be omitted.
Fixes#97454
Signed-off-by: Wenxi Xu <xuwenxi0517@gmail.com>
Instead of snooping SETUP packets for SET_ADDRESS request to call the HAL
SetAddress() function manually, mark device with the addr_before_status
capability such that the UDC stack will call udc_stm32_set_address()
before submitting status by itself.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Fix the issue regarding passing the TRNG peripheral instance to the driver.
Increase the SYSTEM_WORKQUEUE_STACK_SIZE when CONFIG_BT is set.
According to the log of thread analyzer for beacon sample, 1048 bytes
are needed. So, it's been increased to a safer value.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Exclude the WB0x series from discarding data 12 times from the RNG data
register.
Add a comment to the recover_seed_error function explaining the reason
for reading and discarding data from the RNG data register 12 times.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Fix the TRNG driver issue regarding non-stop ISR firing for STM32WB09 by
clearing RNG_IRQ_SR_ERROR_IRQ flag.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
MCXW2XX ROMAPI provide the function FLASH_CacheClear to clear the cache.
The SMSCM is not supported on MCXW2XX platform.
Signed-off-by: Allen Zhang <chunfeng.zhang@nxp.com>
Add a name to the "Wi-Fi MAC address type" choice symbol so that the
default can be updated on a per-board basis.
Signed-off-by: Jordan Yates <jordan@embeint.com>
When alloc the evt buffer,such as the adv report, only compare the
remaining data len, should aslo consider the hdr_len, because the
hdr also copy to alloced buffer.if not consider the hdr, then
hdr + remaining data may larger than alloced buffer, because the
alloced buffer is not enough,then will assert when receive the
remaining data.
Signed-off-by: Guotao Zhang <guotao.zhang@nxp.com>
This fix addresses the issue encountered when power management (pm)
is enabled, as the PWM test suites utilize the GPIO driver, which
now incorporates the latest power domain enhancements and requires
CONFIG_POWER_DOMAIN to be enabled. Power domain functionality
manages device power actions such as turning on and off.
Accordingly, the pm device support for the pwm_silabs_siwx91x
driver has been updated to align with the recent power domain
improvements.
Signed-off-by: S Mohamed Fiaz <Fiaz.Mohamed@silabs.com>
Remove Device Runtime PM "hack" used for modem cellular driver
initialization and use pm_device_driver_init() instead.
Signed-off-by: Tomas Gudelevičius <tomas.gudelevicius@draeger.com>
A recent commit added support for the CH32V30x/20x PLL multiplier. The
code is protected by a `IS_ENABLED(...)` but uses a constant that
doesn't exist for the CH32V00x, breaking the build.
Tested by building samples/basic/blinky for the ch32v003evt and linkw.
Signed-off-by: Michael Hope <michaelh@juju.nz>
The version register is not accessible through aux-reg interface,
So skip it entirely on platforms with aux-reg device tree property.
Signed-off-by: Mohamed Moawad <moawad@synopsys.com>
GPDMA does not support DMA_ADDR_ADJ_NO_CHANGE with a memory buffer. This
feature is required fro the SPI driver. Hopefully, SPI driver is the only
user of this feature.
Therefore, this commit introduces a hack for SPI. When the user want to
ignore the Rx data (= when he pass a NULL pointer for the Rx buffer),
rather than overwriting the destination in a loop, we just disable the rx
DMA.
This introduce a limitation: since Rx DMA stop early, any following Rx
request will start earlier than expected. Therefore, this patch breaks
cases with interleaved Rx buffers. In other words, the NULL buffer must be
the last one.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Because of limitation of gpdma, DMA Rx won't run if user doesn't specify
destination buffer.
Thus, the DMA Rx may stop before the end of the full transaction. So, wait
on DMA Tx instead.
Then, the SPI data won't be consumed by the DMA. We need to properly reset
the fifo before to start a new transaction (it is better to ensure we start
with a clean state before every transaction).
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
GPDMA does not support DMA_ADDR_ADJ_NO_CHANGE with a memory buffer. This
feature is required for the SPI driver. Hopefully, SPI driver is the only
user of this feature.
Therefore, this commit introduces a hack for SPI. When the user request an
Rx transaction, rather than copying content of mosi_overrun parameter, it
configures the DMA to fill the destination memory (with either 0s or 1s).
Obviously, this only works if mosi_overrun is 0x00 or 0xFF. Hopefully, none
will need any other value.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Since the single-linked list management is well localized, the variable
names can now be abbreviated a bit.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
The management of the single-linked list was made in various places:
- RSI_GPDMA_BuildDescriptors()
- after sys_mem_blocks_alloc()
- at the end of the loop
Centralize it at the end of the loop.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Remove redundant enabling of NRF_RTC_TIMER in SoC specific files
and replace it with default y in the NRF_RTC_TIMER definition.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Clarify that the AMD Xilinx PS Triple Timer Counter (TTC) is used in both
Zynq UltraScale+ MPSoC (ZynqMP) and Versal platforms. Update the device
tree binding description and Kconfig accordingly.
Also, rephrase the Kconfig help text to fix grammar issues and improve
clarity.
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Correct compilation error due to usage of DCMIPP_PIPE1 / DCMIPP_PIPE2
on platform which do not have pixel pipes by putting those caps
under #if defined(STM32_DCMIPP_HAS_PIXEL_PIPES)
Put also DCMIPP_VIDEO_FORMAT_CAP macro inside since this is only used
for AUX / MAIN pipes.
Fixes: 126aaf6b72 ("video: dcmipp: expose dcmipp caps for all 3 pipes.")
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
In 200b886d3c a deprecated kconfig
option was brought back into the driver.
Let's fix it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The rts5912's port 80 has a FIFO. In the ISR (Interrupt Service Routine),
extract the FIFO data until the FIFO is empty, otherwise port 80 data will
be lost.
Signed-off-by: jhan bo chao <jhan_bo_chao@realtek.com>
The previous implementation had a logical error where the prescaler
could never be bypassed due to incorrect use of BIT() macro:
This patch fixes the issue by:
1. Remove BIT() wrapper from LPTMR_PRESCALER macro to use raw
devicetree property value
2. Update bypass logic to check for zero value explicitly
3. Map DTS values to hardware register values correctly:
- prescale_glitch_filter = 0 -> bypass prescaler
- prescale_glitch_filter = n -> divide by 2^n,
using register value (n-1)
The devicetree semantic is now:
- prescale_glitch_filter = <0>: No prescaling (bypass)
- prescale_glitch_filter = <1>: Divide by 2
- prescale_glitch_filter = <2>: Divide by 4
- prescale_glitch_filter = <3>: Divide by 8
- And so on...
Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
i2c_map_dt_bitrate uses LOG_ERR, however, one must define (or declare) a
log module where to sink the logs. Since this sits on a header file,
it creates a hidden include order dependency: you must include
i2c-priv.h after registering or declaring a log module on your driver.
Even worse, you are force to use logging in your drivers even if you do
not want to!
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Dual data rate isn't always supported so this
config enables/disables the relevant code in
the driver.
Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
There is a scenario where a Bus fault occurs as the
power management isn't initialised yet and the core
is attempted to be turned off via the ssienr register.
This commit edits this so the core register is written
to after the initialisation of the power management.
Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
For systems where the CPU / NVIC bus are considerably
faster than the peripheral bus used for I2C, there is
a risk that the isr handler returns before I2C controller
had time to clear its interrupt status flags
This would cause immediate re-entry to isr handler
which begins read from ISR register.
During time it take to re-enter and read from ISR register,
flags had time to be cleared
The isr handler expects that a flag is set, and in this case
when its not, an assert is triggered
The solution here is to make a dummy read from the ISR register before
returning from isr handler, this forces CPU to wait as long as needed
to ensure all writes to the I2C peripheral are completed
Fixes issue #97904
Signed-off-by: Erik Andersson <erian747@gmail.com>
Since the driver allows transfer lengths up to `UINT16_MAX + 1` bytes,
and additionally the `dummy_bytes` field includes bytes sent to provide
wait cycles on the bus, the type of this field must be `uint32_t`,
otherwise it can be overflowed for RX transfers close to the maximum.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The merge buffer was previously declared as a static variable, causing it
to be shared across all I2C instances and risking data corruption when
used concurrently. Move the buffer into the driver data to make it
instance-specific and avoid race conditions.
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Add option CONFIG_ARM_SCMI_CHAN_SEM_TIMEOUT_USEC
for users to change default timeout value.
Different platform has different delay time when
scmi agent get scmi response from scmi platform.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
