Commit graph

28,390 commits

Author SHA1 Message Date
Ryan McClelland
9bb1b9b5db drivers: i3c: initialize desc to NULL in mem slab allocators
i3c_device_desc_alloc() and i3c_i2c_device_desc_alloc() leave the
local desc pointer uninitialized when k_mem_slab_alloc() fails. The
uninitialized garbage is returned to callers that check for NULL,
causing them to dereference a random pointer instead of handling
the allocation failure.

Initialize desc to NULL so callers correctly detect the failure.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2026-03-02 11:03:38 +01:00
Ryan McClelland
11bfbbf05b drivers: i3c: use safe list iteration when detaching devices
i3c_sec_bus_reset() iterates over the attached I3C and I2C device lists
using SYS_SLIST_FOR_EACH_CONTAINER while removing each node via
i3c_detach_i3c_device()/i3c_detach_i2c_device(). The non-safe iterator
reads the current node's next pointer to advance, but detaching
invalidates that pointer. This causes the loop to either stop early
(skipping devices) or access stale memory.

Add I3C_BUS_FOR_EACH_I3CDEV_SAFE and I3C_BUS_FOR_EACH_I2CDEV_SAFE
macros that wrap SYS_SLIST_FOR_EACH_CONTAINER_SAFE, which saves the
next pointer before executing the loop body. Use these in
i3c_sec_bus_reset() so nodes can be safely detached during iteration.

Also add the new macros to .clang-format ForEachMacros list.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2026-03-02 11:03:38 +01:00
Ryan McClelland
d31d6ed24b drivers: i3c: fix dangling stack pointer in i3c_sec_get_basic_info
i3c_sec_get_basic_info() attaches a stack-allocated temp_desc to the
persistent device linked list via i3c_attach_i3c_device(). If
i3c_ccc_do_getpid() fails or i3c_device_desc_alloc() returns NULL, the
function returns without detaching temp_desc. Once the stack frame is
reclaimed, the linked list contains a dangling pointer, corrupting
memory on any subsequent list traversal.

Add i3c_detach_i3c_device(&temp_desc) before each early return to
ensure the stack-allocated descriptor is removed from the list.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2026-03-02 11:03:38 +01:00
Ryan McClelland
13b1bd8942 drivers: i3c: set ibi_len in SETMRL CCC payload
i3c_bus_setmrl() accepts an ibi_len parameter and uses it to update the
cached descriptor value, but never sets mrl_cmd.ibi_len before sending
the SETMRL CCC on the wire. This means the IBI payload size byte sent
to the target is uninitialized stack data when BCR[2]=1.

Set mrl_cmd.ibi_len = ibi_len so the CCC payload matches the spec
(MIPI I3C v1.2 Section 5.1.9.3.15).

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2026-03-02 11:03:38 +01:00
Fabin V Martin
20630ff455 drivers: uart: microchip: sercom g1: code improvements
Some naming changes and removed redundant code.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2026-03-02 11:00:26 +01:00
Fabian Blatz
a983df8dbb drivers: display: Add AC057TC1 e-ink display driver
Add driver for the AC057TC1 5.7-inch 7-color electrophoretic (e-ink)
display. The driver supports MIPI DBI 4-wire SPI mode and includes:

- GPIO interrupt-driven busy signal handling with semaphore-based waiting
- Deep sleep and PM device support for power management
- 4-bit per pixel (2 pixels per byte) color format with 7 color palette

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2026-03-02 10:54:37 +01:00
Fabin V Martin
0e880da6a6 drivers: i2c: microchip: sercom g1: Fixed issues for i2c transfer
The issues fixed for i2c transfer using polling and interrupt
modes which was observed while testing with the pic32cm_jh_01
boards.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2026-03-02 10:53:58 +01:00
Leevi Xu
02b4ac1519 drivers: i2c: sbcon: fix init when pinctrl applies successfully
When pinctrl_apply_state() returns 0 (success), the previous condition
(ret != -ENOENT) caused an early return, so i2c_bitbang_init() and
i2c_bitbang_configure() were never run. Only -ENOENT (no pinctrl
entry) should be ignored; real errors should still abort init.

Fix by returning only when ret < 0 && ret != -ENOENT.

Signed-off-by: Leevi Xu <leevi.xu@evenrealities.com>
2026-03-02 10:53:23 +01:00
Ajay Neeli
f349d529b3 i2c: cdns: Add 10-bit target address support
Extend the Cadence I2C driver to support 10-bit target addressing.

Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
2026-03-02 10:52:41 +01:00
Khoa Tran
dc4e092830 drivers: serial: Initial SAU UART driver support for Renesas RA0 series
Initial SAU UART driver support for Renesas RA0 series

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2026-03-02 10:48:45 +01:00
Khoa Nguyen
dead85721b drivers: misc: Update interrupt handling for ext-int to support RA0
Update interrupt handling for renesas_ra_external_interrupt
to support RA0

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2026-03-02 10:48:45 +01:00
Khoa Nguyen
cd95e8e5a5 drivers: flash: Update interrupt number assign to support RA0
Update interrupt number assign for soc_flash_lp to support RA0

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2026-03-02 10:48:45 +01:00
Khoa Tran
ee99677faa drivers: gpio: Update Renesas RA GPIO driver to support RA0 series
- Update Renesas RA GPIO driver to support Renesas RA0 series
- Add macro to disable port external interrupt the the compatible
nodes `renesas,ra-external-interrupt` are not enabled.

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2026-03-02 10:48:45 +01:00
Khoa Tran
1c67a64bff drivers: pinctrl: Add support for Renesas RA0 SoCs
Add pinctrl driver support for Renesas RA0 SoCs

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2026-03-02 10:48:45 +01:00
Muhammed Asif
3096cae23f drivers: counter: microchip: Add support for counter using rtc
- Adds the necessary support for counter using rtc peripheral.

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2026-03-02 10:47:37 +01:00
Hieu Nguyen
f4ce40c8b6 drivers: counter: Update driver for RZ devices
Reduce the complexity of the set-alarm and set-top functions.
Improve the error handling.
Replace IRQ macros with static inline functions to centralize GIC/NVIC
conditional handling.

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
2026-03-02 10:46:47 +01:00
Jeppe Odgaard
ea6dfedfe4 drivers: led_strip: ws2812_i2c: add update_channels
Add support for LED strip update channels.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2026-02-28 21:13:05 +01:00
Jeppe Odgaard
8edafa9e28 drivers: led_strip: ws2812_i2c: refactor update_rgb
Move the non-RGB mapping code into an update function.
This creates simpler functions and makes implementation of LED strip API's
update_channels function simpler.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2026-02-28 21:13:05 +01:00
Arunprasath P
f7018c171d drivers: dma: microchip: g2: Introduce DMA G2 driver
Add G2 DMA driver for Microchip DMAC Peripherals.
Implement the Zephyr DMA driver APIs, including channel configuration,
start, stop, suspend, and resume operations.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2026-02-28 21:12:52 +01:00
Pete Johanson
4f1956a130 drivers: serial: More complete TX errata fix for MAX32
Some MAX32 targets may fail to raise TX half/almost empty interrupts,
so add an optional workaround for those scenarios to ensure no missed
TX completion when using the interrupt API.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2026-02-27 21:09:31 +00:00
David Jewsbury
eb318914c2 drivers: flash_mspi_nor: Add DMA transfer mode selection
Add CONFIG_FLASH_MSPI_NOR_DMA_DATA_XFER and
CONFIG_FLASH_MSPI_NOR_DMA_CONTROL_XFER as Kconfig options for MSPI
NOR Flash driver. These options are used to select whether data and
control transfers should be performed using DMA or PIO modes.

Update flash_mspi_nor to store choices and apply them accordingly:
use data-xfer-mode for read/write data transfers, and control-xfer-mode
for command/register/configuration traffic. This selection is due to DMA
transfer's having a larger setup overhead so is less beneficial for
short control transfers.

Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
2026-02-27 15:30:31 +01:00
Glenn Andrews
812933e7e9 w1: Adjustable baud rate for Overdrive mode
Modifies 1-wire serial driver to accept configurable baud rates for
Overdrive mode.

In testing with DS2488, which are Overdrive-only, it was found that
both the baud rate and zero bit pattern needed to be adjusted for
stability. This commit allows the user to define their own baud
rates for OD mode, and modifies the zero bit in OD mode.

It is assumed that most testing has been done with standard-speed
devices, so the timings and bit patterns have not been changed or
made user-modifiable.

Signed-off-by: Glenn Andrews <andrewsglenn@meta.com>
2026-02-27 15:30:18 +01:00
Chin-Yao Hung
29640a77c6 drivers: video: shell: fix incorrect endptr usage in strtoll
The current implementation of video_shell_set_ctrl() incorrectly
passes &arg_value as the endptr to strtoll(), while attempting
to validate the result using an uninitialized end_value pointer.
This causes the check (*end_value != '\0') to always trigger
shell_error.

Update the code to pass the address of end_value to strtoll()
correctly, ensuring it points to the first invalid character
within the input string for proper validation.

Signed-off-by: Chin-Yao Hung <cy.hung@guc-asic.com>
2026-02-27 15:30:02 +01:00
Tomasz Moń
2bdfd14637 drivers: usb: buf: Do not add empty library
Change CMakeLists.txt to register Zephyr library only if respective
source code is compiled.

Fixes CMake Warning:
  No SOURCES given to Zephyr library: drivers__usb__common__buf

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2026-02-27 13:56:50 +01:00
Alberto Escolar Piedras
0003f896ae drivers: ethernet: Fix net API use
In e6daacf3c9 the mayority of the
ethernet drivers code was changed to use the Zephyr native net_
prefixed symbols, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2026-02-27 13:56:24 +01:00
Alberto Escolar Piedras
e157ddb3d2 drivers: wifi: esp_at: Fix net API use
In 55c49cdb8f wifi
drivers were changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2026-02-27 13:56:08 +01:00
Alberto Escolar Piedras
c5f7d5d4f6 drivers: modem: hl78xx: Fix includes
Add missing includes and missing source macro definition to expose the
C library prototypes used by this code.

Background:
In general code which uses extensions to the C library (in this case
POSIX extensions) should set the appropriate macro so the C library
headers expose those. Instead of relaying on the C library always
exposing them or those macros being set from the cmake side.

Withtout these, one gets the following warnings when building with glibc:
`implicit declaration of function ‘strnlen’`
`implicit declaration of function ‘strtok_r’`
```
implicit declaration of function ‘snprintf’
note: include ‘<stdio.h>’ or provide a declaration of ‘snprintf’
implicit declaration of function ‘sscanf’
include ‘<stdio.h>’ or provide a declaration of ‘sscanf’
```

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2026-02-27 13:56:08 +01:00
Alberto Escolar Piedras
7149790b64 drivers: modem: hl78xx: Use native networking naming
Use the Zephyr prefixed naming when refering to the networking
functions, macros or types.
This ensures this code builds when
CONFIG_NET_NAMESPACE_COMPAT_MODE=n

This is a plain rename without function impact, that otherwise
is done thru macros given by net_compat.h

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2026-02-27 13:56:08 +01:00
Alberto Escolar Piedras
125d8900dd drivers: modem: st87mx: Use native networking naming
Use the Zephyr prefixed naming when refering to the networking
functions, macros or types.
This ensures this code builds when
CONFIG_NET_NAMESPACE_COMPAT_MODE=n

This is a plain rename without function impact, that otherwise
is that thru macros given by net_compat.h

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2026-02-27 13:56:08 +01:00
Sudan Landge
fe4383b842 drivers: intc_gicv3: avoid setting GICD_CTRL_NS
Arm documentation (ddi0601) for GICD_CTRL_DS is as follows:
```
If the Distributor only supports a single Security state, this bit is
RAO/WI.
```

Since CONFIG_GIC_SINGLE_SECURITY_STATE suggest GIC has single security
state, the DS bit should not be touched and the assert should be enough
to make sure that GICD_CTRL_NS (DS bit) is set to 1.

Fixes https://github.com/zephyrproject-rtos/zephyr/issues/102239

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2026-02-27 13:55:08 +01:00
Zhaoxiang Jin
e986daabd5 drivers: clock_control: enable sema42 clock control
enabled sema42 peripheral clock control through
clock_control (syscon) driver.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-02-27 11:51:20 +01:00
Zhaoxiang Jin
b61ae973d4 drivers: hwspinlock: enable nxp sema42 based on hwspinlock API
This commit implemented nxp (Semaphores2) sema42 peripheral
based on zephyr hwspinlock device driver API.

The hardware information can be find in MCXN947 RM chapter 27.
https://www.nxp.com/webapp/sps/download/preDownload.jsp?render=true

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-02-27 11:51:20 +01:00
Braeden Lane
4f5d97e671 drivers: i2c: infineon: configure SCB oversampling clock for PSOC4
The I2C driver relies on the SCB oversampling clock (clk_scb) being
within specific frequency ranges for each I2C data rate. On PSOC4, the
peripheral clock dividers default to a division of 1, passing the full
HFCLK (48 MHz) directly to the SCB — far outside the valid range for
any I2C speed. This causes all I2C transfers to fail with -EIO.

Add _i2c_set_peri_divider_psoc4() which calculates the appropriate
divider from HFCLK and configures the peripheral clock using the
Zephyr utility wrappers (matching the UART driver convention).

SCB oversampling clock frequencies (from device reference manuals,
analog filter config AF_in=1, AF_out=0, DF_in=0):

Controller mode:
  Standard (100 kHz):   2 MHz
  Fast (400 kHz):       8 MHz
  Fast Plus (1 MHz):   24 MHz

Target mode:
  Standard (100 kHz):   8 MHz
  Fast (400 kHz):      12 MHz
  Fast Plus (1 MHz):   24 MHz

Tested on CY8CKIT-041S-MAX and CY8CPROTO-041TP in both target and
controller roles.

Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
2026-02-27 11:51:11 +01:00
Peter Wang
8a0b4d715a boards: nxp: frdm_mcxa577: enable flash driver
enable flash driver for frdm_mcxa577
tested tests/drivers/flash/common/

Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
2026-02-27 08:00:30 +01:00
Ayush Singh
f5e5e5f4f1 serial: cc13xx_cc26xx: Fix TX interrupt
In cc13xx_cc26xx, the TX interrupt seems to be generated once initially on
enable and subsequently, when buffer goes from full to empty (since we are
operating in 1-byte buffer mode).

Due to this, if the TX interrupt is cleared in the configure function, a
new TX interrupt will not be generated untill we transition from a full to
empty buffer, even though the buffer itself is empty.

When using Zephyr Interrupt-driven UART API, one first needs to enable TX
interrupts `uart_irq_tx_enable()`, and then write data from the interrupt
callback, after checking `uart_irq_tx_ready()`. In case of cc13xx_cc26xx,
calling `uart_irq_tx_enable()` unmasks the TX interrupt, however, it will
not generate a new TX interrupt. Thus the callback will not be called
unless we first write something to the uart (using polling-API), causing a
transition in buffer state.

According to TI docs, writing 1 byte to the buffer will also clear the
TX interrupt, so it does not make sense to try clearing the interrupt
manulally in `configure` function.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2026-02-27 07:58:45 +01:00
Stefan Schmidt
27241985fe drivers: audio: tlv320dac310x
This PR routes the DAC output to the mixer amplifier (not headphone output)
so that volume control via registers 0x24/0x25 on page 1 has any effect

Signed-off-by: Stefan Schmidt <kontakt@stefanschmidt-embedded.de>
2026-02-27 07:58:29 +01:00
Jilay Pandya
788177da93 drivers: stepper_shell: split stepper shell
create stepper_ctrl_cmds in order to reflect api split

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2026-02-27 07:56:51 +01:00
Alvis Sun
61d3da1b8a drivers: i3c: npcx: fix DMA read when received data is less than expected
When the received data is less than expected, DMA timeout error may occur.
This happens because the DMA transfer is not completed and the TC
(Transfer Complete) flag is never set.

This change adds support for handling cases where the received data length
is smaller than the requested length, preventing false timeout errors.

The CL covers the following scenarios:
1. received < expected  (e.g. requested 10 bytes, got 9 bytes)
2. received = expected  (e.g. requested 10 bytes, got 10 bytes)
3. received > expected
(e.g. requested 10 bytes, got 10 bytes, but more data is coming, T-bit = 1)

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2026-02-27 07:56:00 +01:00
Brett Peterson
08f93f3fb0 drivers: i2s: add support for Infineon PSE84 device
Adds PDL-based I2S interface using the E84 TDM hardware.

Signed-off-by: Brett Peterson <brett.peterson@infineon.com>
2026-02-26 21:24:20 +00:00
Brett Peterson
c901b174b1 drivers: spi: update for dma
Updating SPI driver to work with recent dma driver changes.

Signed-off-by: Brett Peterson <brett.peterson@infineon.com>
2026-02-26 21:24:20 +00:00
Brett Peterson
cd4e2c88c0 drivers: serial: uart update for dma
Updating UART driver to work with recent dma driver changes.

Signed-off-by: Brett Peterson <brett.peterson@infineon.com>
2026-02-26 21:24:20 +00:00
Brett Peterson
ef44326a03 drivers: dma: infineon driver config update
Modifying DMA configuration to be more specific about when to use
software triggeres and the single elmeent input trigger type.

Signed-off-by: Brett Peterson <brett.peterson@infineon.com>
2026-02-26 21:24:20 +00:00
Brett Peterson
5f2178e27e drivers: clock_control: fractional divider support
Adding support for fractional dividers and removing unused code.

Signed-off-by: Brett Peterson <brett.peterson@infineon.com>
2026-02-26 21:24:20 +00:00
Jack Lee
a6e71a4861 drivers: sdhc: add support for cmd52 and cmd53 commands
Currently, the Xilinx SDHC driver does not support data
transmission with SDIO devices, requiring the addition
of CMD52 and CMD53 related functionalities.

Signed-off-by: Jack Lee <lhjhit@126.com>
2026-02-26 16:53:26 +00:00
Fin Maaß
e1520eec5b drivers: ethernet: ETH_IVSHMEM: add missing depends on DT_HAS_*
add missing depends on DT_HAS_* for the
ETH_IVSHMEM driver.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2026-02-26 16:52:49 +00:00
Bjarki Arge Andreasen
b217c3cdc4 soc: timer: nrf: patch init order of grtc and nrf54l
The nrf54l soc init configures power and clock properties like
applying trims, capacitance and setting up regulators. This must
precede the grtc driver initializing the sys clock, as it depends
on these clocks being initialized on the nrf54l series socs.

Update the nrf54l soc init to be EARLY 0, and set grtc sys clock
driver init to EARLY 1. Additionally add comments explaining why
these specific init levels where chosen.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2026-02-26 08:45:06 -06:00
Bjarki Arge Andreasen
f53928fdb5 drivers: spi: nrfx_spim: only spi_context_release if !SPI_LOCK_ON
Update driver to follow this, stated in the documentation of the
spi_context_release: "appropriate time to call this would be at the
end of a transfer that was initiated by a transceive API call, except
in the case that the SPI_LOCK_ON bit was set"

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2026-02-26 08:44:31 -06:00
Bjarki Arge Andreasen
9c287c64a5 drivers: spi: nrfx_spim: move buffer setup and check earlier
The SPI loopback test suite passes up transfers nop and null buffers
to the device drivers, expecting them to return early with -EINVAL
or -ENOTSUP, before setting the CS pins. Currently the NRFX based
nRF SPIM device driver sets CS unconditionally, without checking
the buffers, resulting in no transfer while toggling CS.

Add a check of the provided buffers in the transceive() function and
return early if buffers are invalid (result in 0 lenght transfer).

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2026-02-26 08:44:31 -06:00
Phuc Hoang
868f21f13f drivers: counter: silabs: Add counter driver for timer on Silabs Series 2
Add counter driver for timer on Silicon Labs series 2.
Tested by building and running the sample on realboard
slwrb4180b and xg24_rb4187c.

Signed-off-by: Phuc Hoang <donp172748@gmail.com>
2026-02-26 08:43:59 -06:00
Fengming Ye
a45507d87e drivers: wifi: nxp: add SD zero copy support
Add SDHC zero copy support for wifi.
This depends on SDHC host requirement
1. CONFIG_SDHC_SUPPORTS_SCATTER_GATHER_TRANSFER=y.
2. CONFIG_NET_BUF_DATA_SIZE to be 256 multiples.
3. CONFIG_NET_BUF_ALIGNMENT=32 (host cache line size).
4. CONFIG_NET_L2_ETHERNET_RESERVE_HEADER=y (to 4 bytes align net buffer).

Signed-off-by: Fengming Ye <frank.ye@nxp.com>
2026-02-26 08:43:11 -06:00