Add a new flash for toggling runtime SFDP data fetching, and use static
devicetree properties by default. Clean up various minor items from review.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Properly configure the MAX32 SPIXF peripheral to use the SPIXF controller
for transparent memory mapped reads, and enable the SPIXF main controller
and use it for writes.
Add support for testing XIP support to the nocopy sample, which requires
flashing with OpenOCD with MAX32690 QSPI flash support.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Xilinx Window Watchdog driver uses window watchdog mode. Window watchdog
timer(WWDT) contains closed(first) and open(second) window with 32bit
width each. Write to the watchdog timer within predefined window periods
of time. This means a period that is not too soon and a period that is
not too late. The WWDT has to be restarted within the open window time.
If the software tries to restart WWDT outside of open window time
period, it generates a SoC reset.
Signed-off-by: Harini T <harini.t@amd.com>
rename gpio stepper to h bridge stepper
minor correction in stepper_stop, stepper_stop shall cancel all active
movements and should not be concerned about keeping the coils energized
or not, since that is a concern of a motion controller and not a stepper
driver.
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
On it8xxx2, there are VW transmitted registers indicating that VW signal
has been transmitted to host. This patch checks the register to ensure
successful transmission of VW state change.
fixes: #89298
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Added driver and binding file for samd5x dac peripheral, the already
implemented dac_sam0.c lacks the configuration registers for this
microcontroller family and is fixed to only have one dac channel output,
also, the code gets too bulky when adding the samd5x dac configuration
using preprocessor directives that’s why I moved the implementation to its
own file.
Added dac to the supported list of same54_xpro.yaml, fixed Kconfig.samd5x
help spacing, added board defines to test_dac.c and test it out with
twister script on board.
Signed-off-by: Rafael Aldo Hernández Luna <aldo.hernandez@daikincomfort.com>
Driver simply registered itself without setting the level based on the
I2C Kconfig which wasn't quite right, need the log level set based on
the Kconfig for I2C.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The flash_stm32_xspi driver should not initialize the xspi,
if this one is being use to execute in Place : the init is skipped.
This mode is identified with the CONFIG_STM32_APP_IN_EXT_FLASH.
Checking the memory mapped mode bit is possible when the xspi
peripheral clock is not off (stm32h5 has no clock_control_get_status API)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Do not disable the PLL clock if it sources the XSPI and if the external
flash is executing in Place. After mcuboot reset, the code is executed
on the external flash, through the xspi.
The CONFIG_STM32_APP_IN_EXT_FLASH is set and will avoid re-config
of the PLL which is sourcing the XSPI peripheral. When eXecuting in Place
on this external NOR, it must not disable its own clock source (PLL).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch adds the initial support for the OMAP Multi-Channel SPI. Some
things should be noted however:
- DMA xfers are not supported yet. Only PIO is supported as of now.
- Multi-Channel controller is not supported yet. Only single-channel
controller mode is supported, this means that the controller can xfer
messages with one slave at a time.
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
After removing NATIVE_APPLICATION, only NATIVE_LIBRARY is
possible with ARCH_POSIX.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Enhanced RX cannot be used when UART_x_NRF_HW_ASYNC is used so changing
default value to depends on.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
In certain configurations timeout field is not present in the
data structure so preprocessor ifdef must be used instead of
compiler check.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
The variable 'mask' was declared but never used in
uart_sedi_line_ctrl_set().
This commit removes it to clean up the code..
No functional changes.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
USB_OTG_HS_EMB_PHY macro is always defined, so
`defined(USB_OTG_HS_EMB_PHY)` always results in true. This means that
driver always selected `USB_OTG_SPEED_HIGH_IN_FULL` and never
`USB_OTG_SPEED_HIGH`.
Fix that by checking value of defined macro.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Deleted a redundant check for 'rpu_ctx_zep' pointer after it was already
dereferenced.
Clarifies code logic in nrf_wifi_get_power_save_config function.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Wrap K_HEAP_DEFINE to fit within 100-character CI limit and apply
consistent spacing.This is a formatting-only change.
Signed-off-by: sudarsan N <sudarsansamy2002@gmail.com>
Adds an assertion and runtime log to ensure 'step' is not zero before
using it in division,preventing undefined behavior without modifying
the public API.
Avoids a signature change (void → int) to preserve API stability for
Zephyr 4.2.A more complete solution can be proposed for 4.3.
CID: 444378
Signed-off-by: sudarsan N <sudarsansamy2002@gmail.com>
Fix regression caused by memset() replacement to zero volatile struct.
ESP32-C6 data_buf struct differs from other SoCs and needs custom
handling.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
s/net_if_get_by_ifindex/net_if_get_by_iface/
Fixes: 0e57844b2d ("drivers: wifi: esp_at: Bind DNS to device net
interface")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
The reset commands were sent only in SPI mode, causing the device not to
be properly reset when in QPI mode. On the STM32H747I-DISCO boards, this
was causing the driver initialization to fail due to a bad SFDP magic
after flashing the external memory using STM32CubeProgrammer since the
external loader is configuring the flash memory in QPI mode.
The commands are sent in QPI mode first, then in SPI mode:
- If the flash memory was in QPI mode, the two first reset commands are
processed and after reset, the flash memory is in SPI mode and
correctly handles the SPI mode reset commands.
- If the flash memory was in SPI mode, for each QPI command the chip
select signal will be released before the flash memory had the
opportunity to receive a whole command (1 byte), so the partially
received commands will be ignored and won't cause any harm. Then, the
chip is reset by the commands sent in SPI mode.
Signed-off-by: Thomas Altenbach <altenbach.thomas@gmail.com>
This is not really high priority to support and is disrupting test
reporting, for now just hotfix the test by returning that this is not
supported, it's not really necessary anyways, there's multiple ways to
call the API to achieve the same effect.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
There is really no need for this header file at all besides if
there is a requirement to be annoying.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This data update returns an error, we should propogate it where it is
called if there is an error returned.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The transfer must be aborted before clearing the status flags otherwise
they will be set again before the transfer is aborted and stay set
causing infinite interrupt.
Also, elevate the log message to error level and give it actual useful
information. The "flag" being logged before literally just is a bit that
says if there is an error or not, which we already know by virtue of
handling an error. The channel error status has actual details about
what was the reason of the error. Also this status should be reported
before the transfer is aborted to get the right status.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Adhere to Programming Guide with regards to when the DIEPCTL0.CNAK is
set. This allows the driver to survive abusive control transfers with
extremely short host timeouts.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
With the four-channel-capture-support property enabled, the STM32 PWM
driver was missing every other frames during PWM capture.
The counter values are now reset just after getting the pulse and the
period of the cycle, instead of waiting the next interrupt to do so, and
thus missing a cycle.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The 'sys' argument in clock_control_renesas_ra_get_rate() is unused and
has been removed to clean up the implementation.
This also aligns with the function's actual behavior and eliminates
misleading validation logic.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Function spi_context_release reads the content of ctx->config without
checking first if it is set. In many drivers (including STM32), when a bad
configuration is made for the first transaction, ctx->config is not set,
and spi_context_release is called, resulting in hard fault.
This commit adds a check that ctx->config exists before reading it to
avoid this problem.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Fixed a bug where unconfigured clocks were connected to the can
interface in the device tree for SAM0, causing the interface to work
incorrectly. Fixed by adding the correct index when calling GENCTRL.
Also, the default divider has been reduced to 6 to allow setting
the bitrate to 500 kbps.
Tested on a canopennode sample on a board with an ATSAMC21E18A
microcontroller.
Signed-off-by: Vitaliy Livnov <vitaliy.livnov@devkit.agency>
Move the call to prepare_regulator_voltage_scale()
before PLL setup in clock_stm32_ll_h7.c.
This ensures the voltage regulator is configured
to the appropriate voltage scale before increasing
the system clock frequency via PLLs.
Without this change, the system configuration
may be out of spec.
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
