Coverity reported a memory - illegal accesses when using memset in
ataes132a_aes_ecb_block(). This can happen when the input block is
exactly 16 bytes: memset(¶m_buffer[19], 0x0, 0) is called. But this
is an undefined behaviour in C even if size is 0, as ¶m_buffer[19]
is an invalid pointer.
The fix consists of simply skipping memset() in this case, since there's
nothing to zero out.
Coverity CID: 434642
Signed-off-by: Loic Domaigne <tech@domaigne.com>
When the QSPI is used in dual flash mode, e.g. on the STM32H747I-DISCO
board, only the first flash memory was reset and configured in 4-byte
addressing mode. This was in particular causing data to be incorrectly
read from the second flash memory and only even bytes were valid during
a read.
The dual flash mode was only enabled after reading the SFDP table since
it is desired to read the table of only one flash memory, not both.
This commit changes the driver to only disable the dual mode temporarily
while reading the SFDP table, ensuring all other commands and in
particular configuration commands are sent to both flash memories.
Signed-off-by: Thomas Altenbach <altenbach.thomas@gmail.com>
The STM32F7 family does not yet support power management in Zephyr.
Besides, LL_I2C_EnableWakeUpFromStop and LL_I2C_DisableWakeUpFromStop
are not implemented in the H7 HAL/LL drivers
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Replace memset() with an explicit loop to zero the data_buf array,
which is part of a volatile struct. Standard memset does not guarantee
volatile stores, which can lead to incorrect hardware access.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Correct PLL input frequency calculation to consider
HSI clock divider in clock_stm32_ll_h7.c file.
For sake of simplicity, use PLLSRC_FREQmacro that
already considers the HSI clock divider when applicable.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
During #89407 a driver-specific header stm32_dcmipp.h got introduced to
support new functionnalities not yet covered by video APIs.
Move this header into a new <include/zephyr/drivers/video/> include
direcctory like what other driver classes do.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Fix an issue where the BME280 sometimes returns an incorrect chip ID
immediately after a power cycle. This causes sensor initialization to fail.
According to the datasheet, the sensor requires a 2 ms start-up delay after
power is applied. This patch introduces a sleep delay to ensure the
required start-up time is respected before reading the chip ID.
Signed-off-by: Filip Stojanovic <filipembedded@gmail.com>
Setting the DOZEN bit in the flexio so the soc
does not force the peripheral to go into
low power mode when the soc is in idle.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Previously we always had driver to support 2M PHY regardless of
configuration. As this was fixed the missing support statemenent
caused 2M support to miss regardless of configuration.
Signed-off-by: Petri Pitkanen <petri.pitkanen@silabs.com>
The clock tree of the STM32H7RS series uses the ppre1
and ppre2 naming convention instead of apb1_prescaler
and apb2_prescaler for bus prescaler.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Current Implementation to write to MAC_MDIO_ADDRESS causes CR to be
set to 0. This leads to the divide always being 42 (on FRDM_MCXN947)
so, by default the clock is running at ~3.6MHz which is out of spec
range (1.0-2.5MHz)
This stops the do_transaction function from overwriting CR.
It also saves off the CR register before DMA reset
Signed-off-by: Jacob Wienecke <jacob.wienecke@nxp.com>
When IMU is set to stream with High-res mode, the FSR settings are
fixed for ICM42688 at 16g and 2000dps.
Unless this is enforced, the driver will provide incorrect scaling for
readings coming through streaming when the current FS setting is any
different than these.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Clean up unused variable 'ret' and 'link_state' in eth_xilinx_axienet.c to
improve code clarity.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Clean up unused variable 'rand_mac_addr' in eth_sensry_sy1xx_mac.c to
improve code clarity.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Previously, the CMSDK APB timer driver hardcoded the
counter clock frequency to 24 MHz, which limits reuse
across SoCs and boards with different timer clock
sources.
This patch replaces the hardcoded frequency with a value
derived from the device tree's `clocks` phandle, using
the `clock-frequency` property of the referenced clock
controller node. If the property is missing, it falls
back to a default 24 MHz and issues a build-time
warning.
Signed-off-by: Lidor T <lidor@exibit-iot.com>
When the endpoint is re-enabled, check if the current FIFO settings can
be reused. Further work is needed to improve FIFO memory handling for
more advanced interface configurations.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
In lis2dux12_read_status_cb() add a return instruction in case of
SENSOR_STREAM_DATA_NOP/SENSOR_STREAM_DATA_DROP.
Fixes: CID 529855
Signed-off-by: Armando Visconti <armando.visconti@st.com>
In lsm6dsv16x_read_status_cb() add a return instruction in case of
SENSOR_STREAM_DATA_NOP/SENSOR_STREAM_DATA_DROP.
Fixes: CID 529864
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Set fifo_mode structure to zero and initialize it properly according
to what interrupt event the user has selected.
Fixes: CID 529871
Fixes: CID 529865
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Cache CTRL1 into reg_ctrl1_active_val inside lis2dh_init_chip()
in the PM_DEVICE_ACTION_TURN_ON path. This prevents the first
runtime-PM RESUME from writing 0x00 to CTRL1 and disabling the sensor
when runtime-PM is enabled.
Fixes: #92196
Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
The second argument should unconditionally be the size of the output
memory area, not computationally derived from the input payload length.
The previous length validations would be incorrect when
`cmd_len == CONFIG_LORA_RYLRXX_CMD_BUF_SIZE`, as `snprintf` would be
told the output buffer was `CONFIG_LORA_RYLRXX_CMD_BUF_SIZE + 1` bytes
long.
Fixes#92619Fixes#92624
Signed-off-by: Jordan Yates <jordan@embeint.com>
Makes the choice CORTEX_M_SYSTICK_LPM dependent upon the
CORTEX_M_SYSTICK to prevent its default from showing up in
the .config of projects that do not use the CORTEX_M_SYSTICK
timer driver.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
The clock get rate api can be slow in certain targets and thus slowing
each SPI transaction. Instead on startup fetch the clock rate and store
this in ram. Then each spi configure action is simply reading that
variable
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
Virtio headers are moved to zephyr/drivers/ as they have no reason to be
top-level headers since virtio is a driver class.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Peripheral clocks are currently not being disabled for JTAG reset
condition, which causes driver init failures when debugging the SoC
with JTAG. Fix by disabling all clocks for this reset type.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Coverity reports a potential integer overflow in the accel_range
computation due to the use of a left shift on an int type.
CID 520269: Unintentional integer overflow (OVERFLOW_BEFORE_WIDEN)
Even though the register value is constrained to 0–3 by the BMA456 spec,
and no real overflow occurs, an explicit cast to int64_t prevents false
positives and aligns with safe coding practices.
Fixes: #90517
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
There was an unnecessary nested `if` in `ifx_cat1_counter_init` with the
same condition already checked in the outer block.
This results in dead and redundant code with no functional impact but
harms readability.
The inner `if (rslt != CY_RSLT_SUCCESS)` was removed to clean up the
function.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
The function counter_rz_gtm_set_alarm was accessing alarm_cfg->flags and
alarm_cfg->ticks before verifying that alarm_cfg is non-NULL.
This could lead to undefined behavior or crashes if a NULL pointer is
passed.
The pointer check has been moved before any dereference to fix this bug.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
The bus helpers for SETDASA and SETNEWDA could have the same
dynamic address assigned as it's static addr for SETDASA or
as it's dynamic addr for SETNEWDA. (Althrough, only a clown
would set the new dynamic address to the same old dynamic
address, it is still a valid address to set to).
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Drop LOG_ERR calls from driver level related to transfer calls.
Application can handle the result and decide whether to log or not.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Build a combined mask from the tx_invert and rx_invert flags and pass it
to uart_hal_inverse_signal(). Only invoke the HAL call when the mask is
non-zero, preventing unintended inversions and eliminating redundant
calls when no inversion is requested.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The LTDC RGB565 format corresponds to the PIXEL_FORMAT_BGR565 format.
Update the LTDC driver to advertise PIXEL_FORMAT_BGR565 as the supported
format instead of PIXEL_FORMAT_RGB565. This change ensures correct color
rendering in the sample display application and enables usage of the
video capture sample application.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Fix I2C target implementation so NACKs are issued if the callback returns
an error. This allows for proper signaling to the I2C host when commands
or data are invalid for the I2C target.
Signed-off-by: Alex Hogen <alex@edt.com>
Fix compile error due to unknown macro when building CONFIG_I2C_TARGET for
Silabs Thunderboard EFM32GG12 (SLTB009A). The previous macro exists in
(all?) EFR32 part headers but not EFM32.
Signed-off-by: Alex Hogen <alex@edt.com>
Change backup domain access gating in STM32 RTC interrupt handler
to only request access when RTC registers ar to be modified
instead of during the whole RTC interrupts service including
interrupt consumer callback execution.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Fix the backup domain access request in STM32 RTC initialization that
was unbalanced in case of clock configuration failure.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Add missing backup domain access requests in STM32 RTC counter
driver that are needed to modify RTC registers.
Remove backup domain access requests in rtc_stm32_read() since this
function only reads RTC registers and backup domain access protection
protects RTC registers against write accesses only.
Fixes issue 92511.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Add the 'const' qualifier when casting 'dev->config' to 'struct
bmp581_config *' to preserve const-correctness and fix SonarQube warning :
"A cast shall not remove any const or volatile qualification from the
type of a pointer or reference."
This improves maintainability by respecting the const contract and resolve
static analysis issues.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Move null check for 'dev' before dereferencing it to access dev->config.
This ensures the check is meaningful and avoids undefined behavior in case
of a null device pointer.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
When WDT_OPT_PAUSE_IN_SLEEP option is passed in set enableWait flag
in addition to the enableStop.
Fixes#86437
Signed-off-by: David Leach <david.leach@nxp.com>
Move the IronSide APIs to soc/nordic from drivers/firmware since
these are vendor specific APIs. The header files are now included
from <nrf_ironside/*.h>. Adjust code that uses these APIs accordingly.
Also move the DT binding for "nordic,ironside-call" from
bindings/firmware to bindings/misc.
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
