Commit graph

23353 commits

Author SHA1 Message Date
Phi Bang Nguyen
0b090fafa3 drivers: video: stm32-dcmi: Drop video_stm32_dcmi_is_fmt_valid
Drop video_stm32_dcmi_is_fmt_valid() as it is not needed. In this
function, (i) checking against a format based on another utility
function video_bits_per_pixel() is not robust, this check is done in
the sensor driver, (ii) checking against the heap size is not
appropriate because this should be done when allocating buffers, not
in get/set format.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Phi Bang Nguyen
fcadb792be drivers: video: Compute bits per pixel according to format
Compute bits per pixel according to the pixel format instead of
hardcoding it.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Trung Hieu Le
da12135525 drivers: video: ov5640: Fix constrast value sign
Fix sign's register for constrast value.

Signed-off-by: Trung Hieu Le <trunghieu.le@nxp.com>
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Trung Hieu Le
a3c31a5ca1 drivers: video: ov5640: Fix brightness control register
Fix the sign register for brightness control

Signed-off-by: Trung Hieu Le <trunghieu.le@nxp.com>
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Trung Hieu Le
cc5f5506da drivers: video: ov5640: Fix HUE register write
SDE_CTRL8_REG's value must be modified using modify_register.

Signed-off-by: Trung Hieu Le <trunghieu.le@nxp.com>
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Phi Bang Nguyen
ae63908ae7 drivers: video: ov5640: Drop cur_pixrate internal variable
Update the control value directly. No need for an internal variable.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Farah Fliss
33ff1f65d6 drivers: video: mt9m114: Make the driver multi-instance
The mt9m114 camera driver used to be single-instance.
Improve it to multi-instance.

Signed-off-by: Farah Fliss <farah.fliss@nxp.com>
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Farah Fliss
46bf6b589f drivers: video: mt9m114: Fix coding style
Fix coding style in a variable naming.

Signed-off-by: Farah Fliss <farah.fliss@nxp.com>
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Phi Bang Nguyen
c94bcb883b drivers: video: mipi_csi2rx: Fix type range related to pixel rate
Fix some type range related to pixel rate which can cause overflow.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Phi Bang Nguyen
a1e58acf4b drivers: video: mipi_csi2rx: Explicitly set init priority
The MIPI CSI-2 Rx needs to be initialized after the camera sensor which
is generally initialized with CONFIG_VIDEO_INIT_PRIORITY.

This is currently true "by chance" due to the order the linker links the
object files. This linker order is not easily controlled, so use an
explicit priority value to ensure this requirement.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Bjarki Arge Andreasen
8cf519db06 drivers: spi: nrfx_spim: self resume until spi_release()
The nrxf_spim driver currently resumes itself for the duration of
a transfer, however, in case SPI_LOCK_ON is used, the driver needs
to keep itself resumed until spi_release() is called. Currently,
this results in unbalanced suspend as the bus puts itself both
after transaction is done, and when spi_release() is called.

This patch makes the driver check if SPI_LOCK_ON is set once
transaction is complete, if yes, selv get one more time to
account for the two puts which will follow.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-05-20 16:09:11 +01:00
Bjarki Arge Andreasen
43720efe31 Revert "drivers: spi: nrfx_spim: prevent self suspend until spi_release()"
This reverts commit 937a44a74e.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-05-20 16:09:11 +01:00
Bjarki Arge Andreasen
f94c6f20ff drivers: clock_control: nrf fll16 remove closed loop impl
Remove the closed loop mode implementation for the fll16m clock.
Closed loop causes a hardware bug resulting in increased current
consumption if SoC experiences high, but within spec, temperatures.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-05-20 16:08:31 +01:00
Sai Santhosh Malae
1971bc0a8e drivers: i2s: siwx91x: Add siwx91x I2S primary driver
Implement I2S driver for siwx91x device

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-05-20 15:24:50 +02:00
Sai Santhosh Malae
dcdc8e8a55 drivers: i2s: siwx91x: I2S clock initialization for siwx91x
Clock driver changes required for initializing the I2S clock
for the siwx91x driver

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-05-20 15:24:50 +02:00
Yau-ming Leung
d95ca654cc drivers: icm42688: fix FIFO HIRES packet gyro scale
The original scale value used to convert raw gyro value to q31 format is
incorrect. Updated to the correct value.

Signed-off-by: Yau-ming Leung <ymleung314@gmail.com>
2025-05-20 15:24:39 +02:00
Arunmani Alagarsamy
88846ddc81 drivers: wifi: siwx91x: Add Wi-Fi mgmt events
- Implement event handling for AP and STA modes
- Enable configurations for security (PSK), aggregation,
  and hidden PSK credentials

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-05-20 15:24:06 +02:00
Arunmani Alagarsamy
4c1a91fa63 drivers: wifi: siwx91x: Enable AP configuration support
- Adds support for configuring client maximum inactivity timeout.
- Adds support for bandwidth, It supports 20MHZ only.
- Adds support for setting the maximum number of clients and
  hidden SSID mode by rebooting the NWP device.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-05-20 15:24:06 +02:00
Arunmani Alagarsamy
0459bd8638 drivers: wifi: siwx91x: Replace opermode flags
Replaced SL_SI91X_CLIENT_MODE and SL_SI91X_ACCESS_POINT_MODE with
WIFI_STA_MODE and WIFI_SOFTAP_MODE, respectively, for AP configuration
command intergration.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-05-20 15:24:06 +02:00
Arunmani Alagarsamy
c8a29b3038 drivers: wifi: siwx91x: Add interface state validation
This patch introduces validation checks to ensure Wi-Fi commands are
executed only when the device is in a valid operational mode.

- Restricts command execution if the device is not in an appropriate mode
- Prevents reconfiguring the device when it is already in an active state
- Enabled Advanced multiprobe setting as default.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-05-20 15:24:06 +02:00
Maureen Helm
77f7b1feb1 drivers: sensor: adi: Set adxl345 thread name
Sets the adxl345 driver thread name for easier debugging.

Signed-off-by: Maureen Helm <maureen.helm@analog.com>
2025-05-20 15:23:51 +02:00
Luis Ubieda
75fda15b8c sensor: adxl345: Set FIFO to bypass mode when DRDY is enabled
In order to prevent not serving all events that would clear the
interrupt line. This patch also removes FIFO servicing through
fetch/get APIs, as this is only exposed through streaming mode.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-05-20 15:23:51 +02:00
Marcin Szymczyk
6bdd19bda3 drivers: clock_control: nrf2_fll16m: use HAL
HAL function for setting clock source in nrf_lrcconf is now available.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2025-05-20 12:47:47 +02:00
Tomasz Moń
8b4c53e05a drivers: udc_dwc2: Optimize endpoint interrupt handling
SEGGER Ozone J-Trace Code Profile identified iterations over daint value
as hot path. The iterations show at the very top of code profile because
full iteration happens whenever there is any activity on endpoint.

Optimize daint handling loops so only set bits are iterated over. While
this optimization depends on find_lsb_set() efficiency, it seems to be
worth it solely on the basis that quite often only few bits are set.

After a bit deeper analysis, I was suprised that on ARM Cortex-M33 the
find_lsb_set() approach is faster than naive iteration even if all bits
are set (which is extreme case because USB applications are unlikely to
use all 16 IN and 16 OUT endpoints simultaneously). This is due to fact
that there is only one conditional jump CBNZ and find_lsb_set() - 1
translates to RBIT + CLZ and then clearing the bit uses LSL.W + BIC.W.
Whereas the naive itation uses ADDS + CMP + BNE for the loop handling
and also has LSR.W + LSLS + BPL (+ ADD.W instruction on each iteration
to add 16 for OUT endpoints) for the continue check. Therefore the
optimized code on ARM Cortex-M33 is never worse than naive iteration.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2025-05-20 12:47:34 +02:00
jhan bo chao
31b756562a drivers: input: rts5912: clear pending irq when setup
clear pending irq when setup.

Signed-off-by: jhan bo chao <jhan_bo_chao@realtek.com>
2025-05-20 09:16:31 +02:00
Sylvio Alves
b1ab17a015 driver: video: remove endpoint id in esp32 driver
Remove endpoint ID entry in esp32 video driver needed after
API changes.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-05-19 21:55:32 +02:00
Mahesh Mahadevan
dcad2e036e drivers: nxp_pint: Add power handlers for the NXP PINT driver
This is needed to restore state on wakeup from certain low power
modes.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-05-19 21:55:15 +02:00
Mahesh Mahadevan
b694af6576 drivers: gpio: Setup the pinctrl in the NXP LPC GPIO driver
The pinctrl register bits need to be restored to GPIO mode
after we exit from certain low power modes. We cannot rely
on the pin function to default to GPIO.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-05-19 21:55:15 +02:00
Mahesh Mahadevan
6698f3b4e8 drivers: dma: Add PM handler for NXP LPC DMA driver
Add the PM handler. Reinitialize the DMA block in the
TURN_ON action, this is needed for some SoC's after the system
exits certain power modes.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-05-19 21:54:55 +02:00
Hank Wang
5379f4a16b drivers: sensor: tmp1075: add support for fractional threshold values
Previously, the TMP1075 driver only used the integer part (val1) of the
sensor_value when setting TLOW and THIGH thresholds. This limited the
precision of temperature threshold configuration and could be insufficient
in applications requiring fine-grained control.

This patch adds proper handling for the fractional part (val2) by encoding
it into bits [7:4] of the 12-bit temperature register according to the
TMP1075 datasheet. The decoding logic in get_threshold_attribute() is also
updated to recover the fractional value accurately.

Signed-off-by: Hank Wang <wanghanchi2000@gmail.com>
2025-05-19 21:54:45 +02:00
Fabio Baltieri
0a14cc21cc serial: uart_bt: set the workqueue thread name
Set the bt_uart workqueue name so it does not show up as a mystery
thread on the thread list.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-05-19 18:39:16 +01:00
Fabio Baltieri
d79e9e7d3a serial: uart_bt: select SERIAL_SUPPORT_INTERRUPT
Select SERIAL_SUPPORT_INTERRUPT for uart_bt, this is required to have
the interrupt API available.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-05-19 18:39:16 +01:00
Mirko Bottarelli
6a791bd478 drivers/gpio: Fix issue in gpio_pca6416
Added the possibility of leaving the gpio-int property empty, in case
the corresponding pin is not connected.

Signed-off-by: Mirko Bottarelli <mirko.bottarelli@gmail.com>
2025-05-19 16:49:07 +01:00
Mirko Bottarelli
28052aa7f0 drivers: gpio: Fix PCA6416 configuration
Fix device initialisation, allowing for empty interrupt_gpios in the
dts, as suggested by the documentation.

Signed-off-by: Mirko Bottarelli <mirko.bottarelli@gmail.com>
2025-05-19 16:49:07 +01:00
Mahesh Mahadevan
0abf4f589b drivers: input_gt911: Reinitialize interrupt GPIO on exit from PM
Certain power modes lose state of the GPIO, hence we need to
reconfigure the interrupt GPIO. This is managed using pm_notifiers

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-05-19 16:36:42 +02:00
Abderrahmane JARMOUNI
6be42eb2d3 drivers: display: sdl: add windows custom naming
Add the possibility to set a custom name for SDL window
in native simulator

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-05-19 16:36:12 +02:00
Sergei Ovchinnikov
1ef29d5218 dts: bindings: npm1300-charger: make vbus-limit-microamp required
Make the vbus-limit-microamp property of npm1300-charger required and
change its range to reflect the one actually supported by the device.

Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
2025-05-19 16:35:55 +02:00
Camille BAUD
23d1a8fd2d drivers: display: Re-introduce SSD1327
This makes SSD1327 use the new L8 display format.
It also fixes all displays that didnt support the undocumented
monochrome mode.
It also adds i2c and revamps the entire driver.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-05-19 16:35:50 +02:00
Hao Luo
92e723db93 dts: uart: create ambiq uart binding file
This commit creates ambiq uart new binding file
and renamed the previous one as ambiq,pl011-uart

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-05-19 13:32:44 +02:00
Hao Luo
be4d8b22c3 drivers: uart: create ambiq uart driver for apollo510
This commit creates ambiq uart driver for Apollo510 SoC,
not to use the pl011 driver any more.

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-05-19 13:32:44 +02:00
Fabio Baltieri
87e20308bd drivers: dp: fix build on M0 MCUs
Current code does not build on Cortex-M0, seems like it does not like
subs:

Error: instruction not supported in Thumb16 mode -- `subs r3,#1'

Adding a unified assembler language declaration in the snippet seems to
fix the problem, also add an M0+ board so this is tested in CI.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-05-19 11:24:49 +02:00
Tomasz Moń
243f7c44d3 drivers: udc_dwc2: Disable control IN endpoint on timeout
DWC2 core sets DIEPCTL0 SNAK when SETUP packet is received. The CNAK bit
results in device sending NAK in response to IN token sent to EP0, but
it does not modify the TxFIFO in any way. The stale data in TxFIFO can
then lead to "FIFO space is too low" error. Solve the issue by disabling
and flushing IN endpoint 0 if previous control transfer did not finish.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2025-05-19 11:24:27 +02:00
Camille BAUD
88387b44dc drivers: syscon: Introduce BFLB Efuse driver
This introduces a driver used to access bouffalolab efuses via syscon API

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-05-19 10:11:58 +02:00
Anas Nashif
2aacbcaab5 style: add missing curly braces in if/while/for statements.
Add missing curly braces in if/while/for statements.

This is a style guideline we have that was not enforced in CI. All
issues fixed here were detected by sonarqube SCA.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-05-17 14:10:33 +02:00
Wajdi ELMuhtadi
6353ba88b6 drivers: sensor: wsen_itds_2533020201601: add sensor driver
Add wsen_itds_2533020201601 driver with
the corrected name and compatibility with
the hal update as well as added new features.

Signed-off-by: Wajdi ELMuhtadi <wajdi.elmuhtadi@we-online.com>
2025-05-16 22:56:06 +02:00
Rubin Gerritsen
577a004b32 drivers: spi: nrfx: Add explicit dependency to GPIO
This dependency was always there but not explicitly defined.
By adding the explicit dependency it becomes more obvious
what is wrong when SPI is enabled but GPIO disabled.

This was found when building `samples/bluetooth/peripheral`
for `nrf54l15dk/nrf54l15/cpuapp` with `CONFIG_GPIO=n`.

Before we got:
 - A linker error in `spi_nrfx_common.c` failing
   to reference some nrfx_gpiote APIs.
 - A linker error in `spi_nrfx_spim.c` failing to reference
   the GPIO dts entry.

Now we will get a warning of that GPIO is not enabled
With this it becomes more obvious that SPI driver is enabled by
default because of the external flash mounted on the DK.

Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
2025-05-16 22:55:38 +02:00
Scott Worley
53e17c4c22 drivers: spi: microchip: Add SPI driver for MEC5 HAL quad SPI
SPI driver for Microchip MEC5 HAL based QSPI controller. QSPI
hardware supports full duplex, dual, and quad operation. MEC5
QSPI controller also includes three local DMA channels per
direction to off load firmware. The driver API supports full
or half-duplex. Due to QSPI hardware not supporting one wire
half-duplex, this driver supports full-duplex only. QSPI hardware
design requires it to control chip select and current hardware
supports up to two chip selects. Zephyr's SPI DT macros store the
child SPI device's reg properity as the "slave" member of the SPI
configuration structure. The driver uses the "slave" value as the
chip select. Additional timing settings specific to SPI flash devices
are in a new SPI device YAM file: "microchip,mec5-qspi-device.yaml"
which includes the standard "spi-device.yaml". If the new YAML is not
used, the QSPI controller will use default timing values for chip
select and I/O line taps.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-05-16 21:36:50 +02:00
Luis Ubieda
a13be2f320 sensor: rm3100: Add streaming mode
Compatible trigger: DRDY.

Tested with Sensor Shell commands.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-05-16 21:36:23 +02:00
Luis Ubieda
4dfe251986 sensor: rm3100: Add ODR build-time setting through DTS property
Using pre-defined values displayed on datasheet's table 5-4 for
CMM Update Rates.

Please note that datasheet specifies these Update-Rates may have
up to 7% standard deviation, which may be significant for certain
applications.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-05-16 21:36:23 +02:00
Luis Ubieda
c1f3e2c712 sensor: rm3100: Basic functionality
This patch introduces rm3100 magnetometer sensor, with basic
support (only read-decode).

This driver has bus support for I2C.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-05-16 21:36:23 +02:00