The ED value measured during ED scanning is converted
to RSSI in dBm at the ieee802154 driver level before
it is reported to upper layer through the scan callback.
Signed-off-by: Vincent Tardy <vincent.tardy@st.com>
Fix issue in the function
stm32wba_802154_configure_mac_key() : avoid keys copy
in case of the value field of first key in the mac_key
pointer is null.
Signed-off-by: Vincent Tardy <vincent.tardy@st.com>
As of commit c92c8ab461
("firmware: scmi: core: merge send_message() logic"), the SCMI core is
able to figure out that it needs to use polling-based messaging whenever
in PRE_KERNEL stage. Thus, consumers are no longer required to query the
kernel's state via a `k_is_pre_kernel()` call and pass its value to
`scmi_send_message()`.
Furthermore, said commit also changes the semantic of the "use_polling"
parameter. Now, for interrupt-based messaging, the core may choose to
ignore the caller's request and use polling instead.
Thus, replace all usages of `k_is_pre_kernel()` with a hardcoded value.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Enabling and disabling interrupts may happen concurrently from thread
and interrupt context. Add locks to synchronize the access to the ctrl
register.
This was observed to improve the stability of the zephyr,bt-hci-uart
driver when used with the cmsdk_apb uart driver.
Signed-off-by: Marco Widmer <marco.widmer@bytesatwork.ch>
Similar to the TX interrupt, the RX interrupt is also an edge interrupt
that only fires when a new bytes is received. When enabling the RX
interrupt, data may be already present in the RX FIFO. Call the
interrupt handler manually to start processing.
Also check if calling the interrupt handler is really required.
Signed-off-by: Marco Widmer <marco.widmer@bytesatwork.ch>
irq_is_pending should not return 1 when interrupts are disabled through
irq_XX_disable. Check the interrupt enable bit before returning.
Signed-off-by: Marco Widmer <marco.widmer@bytesatwork.ch>
For use in tests where the existing "vnd,dac" driver doesn't work as it
returns error codes for all API functions. The approach is mimicked from
the adc-emul driver.
Signed-off-by: Henrik Lindblom <henrik.lindblom@vaisala.com>
Instead of using MCOX specific check with STM32MP1 devices,
the dedicated enable bit is defined in device tree.
This breaks compatibility with old DT overlays for
STM32MP13 devices.
The new overlay should now have 2 clocks, where the 1st one
is the enable bit, e.g. like:
clocks = <&rcc MCO1CFGR_REG BIT(12)>, <&rcc ...>;
Signed-off-by: Adam BERLINGER <adam.berlinger@st.com>
The change introduces clock-names into the MCO device tree.
This shouldn't break compatibility with existing DT overlays.
It clarifies the clock configuration for devices
with dedicated enable bit for MCO.
Signed-off-by: Adam BERLINGER <adam.berlinger@st.com>
Adapt all Espressif SoC and driver code to the updated
hal_espressif module synced with IDF master branch.
Main changes:
- clock control: delegate peripheral clock gating to HAL
layer using new clock/reset APIs
- SPI/GDMA: adapt to restructured DMA HAL with new channel
allocation and configuration interfaces
- ethernet: add RMII clock configuration and PHY management
- GPIO: simplify using direct HAL function calls
- flash: adapt to updated SPI flash HAL interfaces
- linker scripts: update IRAM/DRAM mappings for new HAL
object files
- DTS: fix ESP32-S2 PSRAM dcache1 address to match actual
MMU mapping region (0x3f800000 DRAM1 instead of 0x3f500000
DPORT which lacks 8-bit access capability)
- west.yml: update hal_espressif revision
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add an opt-in Kconfig option to use the RP2350 untranslated XIP alias
for flash reads. This ensures the flash API can still access physical
partitions when Address Translation has remapped the primary window.
It otherwise introduces no changes for existing applications.
Signed-off-by: Raul Hernandez <raul.hernandez@spaceface.dev>
Move the get_regs(dev) call after DEVICE_MMIO_MAP() to ensure the MMIO
region is mapped before retrieving the register base.
This fixes the potential invalid MMIO access.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Add missing dummy macro define HSUSBD_BUSINTEN_SOFIEN_Msk for when
CONFIG_UDC_ENABLE_SOF is enabled to pass compile for USBD
Fixes: #102173
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
Add support for PM policy device constraints to the MCUX LPADC driver.
This allows the driver to specify that certain power states should be
disabled when the device is active, which can help ensure proper operation
and reduce power consumption.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
This might be just a cosmetic change, but caused me to study logs
a bit longer to understand.
When in the AWAIT_POWER_ON state, we do open an UART, but we
immediately attach the chat module into the UART, so we don't see the
log message "event bus opened".
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
Add Atmel SAM USBHS driver for SAM E70/S70/V70/V71 family. The driver
was tested using CDC-ACM and testusb samples.
Fixes: #74663
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Update the @param documentation for qspi_npcx_fiu_uma_block to match the
actual function signature, changing lock to lock_en.
Signed-off-by: Firas Sammoura <fsammoura@google.com>
The simulated flash driver incorrectly applied the no_explicit_erase
capability. It was overriding Kconfig settings with a missing Devicetree
property, which caused RAM-like configurations to wrongly report needing
explicit erases before writes.
This commit fixes the initialization macro to correctly check the DT
instance property no-explicit-erase, while properly falling back to the
global CONFIG_FLASH_SIMULATOR_EXPLICIT_ERASE Kconfig.
A new runtime test is also added to properly verify this capability.
Fixes#100352Fixes#100400
Signed-off-by: Seyoung Jeong <seyoungjeong@gmail.com>
We modified the Microchip XEC/MEC version 2 I2C byte mode driver
to work on v3.8 I2C hardware in MEC174x/5x/165x SoCs. The changes
are as follows:
1. Add a local header file containing register and bit field definitions
2. Use Zephyr inline register access functions (sys_read/write)
instead of CMSIS register structures.
3. Change DT bindings to require GPIO references for the SCL and SDA
pins. MEC172x will use GPIO driver to get line states. MEC174x/5x
have v3.8 I2C hardware with read-only live values of SCL/SDA pin
states in the bit-bang control register. The MEC172x SoC code to
read I2C GPIO's is no longer needed and is removed in a later
commit in this series.
4. Use WAIT_FOR macro in place of custom spin loops.
5. SonarQube code check recommendations except WAIT_FOR macro which is
based on a GNU compiler extension.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
The check for the layout size, when CONFIG_SPI_NOR_SFDP_DEVICETREE
is enabled, is already done with build asserts during build
(inside PAGE_LAYOUT_GEN). We don't need to check a second
time.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Add a loop to triggerchannel start for each remaining major loop iteration
to ensure complete data transfer.
Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>
For SMP kernel, the secondary Core is booted up in post kernel stage,
the secondary core need to initialize its, for example map collection
table to target redistributor, we could not use sleep delay functions
at this time because the scheduler is not ready for secondary Core,
so this patch is to always use busy wait in post its command process.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
In case of SMP kernel, multiple CPU Core could post its command by
using the same command port, so add lock to make sure its command
is posted one by another.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
The parsing of the number of bytes to read in the read command was being
done in hexadecimal, causing unexpected behavior.
Now the number can be interpreted in decimal or hexadecimal if prefixed
with 0x.
Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
This patch avoids the use of the default device on destructive
operations like erase and write. Allowing it might have catastrophic
results like erasing parts or the whole of the application itself.
Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
This fixes the range check condition. Without it, the last page cannot
be mapped.
This is a follow-up to 70961e2; the same fix is applied to the neighboring
function. Both functions with the problem were introduced by 01d3575.
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
The main problem I want to fix here is that the DT binding's file name
doesn't match its compatible, which is a violation of our upstream
bindings rules.
The "dsi" suffix here is not a good practice, DT-wise. The compatible
string represents the programming model for the device in vnd,device
format. We don't put the "-spi" at the end of compatibles for SPI
devices, and we don't put "-pcie" on the compatibles for PCIe devices.
The bus has no place in the DT compatible. So in this case, the
file name seems fine, but the compatible itself is off.
(The other option would have been to change the suffix to "mipi-dsi"
(or "mipi_dsi") as necessary to match the relevant "on-bus:" value in
the binding -- but let's simplify and better align with DT best
practices here.)
Signed-off-by: Martí Bolívar <marti.bolivar@oss.qualcomm.com>
This fixes a regression introduced with commit fc2b1b2f3e.
This ensures that when the UAOL driver is disabled, the DAI UAOL
driver is also disabled.
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Don't allow the LPTIM system clock driver to be enabled if the required
nodelabel `stm32_lp_tick_source` does not exist. This prevents incorrect
usage which could result in non-trivial build failures.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Add support for hardware-generated periodic compare events using
the GRTC interval feature. Once configured, the hardware generates
compare events at a fixed interval without CPU intervention.
The feature is available only on channels defined as
"extended-channels" in the devicetree.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Add a new DMA driver for the Infineon DMAC (Direct Memory Access
Controller) specifically for PSoC4 Series.
Signed-off-by: Dharun krithik k <dharunkrithik@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
PSA provides a random generator that requires an entropy source.
Just deprecate it for further remotion.
Signed-off-by: Flavio Ceolin <flavio@hubblenetwork.com>
Change ctr_drb random implementation to use PSA Crypto API.
Since name convention is very different and PSA abstracts the
algorithm used to generate CSPRNG, file and Kconfig options were
changed. Current symbols were deprecated and just select the new
one.
Signed-off-by: Flavio Ceolin <flavio@hubblenetwork.com>
Adjust GLCDC panel timing parameters for
rtklcdpar1s00001be display shield and add missing config for lvgl when
used with DAVE2D
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Add support for the Chipsemi CHSC6540 touch controller and refactor
the driver to support multiple compatible variants.
- Introduce a function pointer (read_data) in driver config to abstract
controller-specific data parsing.
- Implement chsc6x_read_data() and chsc6540_read_data() with
variant-specific register layouts.
- Switch to DT_FOREACH_STATUS_OKAY() for per-compatible device
instantiation.
- Replace instance-based macros with node-based DEVICE_DT_DEFINE().
This change allows the driver to support both chipsemi,chsc6x and
chipsemi,chsc6540 via devicetree without duplicating core logic.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Pass &mdata.mdm_rssi instead of casting the integer value directly
to a pointer, fixing a -Wint-to-pointer-cast compiler warning.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
hwinfo_get_device_id needs to access FMC/RMC and can change its open
state. This will break other code which also accesses the FMC/RMC. To
fix the corrupt, hwinfo_get_device_id will do save & restore of FMC/RMC
open state and the related protected register lock state.
Fix: 104848
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
