Add NETC block driver, it could do some block memory region MMIO mapping
and also so dome block initialization, moved some netc related
configuration form board_init() to block driver so that it could be reused
between different platforms, although some configuration is different for
different platform, but put all NETC related code in the same driver to
make it easier to be maintained.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
GIC v3 ITS is initialized in pre-kernel stage in which sleep function
can't work yet, so use busy delay in pre-kernel stage and use sleep
delay in post-kernel stage.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
For RDbase used by its command, When GITS_TYPER.PTA = 1, physicall address
is used, the RDbase field consist of bits[51:16] of the address, so need
to left shift the address by 16 bits. But when GITS_TYPER.PTA = 0, PE
number is used, no need to shit anymore.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
GIC redistributor on Some platform are connected to a non-coherent
downstream interconnect, it need to use Non-cahable and Non-shareable
access atttributes to access external memory. And also flush the
data cache after CPU update related memory.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Move control endpoint enable/disable calls to udc_enable()/udc_disable().
It does not change much during USB device support initialization, but
it seems to resolve an issue when starting from RAM, though the real
cause is unknown.
Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
Update the driver to support DMA operations on L4 series devices, with
a shared DMA channel. Split channels do not work on these chips, since
there is no dedicated TX and RX channels on the DMA, so configuring two
channels with SDMMC as the peripheral results in a non-functional
configuration.
Fixes#91216.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add a helper function that constructs a rtio SQE chain with the purpose
to perform a bus read operation on a list of registers.
Usage:
struct rtio_regs regs;
struct rtio_reg_list regs_list[] = {{regs_addr1, mem_addr_1, mem_len_1},
{regs_addr2, mem_addr_2, mem_len_2},
...
};
regs.rtio_regs_list = regs_list;
regs.rtio_regs_num = ARRAY_SIZE(regs_list);
rtio_read_regs_async(rtio,
iodev,
RTIO_BUS_SPI,
®s,
sqe,
dev,
op_cb);
Signed-off-by: Armando Visconti <armando.visconti@st.com>
• Supports led_on/off, led_set_brightness (0–100 %, 152 Hz default),
and led_blink (7 ms – 1.685 s) with automatic sharing of the two
on-chip PWM engines; returns –EBUSY when a third distinct pair is
requested.
• Includes basic runtime-PM boilerplate to honour power-domain control;
the device itself has no dedicated low-power states.
Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
1. Update nxp irtc driver to fix issue in init and alarm function.
2. Update RTC device tree binding to support "share-counter".
3. Update RT700 dtsi to support rtc0 for cpu0 and rtc1 for cpu1.
4. Update readme.
5. Update unit test project conf for RT700.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
The driver gets FMC bank address using
`FMC_BANK1_<parent_register_value>` define.
This approach has some flaws:
- The parent (bank) register's value might not correspond
sequentially to the expected bank number.
For example: `STM32_FMC_NOSRAM_BANK3` maps to `FMC_BANK1_4`,
instead of `FMC_BANK1_3`.
- Some families don't even define the necessary `FMC_BANK1_x` macros.
To address this, the commit adds an optional `bank-address` property,
providing a direct way to define the FMC bank address for the driver.
Signed-off-by: Georgij Černyšiov <geo.cgv@gmail.com>
Otherwise, a previous firmware build could have run into the chip and
keep led control enabled in spite of disabling it through
dts-property.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
LTDC interrupt routine is used to reload frame buffer pointer
once full frame is finished flushing. As long as there is no
need to change buffer - there is no need to disturb CPU.
Thus: Enable LTDC interrupt only when new buffer is pending
Signed-off-by: Pavlo Hamov <pasha.gamov@gmail.com>
Keep IW610 kconfig same as RW612, as it has similar Wi-Fi FW.
Remove NXP_WIFI_CAU_TEMPERATURE as it's not used.
NXP_WIFI_MEM_ACCESS, NXP_WIFI_REG_ACCESS and NXP_WIFI_OWE should not be
enabled by default.
Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
Added the below config to overide default calibration data and
select 2Ant Isolation.
NXP_OVERRIDE_CALIBRATION_DATA
WLAN_CALDATA_2ANT_HI_ISO
WLAN_CALDATA_2ANT_LO_ISO
Signed-off-by: Kavita Sharma <kavita.sharma_1@nxp.com>
When using DMA for SPI communication, the WS2812 SPI buffer should be
placed in the __nocache section to ensure it resides in uncached memory,
which is typically required for DMA operations.
Signed-off-by: Arthur Gay <arthur.gay@marshmallow.kids>
Initially phy_link_callback_set got called before iface init got set.
Moving to iface_init, fixes an issue that mac would set interface to up
even though it was down because startup phy down callback didn't got
through.
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
In case of a busy environment and if STA is far, then we see many
retries for the frames that cause the RPU to be awake though host has
de-asserted wakeup_now signal, this leads to WDT interrupt and host
thinks that it has given sleep opportunity to RPU and initiates a
recovery.
To handle this, increase the sleep opportunity window to 5s to cover all
the retries, this solves the false recovery problem. While at it, also
increase the range, no reason to limit to lower window. And update the
help text with the warning about power consumption.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Add build asserts for "memory-regions" property in nrf drivers which is
required on targets with DMM for saadc, pdm, pwm, twim, twim_rtio, twis,
tdm, uarte, spim and spis. On targets where the property is not required
the assertion macro expands to nothing.
Signed-off-by: Michał Bainczyk <michal.bainczyk@nordicsemi.no>
Cleaned up the flash_rpi_pico driver to improve code readability and
compliance with Zephyr coding standards. Fixed inconsistent indentation
across the file and removed variables that were declared but not used.
A few improvements are credited to Manu3l0us.
Signed-off-by: Hanan Arshad <hananarshad619@gmail.com>
The Raspberry Pi Pico 2 uses a QMI flash controller, which differs from the
SSI controller used in the original Pico. Zephyr already has support for
the SSI controller, but lacked support for QMI.
This change adds the QMI flash controller implementation in the
flash_rpi_pico.c driver file. Additionally, the RP2350 SoC devicetree file
(rp2350.dtsi) has been updated to enable and describe the flash controller
for Pico 2.
Signed-off-by: Hanan Arshad <hananarshad619@gmail.com>
Remove extra-parentheses when operator precedence is implicit.
Eliminate implicit integer to boolean conversions.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Usually, drivers failing to initialize throw a message in the log,
signaling the cause of failure. Add it to this driver so the user
isn't confused by no message yet the device being marked as disabled.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Fix condition in which alarm stops working after a certain amount
of time. Hardware timer is 54-bit, yet it is treated as 32-bit by
the counter driver. To allow alarm event by hardware comparators,
counter high word must be loaded into the register along with
the lower word managed by the driver.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Fix Coverity issue CID 363738 (CWE-120): A potential buffer overflow could
occur in fcx_mldx5_uart_send() due to unchecked memcpy() when copying
command data into a fixed-size frame buffer.
This patch ensures that the length of the data being copied validated
against the remaining buffer size to prevent overruns. Also replaces a
redundant strlen() call with the precomputed cmd_data_len.
Fixes: #92634
Signed-off-by: sudarsan N <sudarsansamy2002@gmail.com>
Addressing low-hanging fruits.
Put in a separate commit in order to make it easier to keep track of
changes.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
As a first step to enable the similar variants (e.g: ICM42686),
refactor common functionality into icm4268x files. As a result,
applications using the icm42688 will need to have both compatible
properties: "invensense,icm42688" and "invensense,icm4268x" defined.
In-tree boards have been modified to comply with this pattern.
This patch does not contain functional changes. The driver should
work the same as before.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Firmware needs to know the connection type to be established.
use the wpa_proto field to derive the connection type.
Signed-off-by: Ajay Parida <ajay.parida@nordicsemi.no>
SPI(M/S)20 and SPIM(M/S)21 instances enable usage of pins on different
port, but require request for constant latency mode. Added
handling of such scenario in the driver. Added testcase
to cover it.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
UARTE20 and UARTE21 instances enable usage of pins on different
port, but require request for constant latency mode. Added
handling of such scenario in the driver. Added testcase
to cover it.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
