Add support for using native sockets with the connectivity API. This
allows libraries that use the connectivity API to be tested in an
application with real connectivity, without external hardware.
Signed-off-by: Jordan Yates <jordan@embeint.com>
When calculating accel and gyro period for 12.5Hz, the frequency value is
incorrect. Updated to correct value.
Signed-off-by: Yau-ming Leung <ymleung314@gmail.com>
PIN9 of an ICM42688 can be configured as an interrupt output, external
clock input or frame sync output. Pin function can now be set via a sensor
attribute.
Signed-off-by: Yau-ming Leung <ymleung314@gmail.com>
The current procedure to initialize the GPIO is:
If the GPIO is configured as GPIO_OUTPUT and also has the
GPIO_OUTPUT_INIT_HIGH flag, set it to output high; otherwise, set it to
output low.
This may fail if the GPIO is simply configured as GPIO_OUTPUT without
specifying either INIT_HIGH or INIT_LOW, which means it is intended to
preserve the previous status. But in this case, we are currently setting it
to output low.
Fix this by explicitly initializing the GPIO to high or low according to
the configuration:
If the GPIO is configured as GPIO_OUTPUT and also with the
GPIO_OUTPUT_INIT_HIGH flag, set it to output high.
If the GPIO is configured as GPIO_OUTPUT and also with the
GPIO_OUTPUT_INIT_LOW flag, set it to output low.
If the GPIO is configured as GPIO_OUTPUT only,
do not set the output value.
Signed-off-by: Benson Huang <benson7633769@gmail.com>
The AXP2101 chip is a multi functional power chip offering a regulator,
charge controller and a fuel gauge (battery percentage and voltage).
Hereby, the fuel gauge provides much more reliable data compared to using
an ADC.
We implement minimal support for this chip (connected state, voltage and
gauge) and bind it to the fuel gauge subsystem.
Closes: #89158
Signed-off-by: Felix Moessbauer <felix.moessbauer@gmail.com>
led_context.h contains a single struct with max and min period, current
drivers that use it have hardcoded values and they set it at init.
This data is not used anywhere, and it makes very little sense to use
some SRAM for it.
Hardcode the limit for each driver and drop the struct and file.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add threshold attribute handling to set low and high
temperature at runtime and validation for runtime changes
Signed-off-by: Tobias Meyer <tobiuhg@gmail.com>
Sort alphabetically the header added in the previous few commits
as well as the original implementation.
Signed-off-by: Josuah Demangeon <me@josuah.net>
When the FPS value stored in data->frame_rate is zero, a division by zero
occurs. Fix it by clamping the frame rate between min and max values.
Signed-off-by: Josuah Demangeon <me@josuah.net>
The documentation of k_work_cancel_delayable_sync() states that the input
k_work_sync parameter needs to be valid until the function call returns,
so there is no need to preserve the state across successive calls.
Now that there is a single work-related field in the struct, rename it
to simply "work".
Signed-off-by: Josuah Demangeon <me@josuah.net>
This complements the 32-bit RGB (XRGB32) test pattern with an equivalent
24-bit RGB (RGB24) implementation.
Signed-off-by: Josuah Demangeon <me@josuah.net>
This refactors the pattern generator functions to also offer bayer formats
as input. 4 variant of bayer formats are proposed. The pixel packing is
also now split from the color selection: only a single RGB and single YUV
array used by all the pattern generators.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Add a check for the array size to avoid overwriting unrelated memory when
the buffer is too small for the full format. It first check if there is
enough buffer for one line, and fill it programmatically. Then, it will
try to duplicate that line over the entire buffer, in the limit of the
room available.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Return an error on fie.index >= 1 as there is only one framerate entry
per pixelformat, this prevents an endless loop.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Help with maintainance and possibly readability by using a more regular
layout for various tables of numbers. This adds a comma on the last
element to help with formatters like clang-format.
Signed-off-by: Josuah Demangeon <me@josuah.net>
In order to help debugging through GDB and other error messages and debug
tools, convert the __xxx prefix to video_sw_generator_xxx full prefix.
To help keep function names short, use slightly shorter sufixes.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Add the definitions of the PLL2 and PLL3 outputs for the stm32H7RS mcus
and the HCLK 5 which is clock source for the XSPI instance.
and other HCLKn for other peripherals.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The stm32H7RS serie has no DelayBlock Bypass control in its DCR1 register.
For other stm32 devices with DelayBlock bypass control, set the value
directly in the structure.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the support of the stm32h7rs serie to the
drivers/flash/flash_stm32_xspi driver.
The stm32h7rs has no delayblock
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the clock domain configuration for the xspi nodes
Where the DTS defines main clock and peripheral clock sel
plus a XSPIM clock
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When a LD sends an ic-msg to SCFW - it happens that sometimes that SCFW
does not handle the request.
For the moment the problem is solved by sending a second vevif event
shortly after the initial request.
Signed-off-by: Maciej Meijer <maciej.meijer@nordicsemi.no>
Add support for cc23x0 RTC driver in counter.
RTC is always ON after device boot. Timer is restared only
on POR, and is active during STANDBY and ACTIVE power states.
Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
Select the PLL clock source for PLL2 or PLL3 as well as main PLL
This choice is useful if main PLL is off (sysclock from fixed clock)
but PLL2 or PLL3 are on for other peripherals
All PLL must have the same source else this is an error.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add new device tree property specifying the number of
dummy-cycles required when reading the JEDEC ID.
The Arduino Opta has an at25sf128a with JEDEC ID 1F 89 01.
The PR below adds support for this, but the id read is 01 1F 89.
Changing DummyCycles to 16 causes the correct value to be read.
https://github.com/zephyrproject-rtos/zephyr/pull/89539
Signed-off-by: Mark O'Donovan <shiftee@posteo.net>
Add the nxp,rtxxx-dsp-ctrl driver.
Responsibility of this driver is to load code executed by Xtensa-family
cores on NXP i.MX RTxxx microcontrollers and to control their run.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
Create Kconfig configuration for nrfx_clock driver and use that to export
configuration to nrfx via nrfx_kconfig. So far nrfx_kconfig was using
Kconfig flags from clock_control which created a fixed connection between
nrfx_clock and clock_control and nrfx_clock could not be used without
clock_control in Zephyr.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Some SoCs generates unexpected RXTO event during restart.
Restart happens when ENDRX_STARTRX short is enabled and STOPRX
is triggered (via short or by CPU). STOPRX starts closing
procedure and ENDRX event is generated at some point which
triggers STARTRX and closing procedure is interrupted. RXTO
should not be triggered in that case. Due to internal timings
some SoC on fast UARTE instance will trigger RXTO followed
by RXSTARTED. This RXTO event shall be cleared as receiver is
actually restarted and not stopped.
Affected SoC is not in tree so Kconfig is added which enables
the workaround.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add initial support for TI MSPM0 UART with basic poll-in and poll-out
functionality.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Signed-off-by: Jackson Farley <j-farley@ti.com>
Add a GPIO driver support for TI MSPM0 SoC family.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Signed-off-by: Jackson Farley <j-farley@ti.com>
Added a pinctrl driver support for MSPM0 Family.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Signed-off-by: Jackson Farley <j-farley@ti.com>
ENET timestamp IRQ still needed to be enabled from IP.
This is a fix-up for below commit:
faa55bd44b drivers: ptp_clock_nxp_enet: avoid configuring
IRQ handlers again
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
The ENET timestamp events may be via ENET IRQ rather than ENET
timer IRQ handled in ptp driver for some platforms like i.MX RT1060.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Add a library for the Camera Common Interface, part of the MIPI CSI
protocol standard defining methods to configure a camera device over I2C,
such as which size for the register address/data.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Introduce the video shell and implement some video shell commands.
Make use of the various querying API to implement tab-completion, and
validiate the data, as well as convert string names into integers.
Commands provided: frmival, format, ctrl, start, stop, capture
Signed-off-by: Josuah Demangeon <me@josuah.net>
Do not set_format() when doing get_format(). This design seems initially
to simplify the sample (just get_format() and everything works out of the
box) but it makes thing incomprehensive and error prone.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Do not set_format() when doing get_format(). This design seems initially
to simplify the sample (just get_format() and everything works out of the
box) but it makes thing incomprehensive and error prone.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
The format pitch (bytesperline) field is typically set by the bridge
drivers, i.e. DMA, ISP drivers who actually handle the memory as they
know exactly the memory layout constraints.
Application just set the pixel format and resolution and must always
read back this field to see what the driver actually sets (to allocate
buffers for example).
Also, drop format pitch setting in sensor drivers as this is not needed.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>