The current prescaler calculation incorrectly fails to configure the
desired frequency when it is possible to match it exactly. Fix this.
Without this patch, if the user requests frequency N Hz, and there is
a SPI prescaler that can match this frequency exactly, the actual
frequency chosen by spi_stm32_configure() will be N/2 Hz.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
If CS (Chip Select, known also as Slave Select...) is managed externaly
of the stm32_ll SPI controller, just config NSS line management
accordingly.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Removing internal boolean in order to use the proper error code hold in
spi_context which was relevantly added in commit 6c717095b8.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Previous approach allowed only single word update for single
function call. Updating context in ISR was inefficient for
controllers supporting automatic multiple data packets transaction.
Signed-off-by: Michał Kruszewski <michal.kruszewski@nordicsemi.no>
Added function helps setting the longest possible rx and tx buffers for
single SPI transfer. Each of these buffers is a continuous memory
region. It is useful for example when peripheral supports easyDMA.
Signed-off-by: Michał Kruszewski <michal.kruszewski@nordicsemi.no>
The output state of the CS GPIO must be configured with a pull-up while
setting the GPIO as output. Otherwise the GPIO will be forced low,
before being set high by the call to spim_nrf52_csn(). This results in a
glitch of 1us on the CS line, which may confuse some ICs in the worst
case.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
When setting the SPIM speed to 8 MHz, the driver will return an error
due to a missing "break" causing the execution flow to reach the default
case.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
The transmit and receive procedure used in the STM32 SPI driver is not
correct.
On STM32F4, this is causing OVR errors (per the logged error mask) and
transmission of undesired 0x00 bytes (verified with a logic analyzer).
The root cause is that the receive register is not read (via DR, when
RXNE is set) each time the transmit register is written (also via DR,
when TXE is set). This clearly causes OVR errors when there is no
FIFO, as the receive register needs to be read each time a frame is
transceived, or the IP block has no way of knowing that the
overwritten data were not important.
Adapt the I/O procedure so that every DR write is matched by a DR
read, blocking until the relevant flags are set if necessary.
This behavior is suboptimal for targets such as STM32L4, where there
is a SPI FIFO. However, SPI I/O is broken on those targets, and this
patch fixes them as well. Further optimizations for targets with FIFOs
is left to future work.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
With some other issues in polled mode now resolved, add error handling
and report a valid error status when releasing the context.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Byte access is always naturally aligned; there's no need to use
UNALIGNED_GET or UNALIGNED_PUT. Those would only be needed when
supporting 16-bit data frames.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The current implementation unconditionally enables the SPI (sets
SPI_CR1_SPE) in transceive(), but disables it only in master mode.
The peripheral should only be enabled while the user has specifically
requested I/O. Fix this by always disabling the peripheral when I/O is
complete.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Polled and IRQ-driven SPI I/O share code for cleanup and completion,
which can now be factored into its own routine.
This keeps a single point of truth for common paths, which will allow
a subsequent bug fix to happen in one place, and help avoid future
regressions.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
In polled mode, the STM32 SPI driver is signaling completion when
there are no waiters:
- the only spi_context_wait_for_completion() caller in this driver is
in the IRQ-driven portion of transceive() itself, which isn't
compiled in polled mode.
- the "asynchronous completion + polled I/O" combination is not
supported by the driver, so there are no other threads polling on
this I/O we need to signal completion to.
What should be happening instead of signaling completion is releasing
the chip select pin, which polled I/O currently doesn't do.
Fix these issues.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The LL_SPI_NSS_* macros used in spi_stm32_configure() when
hardware-based NSS management is requested are incorrect; fix them.
In master mode, this seems like a copy/paste error. The slave mode
case is likely due to following incorrect documentation in the ST LL
headers.
Note that in my testing on STM32F4, NSS appears to be open drain when
managed by hardware, making that configuration harder to test (and
probably less useful).
Details for the curious:
The ST LL headers (for example stm32f4xx_ll_spi.h) claim
LL_SPI_NSS_HARD_INPUT is to be used only in master mode, and
LL_SPI_NSS_HARD_OUTPUT is to be used in slave mode.
The opposite is true: when NSS is not handled by software, the SPI
peripheral is responsible for driving NSS as an output, and the
slave peripheral is responsible for reading it as an input.
This is an error in the LL header files; the reference manuals and
the other LL code make this clear.
- The ST reference manuals specify that LL_SPI_HARD_OUTPUT (which
corresponds to SSM unset, SSOE set) is a master-only
configuration. For example, STM32 RM0368 says:
"NSS output enabled (SSM = 0, SSOE = 1)
This configuration is used only when the device operates in
master mode."
- LL_SPI_HARD_INPUT (SSM unset, SSOE unset) is either a master or
a slave configuration; in the slave case (which is what we're
interested in here), it corresponds to the "usual" NSS
input. RM0368, again:
"NSS output disabled (SSM = 0, SSOE = 0)
This configuration allows multimaster capability for devices
operating in master mode. For devices set as slave, the NSS
pin acts as a classical NSS input: the slave is selected when
NSS is low and deselected when NSS high."
The LL_SPI_StructInit() implementations similarly combine
LL_SPI_MODE_SLAVE with LL_SPI_NSS_HARD_INPUT.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Now that struct spi_context supports passing errors from
interrupt-driven I/O handlers to waiting threads, we can enable error
interrupts and propagate errors to spi_transceive() callers.
To make it easier for users to debug SPI-related issues, log any error
bits set in SR when failures occur.
A subsequent patch will add error checking to polled mode as well, but
other cleanups and fixes will go in first to make this easier.
Note that this breaks the spi_loopback test on some targets, but it's
not a regression, as it wasn't working properly anyway. Subsequent
patches the bugs that this error checking has exposed.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The SPI API allows waiters to block until SPI I/O has completed. The
asynchronous subset of the API allows waiters to learn a status value
for the result of the I/O. However, the synchronous API does not allow
this.
Due to this limitation, synchronous API users cannot learn when
interrupt-driven I/O fails, which precludes proper error handling.
Resolve this limitation by adding a sync_status field to struct
spi_context, and using it to return operation results to the waiter.
Since there is only one status field, reduce the maximum number of
supported waiters from UINT_MAX to 1. This is not a problem for
current users, which all wait with the entire context locked.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Void pointer arithmetic is undefined behavior (UB).
It's OK for struct spi_buf to contain a void *, because those values
are only ever stored, read, and compared. However, pointer arithmetic
is done on the tx_buf and rx_buf fields in struct spi_context, so
those need to be u8_t * to avoid UB.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Fix clock polarity and phase configuration by using correct
bit shifted configuration values.
Also, fixed SPIM1 config struct initialization that referred
to wrong SPI0 value.
Signed-off-by: Nathan Loretan <nathan.loretan@nordicsemi.no>
Change the common "init with 0" + "give" idiom to "init with 1". This
won't change the behavior or performance, but should decrease the size
ever so slightly.
This change has been performed mechanically with the following
Coccinelle script:
@@
expression SEM;
expression LIMIT;
expression TIMEOUT;
@@
- k_sem_init(SEM, 0, LIMIT);
- k_sem_give(SEM);
+ k_sem_init(SEM, 1, LIMIT);
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
It is incorrect to call spi_context_release() on a
spi_dw_data object's ctx field before data->ctx->config is first
set in spi_dw_configure(). This is because spi_context_release()
reads ctx->config->operation. In particular, during spi_dw_init(),
calling spi_context_release() reads the uninitialized memory in
spi->ctx->config->operation.
Call spi_context_unlock_unconditionally() instead to properly increase
the semaphore count.
Without this patch, the first call to spi_transceive() can block
forever depending on the value of the uninitialized memory holding
spi->ctx->config->operation.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
It is incorrect to call spi_context_release() on an STM32
spi_stm32_data object's ctx field before data->ctx->config is first
set in spi_stm32_configure(). This is because spi_context_release()
reads ctx->config->operation. In particular, during spi_stm32_init(),
calling spi_context_release() reads the uninitialized memory in
data->ctx->config->operation.
Call spi_context_unlock_unconditionally() instead to properly increase
the semaphore count.
Without this patch, the first call to spi_transceive() can block
forever depending on the value of the uninitialized memory holding
data->ctx->config->operation.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Upcoming memory protection features will be placing some additional
constraints on kernel objects:
- They need to reside in memory owned by the kernel and not the
application
- Certain kernel object validation schemes will require some run-time
initialization of all kernel objects before they can be used.
Per Ben these initializer macros were never intended to be public. It is
not forbidden to use them, but doing so requires care: the memory being
initialized must reside in kernel space, and extra runtime
initialization steps may need to be peformed before they are fully
usable as kernel objects. In particular, kernel subsystems or drivers
whose objects are already in kernel memory may still need to use these
macros if they define kernel objects as members of a larger data
structure.
It is intended that application developers instead use the
K_<object>_DEFINE macros, which will automatically put the object in the
right memory and add them to a section which can be iterated over at
boot to complete initiailization.
There was no K_WORK_DEFINE() macro for creating struct k_work objects,
this is now added.
k_poll_event and k_poll_signal are intended to be instatiated from
application memory and have not been changed.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Add a SPI master and slave driver for the L4, F4 and F3 STM32
SoCs families.
Change-Id: I1faf5c97f992c91eba852fd126e7d3b83158993d
Origin: Original
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Tested-by: Lee Jones <lee.jones@linaro.org>
as config SPI_CS_GPIO was selecting GPIO instead it
should just depend on it. This patch is a fix for
ZEP-2071 jira.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Instead of NULL terminated buffer arrays, let's add a parameter for each
that tells the number of spi_buf in it.
It adds a little bit more complexity in driver's side (spi_context.h)
but not on user side (bufer one has to take care of providing the NULL
pointer at the end of the array, now he requires to give the count).
This will saves a significant amount of bytes in more complex setup than
the current dumb spi driver sample.
Fix and Use size_t everywhere (spi_context.h was using u32_t).
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Documentation doesn't specify if this function may return 0, so add an
inexpensive check to account for this.
Jira: ZEP-2135
CID: 160954
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
If CS is controlled over GPIO, it will be possible to keep the slave up
and running (though no transaction will be going on) using this
configuration bit.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
SPI_HOLD_ON_CS can be used to ask the SPI device to keep CS on, after
the transaction. And this undefinitely, until another config is used.
This will inhibate the gpio cs delay, if any. This might be useful when
doing consecutive calls on one slave without releasing the CS.
SPI_LOCK_ON is to be used with caution as it will keep the SPI device
locked for the current config being used after each transaction. This
can be necessary if one needs to do consecutive calls on a slave without
any olher caller to interfere.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
All is done through the generic spi_context driver's API as it will be
generic to all SPI drivers.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Adding a struct k_poll_signal parameter to driver's API unique
exposed function.
If not NULL, the call will be handled as asynchronous and will
return right after the transaction has started, on the contrary
of current logic where is waits for the transaction to finish
(= synchronous).
In order to save stack, let's move the device pointer to struct
spi_config. So the call is still at a maximum of 4 parameters.
Adapting spi_dw.c and spi driver sample to the change so it still
builts.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
All SPI drivers have this same way to handle synchronous call, thus
let's generalize it in struct spi_context, with a relevant API and apply
the change into SPI DW driver.
spi_context API will prove to be useful once asynchronous call will be
handled as well, through the same completion functions used now only for
synchronous call. It will be transparent for the driver.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Let's improve common SPI driver context by adding a lock and generic
function to get/release it.
It's statically initialized to save a bit of ROM.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Introducing as well a generic driver helper for CS gpio control and
buffer management.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Such API improves many aspects of the former API by reducing the number
of function, allowing more buffer flexibility etc... This leads in
better memory usag and performance as well.
However, as this will take sometime to get into use, the former API is
still present and is the one enabled by default.
Jira: ZEP-852
Jira: ZEP-287
Jira: ZEP-1725
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
One liners if/for/while statements still need {}
(and line break are cheap for clarity).
Aligning parameters properly.
Also, removing __func__ usage from SYS_LOG_* as these macros already put
it internally.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
fix misspelling in Kconfig files that would show up in configuration
documentation and screens.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Fix misspellings in Kconfig help text and made spelling of
RX and TX consistent (from reviewer comments)
Change-Id: Ie9d4c3863cd210e7a17b50a85a7e64156b6bf3d7
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Even one liner if () should have get { ... }
Change-Id: I7f9d8d74398286e97549bed050e29d4d175e1b02
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I08f51e2bfd475f6245771c1bd2df7ffc744c48c4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
* SPIMx support for nrf52 spi interface with easy dma
Change-Id: I3221b14867924b91a9d809faf689090574f5dc1c
Signed-off-by: Roger Lendenmann <roger.lendenmann@intel.com>
In prep for supporting the older KL2x SoCs that use a different SPI
block, rename the current SPI driver to DSPI to match what the MCUX HAL
defines it as.
Change-Id: I9097580df5fca649ab6fd9a38212fced0b1ea6ed
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit removes unnecessary CONFIG_SYS_POWER_DEEP_SLEEP protection
in shim drivers as QMSI 1.4 has introduced empty context save/restore
functions that can be called in Quark D2000, therefore keeping common
code at the shim driver level for Quark SE and D2000.
Change-Id: Ia2a466327f999668c6511c0193014e9151bff6ae
Signed-off-by: Juan Solano <juanx.solano.menacho@intel.com>
