spi: stm32: Enable sending 16bits at a time in 8bit mode if possible
If possible, allow sending 16bits at once instead of 8bits. I found large delays (up to 3us) between sending bytes due to Zephyr SPI overhead, so allowing 16bits at a time if possible helps save that time. Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
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8f0788ee69
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2ce8fa1e42
1 changed files with 89 additions and 25 deletions
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@ -73,11 +73,40 @@ static int spi_stm32_get_err(SPI_TypeDef *spi)
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return 0;
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}
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/* Shift a SPI frame as master. */
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static void spi_stm32_shift_m(SPI_TypeDef *spi, struct spi_stm32_data *data)
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static inline void spi_stm32_shift_m8(SPI_TypeDef *spi,
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struct spi_stm32_data *data)
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{
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struct spi_context *ctx = &(data->ctx);
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u16_t tx_frame = SPI_STM32_TX_NOP;
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u16_t rx_frame;
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bool xfer_16;
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if (spi_context_tx_buf_on(ctx) && spi_context_rx_buf_on(ctx)) {
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xfer_16 = (MIN(ctx->tx_len, ctx->rx_len) > 1) ? true : false;
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} else if (spi_context_tx_buf_on(ctx)) {
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xfer_16 = (ctx->tx_len > 1) ? true : false;
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} else if (spi_context_rx_buf_on(ctx)) {
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xfer_16 = (ctx->rx_len > 1) ? true : false;
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} else {
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/* Should never get here, but place case for it anyways */
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return;
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}
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#if defined(CONFIG_SPI_STM32_HAS_FIFO)
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if (xfer_16) {
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ll_func_set_fifo_threshold_16bit(spi);
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} else {
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ll_func_set_fifo_threshold_8bit(spi);
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}
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#endif
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if (xfer_16 && spi_context_tx_buf_on(ctx)) {
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tx_frame = UNALIGNED_GET((u16_t *)(ctx->tx_buf));
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spi_context_update_tx(ctx, 1, 2);
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} else if (spi_context_tx_buf_on(ctx)) {
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tx_frame = UNALIGNED_GET((u8_t *)(ctx->tx_buf));
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spi_context_update_tx(ctx, 1, 1);
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}
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while (!ll_func_tx_is_empty(spi)) {
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/* NOP */
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@ -95,37 +124,68 @@ static void spi_stm32_shift_m(SPI_TypeDef *spi, struct spi_stm32_data *data)
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}
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#endif
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if (SPI_WORD_SIZE_GET(data->ctx.config->operation) == 8) {
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if (spi_context_tx_on(&data->ctx)) {
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tx_frame = UNALIGNED_GET((u8_t *)(data->ctx.tx_buf));
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}
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LL_SPI_TransmitData8(spi, tx_frame);
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/* The update is ignored if TX is off. */
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spi_context_update_tx(&data->ctx, 1, 1);
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} else {
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if (spi_context_tx_on(&data->ctx)) {
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tx_frame = UNALIGNED_GET((u16_t *)(data->ctx.tx_buf));
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}
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if (xfer_16) {
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LL_SPI_TransmitData16(spi, tx_frame);
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/* The update is ignored if TX is off. */
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spi_context_update_tx(&data->ctx, 2, 1);
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} else {
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LL_SPI_TransmitData8(spi, tx_frame);
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}
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while (!ll_func_rx_is_not_empty(spi)) {
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/* NOP */
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}
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if (SPI_WORD_SIZE_GET(data->ctx.config->operation) == 8) {
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rx_frame = LL_SPI_ReceiveData8(spi);
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if (spi_context_rx_buf_on(&data->ctx)) {
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UNALIGNED_PUT(rx_frame, (u8_t *)data->ctx.rx_buf);
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}
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spi_context_update_rx(&data->ctx, 1, 1);
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} else {
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if (xfer_16) {
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rx_frame = LL_SPI_ReceiveData16(spi);
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if (spi_context_rx_buf_on(&data->ctx)) {
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UNALIGNED_PUT(rx_frame, (u16_t *)data->ctx.rx_buf);
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if (spi_context_rx_buf_on(ctx)) {
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UNALIGNED_PUT(rx_frame, (u16_t *)ctx->rx_buf);
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spi_context_update_rx(ctx, 1, 2);
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}
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} else {
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rx_frame = LL_SPI_ReceiveData8(spi);
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if (spi_context_rx_buf_on(ctx)) {
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UNALIGNED_PUT(rx_frame, (u8_t *)ctx->rx_buf);
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spi_context_update_rx(ctx, 1, 1);
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}
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}
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}
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static inline void spi_stm32_shift_m16(SPI_TypeDef *spi,
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struct spi_stm32_data *data)
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{
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u16_t tx_frame = SPI_STM32_TX_NOP;
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u16_t rx_frame;
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if (spi_context_tx_buf_on(&data->ctx)) {
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tx_frame = UNALIGNED_GET((u16_t *)(data->ctx.tx_buf));
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spi_context_update_tx(&data->ctx, 2, 1);
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}
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while (!ll_func_tx_is_empty(spi)) {
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/* NOP */
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}
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#ifdef CONFIG_SOC_SERIES_STM32MP1X
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/* With the STM32MP1, if the device is the SPI master, we need to enable
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* the start of the transfer with LL_SPI_StartMasterTransfer(spi)
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*/
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if (LL_SPI_GetMode(spi) == LL_SPI_MODE_MASTER) {
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LL_SPI_StartMasterTransfer(spi);
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while (!LL_SPI_IsActiveMasterTransfer(spi)) {
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/* NOP */
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}
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}
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#endif
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LL_SPI_TransmitData16(spi, tx_frame);
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while (!ll_func_rx_is_not_empty(spi)) {
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/* NOP */
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}
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rx_frame = LL_SPI_ReceiveData16(spi);
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if (spi_context_rx_buf_on(&data->ctx)) {
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UNALIGNED_PUT(rx_frame, (u16_t *)data->ctx.rx_buf);
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spi_context_update_rx(&data->ctx, 2, 1);
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}
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}
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@ -176,7 +236,11 @@ static int spi_stm32_shift_frames(SPI_TypeDef *spi, struct spi_stm32_data *data)
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u16_t operation = data->ctx.config->operation;
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if (SPI_OP_MODE_GET(operation) == SPI_OP_MODE_MASTER) {
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spi_stm32_shift_m(spi, data);
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if (SPI_WORD_SIZE_GET(data->ctx.config->operation) == 8) {
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spi_stm32_shift_m8(spi, data);
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} else {
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spi_stm32_shift_m16(spi, data);
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}
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} else {
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spi_stm32_shift_s(spi, data);
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}
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