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drivers: nrfx: Update implementations after switching to nrfx 2.0.0

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Update calls to nrfx HAL functions to reflect API changes introduced in
nrfx 2.0.0. All these functions are now called with the first parameter
pointing to the structure of registers of the relevant peripheral.
Also a few functions got renamed:
- nrf_gpiote_int_is_enabled to nrf_gpiote_int_enable_check
- nrf_gpiote_event_is_set to nrf_gpiote_event_check
- nrf_rng_event_get to nrf_rng_event_check
- nrf_rng_int_get to nrf_rng_int_enable_check
- nrf_rtc_event_pending to nrf_rtc_event_check
- nrf_rtc_int_is_enabled to nrf_rtc_int_enable_check
- nrf_timer_cc_read to nrf_timer_cc_get
- nrf_timer_cc_write to nrf_timer_cc_set

Default configuration values were removed from nrfx_config files,
so the drivers pwm_nrfx and spi_nrfx_spis no longer can use those.

Function nrfx_pwm_init() now takes one more parameter - context pointer
that is passed to the event handler, not used in the pwm_nrfx driver.

HALs for UART and UARTE now allow configuration of the parity type
and the number of stop bits, for SoCs that provide the corresponding
registers.

Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
Andrzej Głąbek 2019-11-07 22:07:47 +01:00 • committed by Carles Cufí
commit b1d5eed262
13 changed files with 187 additions and 165 deletions
Download patch file Download diff file Expand all files Collapse all files

68
drivers/adc/adc_nrfx_saadc.c
View file

@ -15,7 +15,7 @@ LOG_MODULE_REGISTER(adc_nrfx_saadc);
struct driver_data {
struct adc_context ctx;
u8_t positive_inputs[NRF_SAADC_CHANNEL_COUNT];
u8_t positive_inputs[SAADC_CH_NUM];
};
static struct driver_data m_data = {
@ -36,7 +36,7 @@ static int adc_nrfx_channel_setup(struct device *dev,
};
u8_t channel_id = channel_cfg->channel_id;
if (channel_id >= NRF_SAADC_CHANNEL_COUNT) {
if (channel_id >= SAADC_CH_NUM) {
return -EINVAL;
}
@ -114,10 +114,12 @@ static int adc_nrfx_channel_setup(struct device *dev,
* NRF_SAADC_INPUT_DISABLED) until it is selected to be included
* in a sampling sequence.
*/
config.pin_p = NRF_SAADC_INPUT_DISABLED;
config.pin_n = channel_cfg->input_negative;
nrf_saadc_channel_init(channel_id, &config);
nrf_saadc_channel_init(NRF_SAADC, channel_id, &config);
nrf_saadc_channel_input_set(NRF_SAADC,
channel_id,
NRF_SAADC_INPUT_DISABLED,
channel_cfg->input_negative);
/* Store the positive input selection in a dedicated array,
* to get it later when the channel is selected for a sampling
@ -130,13 +132,14 @@ static int adc_nrfx_channel_setup(struct device *dev,
static void adc_context_start_sampling(struct adc_context *ctx)
{
nrf_saadc_enable();
nrf_saadc_enable(NRF_SAADC);
if (ctx->sequence.calibrate) {
nrf_saadc_task_trigger(NRF_SAADC_TASK_CALIBRATEOFFSET);
nrf_saadc_task_trigger(NRF_SAADC,
NRF_SAADC_TASK_CALIBRATEOFFSET);
} else {
nrf_saadc_task_trigger(NRF_SAADC_TASK_START);
nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE);
nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_START);
nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_SAMPLE);
}
}
@ -147,8 +150,9 @@ static void adc_context_update_buffer_pointer(struct adc_context *ctx,
if (!repeat) {
nrf_saadc_buffer_pointer_set(
nrf_saadc_buffer_pointer_get() +
nrf_saadc_amount_get());
NRF_SAADC,
nrf_saadc_buffer_pointer_get(NRF_SAADC) +
nrf_saadc_amount_get(NRF_SAADC));
}
}
@ -175,7 +179,7 @@ static int set_resolution(const struct adc_sequence *sequence)
return -EINVAL;
}
nrf_saadc_resolution_set(nrf_resolution);
nrf_saadc_resolution_set(NRF_SAADC, nrf_resolution);
return 0;
}
@ -224,7 +228,7 @@ static int set_oversampling(const struct adc_sequence *sequence,
return -EINVAL;
}
nrf_saadc_oversample_set(nrf_oversampling);
nrf_saadc_oversample_set(NRF_SAADC, nrf_oversampling);
return 0;
}
@ -258,7 +262,7 @@ static int start_read(struct device *dev, const struct adc_sequence *sequence)
* a non-existing one is selected).
*/
if (!selected_channels ||
(selected_channels & ~BIT_MASK(NRF_SAADC_CHANNEL_COUNT))) {
(selected_channels & ~BIT_MASK(SAADC_CH_NUM))) {
LOG_ERR("Invalid selection of channels");
return -EINVAL;
}
@ -288,20 +292,22 @@ static int start_read(struct device *dev, const struct adc_sequence *sequence)
* is not used (hence, the multiple channel sampling is
* possible), the burst mode have to be deactivated.
*/
nrf_saadc_burst_set(channel_id,
nrf_saadc_burst_set(NRF_SAADC, channel_id,
(sequence->oversampling != 0U ?
NRF_SAADC_BURST_ENABLED :
NRF_SAADC_BURST_DISABLED));
nrf_saadc_channel_pos_input_set(
NRF_SAADC,
channel_id,
m_data.positive_inputs[channel_id]);
++active_channels;
} else {
nrf_saadc_channel_pos_input_set(
NRF_SAADC,
channel_id,
NRF_SAADC_INPUT_DISABLED);
}
} while (++channel_id < NRF_SAADC_CHANNEL_COUNT);
} while (++channel_id < SAADC_CH_NUM);
error = set_resolution(sequence);
if (error) {
@ -318,7 +324,8 @@ static int start_read(struct device *dev, const struct adc_sequence *sequence)
return error;
}
nrf_saadc_buffer_init((nrf_saadc_value_t *)sequence->buffer,
nrf_saadc_buffer_init(NRF_SAADC,
(nrf_saadc_value_t *)sequence->buffer,
active_channels);
adc_context_start_read(&m_data.ctx, sequence);
@ -360,24 +367,25 @@ static void saadc_irq_handler(void *param)
{
struct device *dev = (struct device *)param;
if (nrf_saadc_event_check(NRF_SAADC_EVENT_END)) {
nrf_saadc_event_clear(NRF_SAADC_EVENT_END);
if (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_END)) {
nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_END);
nrf_saadc_task_trigger(NRF_SAADC_TASK_STOP);
nrf_saadc_disable();
nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_STOP);
nrf_saadc_disable(NRF_SAADC);
adc_context_on_sampling_done(&m_data.ctx, dev);
} else if (nrf_saadc_event_check(NRF_SAADC_EVENT_CALIBRATEDONE)) {
nrf_saadc_event_clear(NRF_SAADC_EVENT_CALIBRATEDONE);
} else if (nrf_saadc_event_check(NRF_SAADC,
NRF_SAADC_EVENT_CALIBRATEDONE)) {
nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_CALIBRATEDONE);
/*
* The workaround for Nordic nRF52832 anomalies 86 and
* 178 is an explicit STOP after CALIBRATEOFFSET
* before issuing START.
*/
nrf_saadc_task_trigger(NRF_SAADC_TASK_STOP);
nrf_saadc_task_trigger(NRF_SAADC_TASK_START);
nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE);
nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_STOP);
nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_START);
nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_SAMPLE);
}
}
@ -385,10 +393,10 @@ DEVICE_DECLARE(adc_0);
static int init_saadc(struct device *dev)
{
nrf_saadc_event_clear(NRF_SAADC_EVENT_END);
nrf_saadc_event_clear(NRF_SAADC_EVENT_CALIBRATEDONE);
nrf_saadc_int_enable(NRF_SAADC_INT_END
| NRF_SAADC_INT_CALIBRATEDONE);
nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_END);
nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_CALIBRATEDONE);
nrf_saadc_int_enable(NRF_SAADC,
NRF_SAADC_INT_END | NRF_SAADC_INT_CALIBRATEDONE);
NRFX_IRQ_ENABLE(DT_NORDIC_NRF_SAADC_ADC_0_IRQ_0);
IRQ_CONNECT(DT_NORDIC_NRF_SAADC_ADC_0_IRQ_0,

31
drivers/clock_control/nrf_clock_calibration.c
View file

@ -57,11 +57,11 @@ static K_WORK_DEFINE(temp_measure_work, measure_temperature);
static bool clock_event_check_and_clean(u32_t evt, u32_t intmask)
{
bool ret = nrf_clock_event_check(evt) &&
nrf_clock_int_enable_check(intmask);
bool ret = nrf_clock_event_check(NRF_CLOCK, evt) &&
nrf_clock_int_enable_check(NRF_CLOCK, intmask);
if (ret) {
nrf_clock_event_clear(evt);
nrf_clock_event_clear(NRF_CLOCK, evt);
}
return ret;
@ -101,8 +101,8 @@ bool z_nrf_clock_calibration_stop(struct device *dev)
key = irq_lock();
nrf_clock_task_trigger(NRF_CLOCK_TASK_CTSTOP);
nrf_clock_event_clear(NRF_CLOCK_EVENT_CTTO);
nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_CTSTOP);
nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO);
/* If calibration is active then pend until completed.
* Currently (and most likely in the future), LFCLK is never stopped so
@ -127,13 +127,13 @@ void z_nrf_clock_calibration_init(struct device *dev)
/* Anomaly 36: After watchdog timeout reset, CPU lockup reset, soft
* reset, or pin reset EVENTS_DONE and EVENTS_CTTO are not reset.
*/
nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE);
nrf_clock_event_clear(NRF_CLOCK_EVENT_CTTO);
nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_DONE);
nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO);
nrf_clock_int_enable(NRF_CLOCK_INT_DONE_MASK |
NRF_CLOCK_INT_CTTO_MASK |
NRF_CLOCK_INT_CTSTOPPED_MASK);
nrf_clock_cal_timer_timeout_set(
nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_DONE_MASK |
NRF_CLOCK_INT_CTTO_MASK |
NRF_CLOCK_INT_CTSTOPPED_MASK);
nrf_clock_cal_timer_timeout_set(NRF_CLOCK,
CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_PERIOD);
if (CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_MAX_SKIP != 0) {
@ -155,7 +155,7 @@ static void start_calibration(void)
*(volatile uint32_t *)0x40000C34 = 0x00000002;
}
nrf_clock_task_trigger(NRF_CLOCK_TASK_CAL);
nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_CAL);
calib_skip_cnt = CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_MAX_SKIP;
}
@ -164,7 +164,7 @@ static void to_idle(void)
{
cal_state = CAL_IDLE;
clock_control_off(hfclk_dev, 0);
nrf_clock_task_trigger(NRF_CLOCK_TASK_CTSTART);
nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_CTSTART);
}
/* Convert sensor value to 0.25'C units. */
@ -255,7 +255,7 @@ static void on_cal_done(void)
if (cal_state == CAL_ACTIVE_OFF) {
clock_control_off(hfclk_dev, 0);
nrf_clock_task_trigger(NRF_CLOCK_TASK_LFCLKSTOP);
nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_LFCLKSTOP);
cal_state = CAL_OFF;
} else {
to_idle();
@ -307,7 +307,8 @@ void z_nrf_clock_calibration_isr(void)
* started because it was not yet stopped.
*/
LOG_INF("restarting");
nrf_clock_task_trigger(NRF_CLOCK_TASK_CTSTART);
nrf_clock_task_trigger(NRF_CLOCK,
NRF_CLOCK_TASK_CTSTART);
}
}
}

37
drivers/clock_control/nrf_power_clock.c
View file

@ -50,11 +50,11 @@ struct nrf_clock_control_config {
*/
static bool clock_event_check_and_clean(nrf_clock_event_t evt, u32_t intmask)
{
bool ret = nrf_clock_event_check(evt) &&
nrf_clock_int_enable_check(intmask);
bool ret = nrf_clock_event_check(NRF_CLOCK, evt) &&
nrf_clock_int_enable_check(NRF_CLOCK, intmask);
if (ret) {
nrf_clock_event_clear(evt);
nrf_clock_event_clear(NRF_CLOCK, evt);
}
return ret;
@ -96,14 +96,14 @@ static int clock_stop(struct device *dev, clock_control_subsys_t sub_system)
config->stop_handler(dev) : true;
if (do_stop) {
nrf_clock_task_trigger(config->stop_tsk);
nrf_clock_task_trigger(NRF_CLOCK, config->stop_tsk);
/* It may happen that clock is being stopped when it
* has just been started and start is not yet handled
* (due to irq_lock). In that case after stopping the
* clock, started event is cleared to prevent false
* interrupt being triggered.
*/
nrf_clock_event_clear(config->started_evt);
nrf_clock_event_clear(NRF_CLOCK, config->started_evt);
}
data->started = false;
@ -160,7 +160,8 @@ static int clock_async_start(struct device *dev,
do_start = (config->start_handler) ?
config->start_handler(dev) : true;
if (do_start) {
nrf_clock_task_trigger(config->start_tsk);
nrf_clock_task_trigger(NRF_CLOCK,
config->start_tsk);
DBG(dev, "Triggered start task");
} else if (data) {
data->cb(dev, data->user_data);
@ -205,19 +206,19 @@ static int hfclk_init(struct device *dev)
irq_enable(DT_INST_0_NORDIC_NRF_CLOCK_IRQ_0);
nrf_clock_lf_src_set(CLOCK_CONTROL_NRF_K32SRC);
nrf_clock_lf_src_set(NRF_CLOCK, CLOCK_CONTROL_NRF_K32SRC);
if (IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION)) {
z_nrf_clock_calibration_init(dev);
}
nrf_clock_int_enable((
NRF_CLOCK_INT_HF_STARTED_MASK |
NRF_CLOCK_INT_LF_STARTED_MASK |
COND_CODE_1(CONFIG_USB_NRF52840,
nrf_clock_int_enable(NRF_CLOCK,
(NRF_CLOCK_INT_HF_STARTED_MASK |
NRF_CLOCK_INT_LF_STARTED_MASK |
COND_CODE_1(CONFIG_USB_NRF52840,
(NRF_POWER_INT_USBDETECTED_MASK |
NRF_POWER_INT_USBREMOVED_MASK |
NRF_POWER_INT_USBPWRRDY_MASK),
NRF_POWER_INT_USBREMOVED_MASK |
NRF_POWER_INT_USBPWRRDY_MASK),
(0))));
sys_slist_init(&((struct nrf_clock_control *)dev->driver_data)->list);
@ -291,11 +292,11 @@ static void clkstarted_handle(struct device *dev)
#if defined(CONFIG_USB_NRF52840)
static bool power_event_check_and_clean(nrf_power_event_t evt, u32_t intmask)
{
bool ret = nrf_power_event_check(evt) &&
nrf_power_int_enable_check(intmask);
bool ret = nrf_power_event_check(NRF_POWER, evt) &&
nrf_power_int_enable_check(NRF_POWER, intmask);
if (ret) {
nrf_power_event_clear(evt);
nrf_power_event_clear(NRF_POWER, evt);
}
return ret;
@ -369,10 +370,10 @@ void nrf5_power_usb_power_int_enable(bool enable)
NRF_POWER_INT_USBPWRRDY_MASK;
if (enable) {
nrf_power_int_enable(mask);
nrf_power_int_enable(NRF_POWER, mask);
irq_enable(DT_INST_0_NORDIC_NRF_CLOCK_IRQ_0);
} else {
nrf_power_int_disable(mask);
nrf_power_int_disable(NRF_POWER, mask);
}
#endif
}

8
drivers/counter/counter_nrfx_rtc.c
View file

@ -225,7 +225,7 @@ static int set_cc(struct device *dev, u8_t chan, u32_t val, u32_t flags)
bool absolute = flags & COUNTER_ALARM_CFG_ABSOLUTE;
bool irq_on_late;
__ASSERT(nrf_rtc_int_is_enabled(rtc, int_mask) == 0,
__ASSERT(nrf_rtc_int_enable_check(rtc, int_mask) == 0,
"Expected that CC interrupt is disabled.");
evt = RTC_CHANNEL_EVENT_ADDR(chan);
@ -575,7 +575,7 @@ static void top_irq_handle(struct device *dev)
NRF_RTC_EVENT_OVERFLOW :
RTC_CHANNEL_EVENT_ADDR(counter_get_num_of_channels(dev));
if (nrf_rtc_event_pending(rtc, top_evt)) {
if (nrf_rtc_event_check(rtc, top_evt)) {
nrf_rtc_event_clear(rtc, top_evt);
/* Perform manual clear if custom top value is used and PPI
@ -596,8 +596,8 @@ static void alarm_irq_handle(struct device *dev, u32_t chan)
NRF_RTC_Type *rtc = get_nrfx_config(dev)->rtc;
nrf_rtc_event_t evt = RTC_CHANNEL_EVENT_ADDR(chan);
u32_t int_mask = RTC_CHANNEL_INT_MASK(chan);
bool hw_irq_pending = nrf_rtc_event_pending(rtc, evt) &&
nrf_rtc_int_is_enabled(rtc, int_mask);
bool hw_irq_pending = nrf_rtc_event_check(rtc, evt) &&
nrf_rtc_int_enable_check(rtc, int_mask);
bool sw_irq_pending = get_dev_data(dev)->ipend_adj & BIT(chan);
if (hw_irq_pending || sw_irq_pending) {

16
drivers/counter/counter_nrfx_timer.c
View file

@ -80,7 +80,7 @@ static int stop(struct device *dev)
static u32_t get_top_value(struct device *dev)
{
return nrf_timer_cc_read(get_nrfx_config(dev)->timer, TOP_CH);
return nrf_timer_cc_get(get_nrfx_config(dev)->timer, TOP_CH);
}
static u32_t get_max_relative_alarm(struct device *dev)
@ -95,7 +95,7 @@ static u32_t read(struct device *dev)
nrf_timer_task_trigger(timer,
nrf_timer_capture_task_get(COUNTER_READ_CC));
return nrf_timer_cc_read(timer, COUNTER_READ_CC);
return nrf_timer_cc_get(timer, COUNTER_READ_CC);
}
/* Return true if value equals 2^n - 1 */
@ -157,8 +157,8 @@ static int set_cc(struct device *dev, u8_t id, u32_t val, u32_t flags)
* future).
*/
now = read(dev);
prev_val = nrf_timer_cc_read(reg, chan);
nrf_timer_cc_write(reg, chan, now);
prev_val = nrf_timer_cc_get(reg, chan);
nrf_timer_cc_set(reg, chan, now);
nrf_timer_event_clear(reg, evt);
if (absolute) {
@ -180,7 +180,7 @@ static int set_cc(struct device *dev, u8_t id, u32_t val, u32_t flags)
val = ticks_add(now, val, top);
}
nrf_timer_cc_write(reg, chan, val);
nrf_timer_cc_set(reg, chan, val);
/* decrement value to detect also case when val == read(dev). Otherwise,
* condition would need to include comparing diff against 0.
@ -254,7 +254,7 @@ static int set_top_value(struct device *dev, const struct counter_top_cfg *cfg)
}
nrf_timer_int_disable(timer, COUNTER_TOP_INT_MASK);
nrf_timer_cc_write(timer, TOP_CH, cfg->ticks);
nrf_timer_cc_set(timer, TOP_CH, cfg->ticks);
nrf_timer_shorts_enable(timer, COUNTER_OVERFLOW_SHORT);
data->top_cb = cfg->callback;
@ -290,7 +290,7 @@ static int init_timer(struct device *dev,
nrf_timer_mode_set(reg, config->mode);
nrf_timer_frequency_set(reg, config->freq);
nrf_timer_cc_write(reg, TOP_CH, counter_get_max_top_value(dev));
nrf_timer_cc_set(reg, TOP_CH, counter_get_max_top_value(dev));
NRFX_IRQ_ENABLE(NRFX_IRQ_NUMBER_GET(reg));
@ -346,7 +346,7 @@ static void alarm_irq_handle(struct device *dev, u32_t id)
chdata->callback = NULL;
if (cb) {
u32_t cc_val = nrf_timer_cc_read(reg, cc);
u32_t cc_val = nrf_timer_cc_get(reg, cc);
cb(dev, id, cc_val, chdata->user_data);
}

27
drivers/entropy/entropy_nrf5.c
View file

@ -102,9 +102,9 @@ static int random_byte_get(void)
key = irq_lock();
if (nrf_rng_event_get(NRF_RNG_EVENT_VALRDY)) {
retval = nrf_rng_random_value_get();
nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY);
if (nrf_rng_event_check(NRF_RNG, NRF_RNG_EVENT_VALRDY)) {
retval = nrf_rng_random_value_get(NRF_RNG);
nrf_rng_event_clear(NRF_RNG, NRF_RNG_EVENT_VALRDY);
}
irq_unlock(key);
@ -166,7 +166,7 @@ static u16_t rng_pool_get(struct rng_pool *rngp, u8_t *buf, u16_t len)
len = dst - buf;
available = available - len;
if (available <= rngp->threshold) {
nrf_rng_task_trigger(NRF_RNG_TASK_START);
nrf_rng_task_trigger(NRF_RNG, NRF_RNG_TASK_START);
}
return len;
@ -215,7 +215,7 @@ static void isr(void *arg)
ret = rng_pool_put((struct rng_pool *)(entropy_nrf5_data.thr),
byte);
if (ret < 0) {
nrf_rng_task_trigger(NRF_RNG_TASK_STOP);
nrf_rng_task_trigger(NRF_RNG, NRF_RNG_TASK_STOP);
}
k_sem_give(&entropy_nrf5_data.sem_sync);
@ -270,13 +270,14 @@ static int entropy_nrf5_get_entropy_isr(struct device *dev, u8_t *buf, u16_t len
irq_disable(RNG_IRQn);
irq_unlock(key);
nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY);
nrf_rng_task_trigger(NRF_RNG_TASK_START);
nrf_rng_event_clear(NRF_RNG, NRF_RNG_EVENT_VALRDY);
nrf_rng_task_trigger(NRF_RNG, NRF_RNG_TASK_START);
do {
int byte;
while (!nrf_rng_event_get(NRF_RNG_EVENT_VALRDY)) {
while (!nrf_rng_event_check(NRF_RNG,
NRF_RNG_EVENT_VALRDY)) {
__WFE();
__SEV();
__WFE();
@ -332,14 +333,14 @@ static int entropy_nrf5_init(struct device *device)
/* Enable or disable bias correction */
if (IS_ENABLED(CONFIG_ENTROPY_NRF5_BIAS_CORRECTION)) {
nrf_rng_error_correction_enable();
nrf_rng_error_correction_enable(NRF_RNG);
} else {
nrf_rng_error_correction_disable();
nrf_rng_error_correction_disable(NRF_RNG);
}
nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY);
nrf_rng_int_enable(NRF_RNG_INT_VALRDY_MASK);
nrf_rng_task_trigger(NRF_RNG_TASK_START);
nrf_rng_event_clear(NRF_RNG, NRF_RNG_EVENT_VALRDY);
nrf_rng_int_enable(NRF_RNG, NRF_RNG_INT_VALRDY_MASK);
nrf_rng_task_trigger(NRF_RNG, NRF_RNG_TASK_START);
IRQ_CONNECT(RNG_IRQn, CONFIG_ENTROPY_NRF5_PRI, isr,
&entropy_nrf5_data, 0);

39
drivers/gpio/gpio_nrfx.c
View file

@ -47,14 +47,15 @@ static inline const struct gpio_nrfx_cfg *get_port_cfg(struct device *port)
static int gpiote_channel_alloc(u32_t abs_pin, nrf_gpiote_polarity_t polarity)
{
for (u8_t channel = 0; channel < GPIOTE_CH_NUM; ++channel) {
if (!nrf_gpiote_te_is_enabled(channel)) {
nrf_gpiote_events_t evt =
if (!nrf_gpiote_te_is_enabled(NRF_GPIOTE, channel)) {
nrf_gpiote_event_t evt =
offsetof(NRF_GPIOTE_Type, EVENTS_IN[channel]);
nrf_gpiote_event_configure(channel, abs_pin, polarity);
nrf_gpiote_event_clear(evt);
nrf_gpiote_event_enable(channel);
nrf_gpiote_int_enable(BIT(channel));
nrf_gpiote_event_configure(NRF_GPIOTE, channel, abs_pin,
polarity);
nrf_gpiote_event_clear(NRF_GPIOTE, evt);
nrf_gpiote_event_enable(NRF_GPIOTE, channel);
nrf_gpiote_int_enable(NRF_GPIOTE, BIT(channel));
return 0;
}
}
@ -64,13 +65,14 @@ static int gpiote_channel_alloc(u32_t abs_pin, nrf_gpiote_polarity_t polarity)
static void gpiote_channel_free(u32_t abs_pin)
{
u32_t intenset = nrf_gpiote_int_is_enabled(NRF_GPIOTE_INT_IN_MASK);
u32_t intenset = nrf_gpiote_int_enable_check(NRF_GPIOTE,
NRF_GPIOTE_INT_IN_MASK);
for (size_t i = 0; i < GPIOTE_CH_NUM; i++) {
if ((nrf_gpiote_event_pin_get(i) == abs_pin)
if ((nrf_gpiote_event_pin_get(NRF_GPIOTE, i) == abs_pin)
&& (intenset & BIT(i))) {
nrf_gpiote_event_disable(i);
nrf_gpiote_int_disable(BIT(i));
nrf_gpiote_event_disable(NRF_GPIOTE, i);
nrf_gpiote_int_disable(NRF_GPIOTE, BIT(i));
return;
}
}
@ -431,7 +433,8 @@ DEVICE_DECLARE(gpio_nrfx_p1);
static void gpiote_event_handler(void)
{
u32_t fired_triggers[GPIO_COUNT] = {0};
bool port_event = nrf_gpiote_event_is_set(NRF_GPIOTE_EVENTS_PORT);
bool port_event = nrf_gpiote_event_check(NRF_GPIOTE,
NRF_GPIOTE_EVENT_PORT);
if (port_event) {
#ifdef CONFIG_GPIO_NRF_P0
@ -446,20 +449,20 @@ static void gpiote_event_handler(void)
/* Sense detect was disabled while checking pins so
* DETECT should be deasserted.
*/
nrf_gpiote_event_clear(NRF_GPIOTE_EVENTS_PORT);
nrf_gpiote_event_clear(NRF_GPIOTE, NRF_GPIOTE_EVENT_PORT);
}
/* Handle interrupt from GPIOTE channels. */
for (size_t i = 0; i < GPIOTE_CH_NUM; i++) {
nrf_gpiote_events_t evt =
nrf_gpiote_event_t evt =
offsetof(NRF_GPIOTE_Type, EVENTS_IN[i]);
if (nrf_gpiote_int_is_enabled(BIT(i)) &&
nrf_gpiote_event_is_set(evt)) {
u32_t abs_pin = nrf_gpiote_event_pin_get(i);
if (nrf_gpiote_int_enable_check(NRF_GPIOTE, BIT(i)) &&
nrf_gpiote_event_check(NRF_GPIOTE, evt)) {
u32_t abs_pin = nrf_gpiote_event_pin_get(NRF_GPIOTE, i);
/* Divide absolute pin number to port and pin parts. */
fired_triggers[abs_pin / 32U] |= BIT(abs_pin % 32);
nrf_gpiote_event_clear(evt);
nrf_gpiote_event_clear(NRF_GPIOTE, evt);
}
}
@ -498,7 +501,7 @@ static int gpio_nrfx_init(struct device *port)
gpiote_event_handler, NULL, 0);
irq_enable(DT_NORDIC_NRF_GPIOTE_GPIOTE_0_IRQ_0);
nrf_gpiote_int_enable(NRF_GPIOTE_INT_PORT_MASK);
nrf_gpiote_int_enable(NRF_GPIOTE, NRF_GPIOTE_INT_PORT_MASK);
}
return 0;

7
drivers/pwm/pwm_nrfx.c
View file

@ -251,6 +251,7 @@ static int pwm_nrfx_init(struct device *dev)
nrfx_err_t result = nrfx_pwm_init(&config->pwm,
&config->initial_config,
NULL,
NULL);
if (result != NRFX_SUCCESS) {
LOG_ERR("Failed to initialize device: %s", dev->config->name);
@ -375,9 +376,9 @@ static int pwm_nrfx_pm_control(struct device *dev,
PWM_NRFX_OUTPUT_PIN(idx, 2), \
PWM_NRFX_OUTPUT_PIN(idx, 3), \
}, \
.base_clock = NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK, \
.count_mode = PWM_NRFX_COUNT_MODE(idx), \
.top_value = NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE, \
.base_clock = NRF_PWM_CLK_1MHz, \
.count_mode = PWM_NRFX_COUNT_MODE(idx), \
.top_value = 1000, \
.load_mode = NRF_PWM_LOAD_INDIVIDUAL, \
.step_mode = NRF_PWM_STEP_TRIGGERED, \
}, \

43
drivers/serial/uart_nrfx_uart.c
View file

@ -264,23 +264,24 @@ static int uart_nrfx_err_check(struct device *dev)
static int uart_nrfx_configure(struct device *dev,
const struct uart_config *cfg)
{
nrf_uart_parity_t parity;
nrf_uart_hwfc_t hwfc;
#ifdef UART_CONFIG_STOP_Two
bool two_stop_bits = false;
#endif
nrf_uart_config_t uart_cfg;
#if defined(UART_CONFIG_STOP_Msk)
switch (cfg->stop_bits) {
case UART_CFG_STOP_BITS_1:
uart_cfg.stop = NRF_UART_STOP_ONE;
break;
#ifdef UART_CONFIG_STOP_Two
case UART_CFG_STOP_BITS_2:
two_stop_bits = true;
uart_cfg.stop = NRF_UART_STOP_TWO;
break;
#endif
default:
return -ENOTSUP;
}
#else
if (cfg->stop_bits != UART_CFG_STOP_BITS_1) {
return -ENOTSUP;
}
#endif
if (cfg->data_bits != UART_CFG_DATA_BITS_8) {
return -ENOTSUP;
@ -288,11 +289,11 @@ static int uart_nrfx_configure(struct device *dev,
switch (cfg->flow_ctrl) {
case UART_CFG_FLOW_CTRL_NONE:
hwfc = NRF_UART_HWFC_DISABLED;
uart_cfg.hwfc = NRF_UART_HWFC_DISABLED;
break;
case UART_CFG_FLOW_CTRL_RTS_CTS:
if (get_dev_config(dev)->rts_cts_pins_set) {
hwfc = NRF_UART_HWFC_ENABLED;
uart_cfg.hwfc = NRF_UART_HWFC_ENABLED;
} else {
return -ENOTSUP;
}
@ -301,13 +302,22 @@ static int uart_nrfx_configure(struct device *dev,
return -ENOTSUP;
}
#if defined(UART_CONFIG_PARITYTYPE_Msk)
uart_cfg.paritytype = NRF_UART_PARITYTYPE_EVEN;
#endif
switch (cfg->parity) {
case UART_CFG_PARITY_NONE:
parity = NRF_UART_PARITY_EXCLUDED;
uart_cfg.parity = NRF_UART_PARITY_EXCLUDED;
break;
case UART_CFG_PARITY_EVEN:
parity = NRF_UART_PARITY_INCLUDED;
uart_cfg.parity = NRF_UART_PARITY_INCLUDED;
break;
#if defined(UART_CONFIG_PARITYTYPE_Msk)
case UART_CFG_PARITY_ODD:
uart_cfg.parity = NRF_UART_PARITY_INCLUDED;
uart_cfg.paritytype = NRF_UART_PARITYTYPE_ODD;
break;
#endif
default:
return -ENOTSUP;
}
@ -316,15 +326,8 @@ static int uart_nrfx_configure(struct device *dev,
return -ENOTSUP;
}
nrf_uart_configure(uart0_addr, parity, hwfc);
nrf_uart_configure(uart0_addr, &uart_cfg);
#ifdef UART_CONFIG_STOP_Two
if (two_stop_bits) {
/* TODO Change this to nrfx HAL function when available */
uart0_addr->CONFIG |=
UART_CONFIG_STOP_Two << UART_CONFIG_STOP_Pos;
}
#endif
get_dev_data(dev)->uart_config = *cfg;
return 0;

43
drivers/serial/uart_nrfx_uarte.c
View file

@ -273,23 +273,24 @@ static int baudrate_set(struct device *dev, u32_t baudrate)
static int uarte_nrfx_configure(struct device *dev,
const struct uart_config *cfg)
{
nrf_uarte_parity_t parity;
nrf_uarte_hwfc_t hwfc;
#ifdef UARTE_CONFIG_STOP_Two
bool two_stop_bits = false;
#endif
nrf_uarte_config_t uarte_cfg;
#if defined(UARTE_CONFIG_STOP_Msk)
switch (cfg->stop_bits) {
case UART_CFG_STOP_BITS_1:
uarte_cfg.stop = NRF_UARTE_STOP_ONE;
break;
#ifdef UARTE_CONFIG_STOP_Two
case UART_CFG_STOP_BITS_2:
two_stop_bits = true;
uarte_cfg.stop = NRF_UARTE_STOP_TWO;
break;
#endif
default:
return -ENOTSUP;
}
#else
if (cfg->stop_bits != UART_CFG_STOP_BITS_1) {
return -ENOTSUP;
}
#endif
if (cfg->data_bits != UART_CFG_DATA_BITS_8) {
return -ENOTSUP;
@ -297,11 +298,11 @@ static int uarte_nrfx_configure(struct device *dev,
switch (cfg->flow_ctrl) {
case UART_CFG_FLOW_CTRL_NONE:
hwfc = NRF_UARTE_HWFC_DISABLED;
uarte_cfg.hwfc = NRF_UARTE_HWFC_DISABLED;
break;
case UART_CFG_FLOW_CTRL_RTS_CTS:
if (get_dev_config(dev)->rts_cts_pins_set) {
hwfc = NRF_UARTE_HWFC_ENABLED;
uarte_cfg.hwfc = NRF_UARTE_HWFC_ENABLED;
} else {
return -ENOTSUP;
}
@ -310,13 +311,22 @@ static int uarte_nrfx_configure(struct device *dev,
return -ENOTSUP;
}
#if defined(UARTE_CONFIG_PARITYTYPE_Msk)
uarte_cfg.paritytype = NRF_UARTE_PARITYTYPE_EVEN;
#endif
switch (cfg->parity) {
case UART_CFG_PARITY_NONE:
parity = NRF_UARTE_PARITY_EXCLUDED;
uarte_cfg.parity = NRF_UARTE_PARITY_EXCLUDED;
break;
case UART_CFG_PARITY_EVEN:
parity = NRF_UARTE_PARITY_INCLUDED;
uarte_cfg.parity = NRF_UARTE_PARITY_INCLUDED;
break;
#if defined(UARTE_CONFIG_PARITYTYPE_Msk)
case UART_CFG_PARITY_ODD:
uarte_cfg.parity = NRF_UARTE_PARITY_INCLUDED;
uarte_cfg.paritytype = NRF_UARTE_PARITYTYPE_ODD;
break;
#endif
default:
return -ENOTSUP;
}
@ -325,15 +335,8 @@ static int uarte_nrfx_configure(struct device *dev,
return -ENOTSUP;
}
nrf_uarte_configure(get_uarte_instance(dev), parity, hwfc);
nrf_uarte_configure(get_uarte_instance(dev), &uarte_cfg);
#ifdef UARTE_CONFIG_STOP_Two
if (two_stop_bits) {
/* TODO Change this to nrfx HAL function when available */
get_uarte_instance(dev)->CONFIG |=
UARTE_CONFIG_STOP_Two << UARTE_CONFIG_STOP_Pos;
}
#endif
get_dev_data(dev)->uart_config = *cfg;
return 0;

4
drivers/spi/spi_nrfx_spis.c
View file

@ -260,8 +260,8 @@ static int init_spis(struct device *dev, const nrfx_spis_config_t *config)
.csn_pin = DT_NORDIC_NRF_SPIS_SPI_##idx##_CSN_PIN, \
.mode = NRF_SPIS_MODE_0, \
.bit_order = NRF_SPIS_BIT_ORDER_MSB_FIRST, \
.csn_pullup = NRFX_SPIS_DEFAULT_CSN_PULLUP, \
.miso_drive = NRFX_SPIS_DEFAULT_MISO_DRIVE, \
.csn_pullup = NRF_GPIO_PIN_NOPULL, \
.miso_drive = NRF_GPIO_PIN_S0S1, \
.orc = CONFIG_SPI_##idx##_NRF_ORC, \
.def = DT_NORDIC_NRF_SPIS_SPI_##idx##_DEF_CHAR, \
}; \

14
drivers/usb/device/usb_dc_nrfx.c
View file

@ -834,11 +834,11 @@ static inline void usbd_work_process_setup(struct nrf_usbd_ep_ctx *ep_ctx)
*/
usbd_setup = (struct usb_setup_packet *)ep_ctx->buf.data;
memset(usbd_setup, 0, sizeof(struct usb_setup_packet));
usbd_setup->bmRequestType = nrf_usbd_setup_bmrequesttype_get();
usbd_setup->bRequest = nrf_usbd_setup_brequest_get();
usbd_setup->wValue = nrf_usbd_setup_wvalue_get();
usbd_setup->wIndex = nrf_usbd_setup_windex_get();
usbd_setup->wLength = nrf_usbd_setup_wlength_get();
usbd_setup->bmRequestType = nrf_usbd_setup_bmrequesttype_get(NRF_USBD);
usbd_setup->bRequest = nrf_usbd_setup_brequest_get(NRF_USBD);
usbd_setup->wValue = nrf_usbd_setup_wvalue_get(NRF_USBD);
usbd_setup->wIndex = nrf_usbd_setup_windex_get(NRF_USBD);
usbd_setup->wLength = nrf_usbd_setup_wlength_get(NRF_USBD);
ep_ctx->buf.len = sizeof(struct usb_setup_packet);
LOG_DBG("SETUP: r:%d rt:%d v:%d i:%d l:%d",
@ -1092,7 +1092,7 @@ static void usbd_event_transfer_data(nrfx_usbd_evt_t const *const p_event)
return;
}
ep_ctx->buf.len = nrf_usbd_ep_amount_get(
ep_ctx->buf.len = nrf_usbd_ep_amount_get(NRF_USBD,
p_event->data.eptransfer.ep);
LOG_DBG("read complete, ep 0x%02x, len %d",
@ -1331,7 +1331,7 @@ int usb_dc_attach(void)
usbd_work_schedule();
}
if (nrf_power_usbregstatus_vbusdet_get()) {
if (nrf_power_usbregstatus_vbusdet_get(NRF_POWER)) {
/* USBDETECTED event is be generated on cable attachment and
* when cable is already attached during reset, but not when
* the peripheral is re-enabled.

15
tests/drivers/clock_control/nrf_clock_calibration/src/test_nrf_clock_calibration.c
View file

@ -65,7 +65,7 @@ static void test_clock_calibration(void)
k_busy_wait(35000);
key = irq_lock();
while (nrf_clock_event_check(NRF_CLOCK_EVENT_CTTO) == 0) {
while (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO) == 0) {
k_busy_wait(1000);
cnt++;
if (cnt == max_cnt) {
@ -85,7 +85,7 @@ static void test_clock_calibration(void)
key = irq_lock();
cnt = 0;
while (nrf_clock_event_check(NRF_CLOCK_EVENT_DONE) == 0) {
while (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_DONE) == 0) {
k_busy_wait(1000);
cnt++;
if (cnt == max_cnt) {
@ -104,7 +104,7 @@ static void test_clock_calibration(void)
key = irq_lock();
cnt = 0;
while (nrf_clock_event_check(NRF_CLOCK_EVENT_CTTO) == 0) {
while (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO) == 0) {
k_busy_wait(1000);
cnt++;
if (cnt == max_cnt) {
@ -157,7 +157,7 @@ static void test_stopping_when_calibration(void)
k_busy_wait(35000);
key = irq_lock();
while (nrf_clock_event_check(NRF_CLOCK_EVENT_CTTO) == 0) {
while (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO) == 0) {
k_busy_wait(1000);
cnt++;
if (cnt == max_cnt) {
@ -179,9 +179,10 @@ static void test_stopping_when_calibration(void)
key = irq_lock();
clock_control_off(lfclk_dev, NULL);
zassert_true(nrf_clock_lf_is_running(), "Expected LF still on");
zassert_true(nrf_clock_lf_is_running(NRF_CLOCK),
"Expected LF still on");
while (nrf_clock_event_check(NRF_CLOCK_EVENT_DONE) == 0) {
while (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_DONE) == 0) {
k_busy_wait(1000);
cnt++;
if (cnt == max_cnt) {
@ -196,7 +197,7 @@ static void test_stopping_when_calibration(void)
/* wait some time after which clock should be off. */
k_busy_wait(300);
zassert_false(nrf_clock_lf_is_running(), "Expected LF off");
zassert_false(nrf_clock_lf_is_running(NRF_CLOCK), "Expected LF off");
clock_control_off(lfclk_dev, NULL);
}