modules: hal: nordic: Define NRFX_ASSERT as __ASSERT_NO_MSG
Update hal_nordic's revision, so that NRFX_ASSERT uses __ASSERT_NO_MSG directly, not through the assert macro that comes from from libc, as the definition of the latter might be different when some specific libc version is used, and this could generate troubles. Replace also uses of assert() with __ASSERT_NO_MSG() in nrfx driver shims that use this macro without including the corresponding header file (i.e. that implicitly rely on assert.h being included from nrfx_glue.h, which is no longer the case). Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
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0a41f06159
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8 changed files with 15 additions and 15 deletions
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@ -222,7 +222,7 @@ static int twi_nrfx_pm_control(struct device *dev, u32_t ctrl_command,
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}
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}
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} else {
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assert(ctrl_command == DEVICE_PM_GET_POWER_STATE);
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__ASSERT_NO_MSG(ctrl_command == DEVICE_PM_GET_POWER_STATE);
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*((u32_t *)context) = get_dev_data(dev)->pm_state;
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}
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@ -196,7 +196,7 @@ static int twim_nrfx_pm_control(struct device *dev, u32_t ctrl_command,
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}
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}
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} else {
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assert(ctrl_command == DEVICE_PM_GET_POWER_STATE);
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__ASSERT_NO_MSG(ctrl_command == DEVICE_PM_GET_POWER_STATE);
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*((u32_t *)context) = get_dev_data(dev)->pm_state;
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}
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@ -295,7 +295,7 @@ static int pwm_nrfx_set_power_state(u32_t new_state,
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}
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break;
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default:
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assert(false);
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__ASSERT_NO_MSG(false);
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break;
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}
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return err;
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@ -320,7 +320,7 @@ static int pwm_nrfx_pm_control(struct device *dev,
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}
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}
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} else {
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assert(ctrl_command == DEVICE_PM_GET_POWER_STATE);
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__ASSERT_NO_MSG(ctrl_command == DEVICE_PM_GET_POWER_STATE);
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*((u32_t *)context) = (*current_state);
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}
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@ -1026,9 +1026,9 @@ static void uart_nrfx_set_power_state(struct device *dev, u32_t new_state)
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nrf_uart_enable(uart0_addr);
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nrf_uart_task_trigger(uart0_addr, NRF_UART_TASK_STARTRX);
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} else {
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assert(new_state == DEVICE_PM_LOW_POWER_STATE ||
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new_state == DEVICE_PM_SUSPEND_STATE ||
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new_state == DEVICE_PM_OFF_STATE);
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__ASSERT_NO_MSG(new_state == DEVICE_PM_LOW_POWER_STATE ||
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new_state == DEVICE_PM_SUSPEND_STATE ||
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new_state == DEVICE_PM_OFF_STATE);
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nrf_uart_disable(uart0_addr);
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uart_nrfx_pins_enable(dev, false);
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}
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@ -1047,7 +1047,7 @@ static int uart_nrfx_pm_control(struct device *dev, u32_t ctrl_command,
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current_state = new_state;
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}
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} else {
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assert(ctrl_command == DEVICE_PM_GET_POWER_STATE);
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__ASSERT_NO_MSG(ctrl_command == DEVICE_PM_GET_POWER_STATE);
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*((u32_t *)context) = current_state;
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}
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@ -1285,9 +1285,9 @@ static void uarte_nrfx_set_power_state(struct device *dev, u32_t new_state)
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#endif
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nrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STARTRX);
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} else {
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assert(new_state == DEVICE_PM_LOW_POWER_STATE ||
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new_state == DEVICE_PM_SUSPEND_STATE ||
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new_state == DEVICE_PM_OFF_STATE);
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__ASSERT_NO_MSG(new_state == DEVICE_PM_LOW_POWER_STATE ||
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new_state == DEVICE_PM_SUSPEND_STATE ||
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new_state == DEVICE_PM_OFF_STATE);
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/* if pm is already not active, driver will stay indefinitely
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* in while loop waiting for event NRF_UARTE_EVENT_RXTO
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@ -1332,7 +1332,7 @@ static int uarte_nrfx_pm_control(struct device *dev, u32_t ctrl_command,
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data->pm_state = new_state;
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}
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} else {
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assert(ctrl_command == DEVICE_PM_GET_POWER_STATE);
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__ASSERT_NO_MSG(ctrl_command == DEVICE_PM_GET_POWER_STATE);
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*((u32_t *)context) = data->pm_state;
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}
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@ -311,7 +311,7 @@ static int spi_nrfx_pm_control(struct device *dev, u32_t ctrl_command,
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}
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}
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} else {
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assert(ctrl_command == DEVICE_PM_GET_POWER_STATE);
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__ASSERT_NO_MSG(ctrl_command == DEVICE_PM_GET_POWER_STATE);
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*((u32_t *)context) = get_dev_data(dev)->pm_state;
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}
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@ -350,7 +350,7 @@ static int spim_nrfx_pm_control(struct device *dev, u32_t ctrl_command,
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}
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}
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} else {
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assert(ctrl_command == DEVICE_PM_GET_POWER_STATE);
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__ASSERT_NO_MSG(ctrl_command == DEVICE_PM_GET_POWER_STATE);
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*((u32_t *)context) = get_dev_data(dev)->pm_state;
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}
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2
west.yml
2
west.yml
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@ -47,7 +47,7 @@ manifest:
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revision: a12d92816a53a521d79cefcf5c38b9dc8a4fed6e
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path: modules/hal/cypress
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- name: hal_nordic
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revision: 12d7647870888e4cb0e421f2b26884c2e76915ac
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revision: 62f9c632209ce9438edfcfdcee7a846344359647
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path: modules/hal/nordic
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- name: hal_openisa
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revision: 3b54187649cc9b37161d49918f1ad28ff7c7f830
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