spi: stm32: deduplicate code creating SPI instances
Create new instances of SPI using single STM32_SPI_INIT() macro invocation, similar as it is done for STM32 UART driver. Add also implicit '#ifdef CONFIG_SPI_id' check, so it further reduces required lines of code for each SPI instance definition. Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This commit is contained in:
Marcin Niestroj
Anas Nashif
parent
995e3676f3
commit
bbe8e63c46
1 changed files with 46 additions and 208 deletions
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@ -498,230 +498,68 @@ static int spi_stm32_init(struct device *dev)
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return 0;
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}
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#ifdef CONFIG_SPI_1
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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static void spi_stm32_irq_config_func_1(struct device *port);
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#endif
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static const struct spi_stm32_config spi_stm32_cfg_1 = {
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.spi = (SPI_TypeDef *) DT_SPI_1_BASE_ADDRESS,
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.pclken = {
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.enr = DT_SPI_1_CLOCK_BITS,
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.bus = DT_SPI_1_CLOCK_BUS
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},
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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.irq_config = spi_stm32_irq_config_func_1,
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#endif
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};
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static struct spi_stm32_data spi_stm32_dev_data_1 = {
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SPI_CONTEXT_INIT_LOCK(spi_stm32_dev_data_1, ctx),
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SPI_CONTEXT_INIT_SYNC(spi_stm32_dev_data_1, ctx),
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};
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DEVICE_AND_API_INIT(spi_stm32_1, DT_SPI_1_NAME, &spi_stm32_init,
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&spi_stm32_dev_data_1, &spi_stm32_cfg_1,
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POST_KERNEL, CONFIG_SPI_INIT_PRIORITY,
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&api_funcs);
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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static void spi_stm32_irq_config_func_1(struct device *dev)
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{
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IRQ_CONNECT(DT_SPI_1_IRQ, DT_SPI_1_IRQ_PRI,
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spi_stm32_isr, DEVICE_GET(spi_stm32_1), 0);
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irq_enable(DT_SPI_1_IRQ);
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#define STM32_SPI_IRQ_HANDLER_DECL(id) \
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static void spi_stm32_irq_config_func_##id(struct device *dev)
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#define STM32_SPI_IRQ_HANDLER_FUNC(id) \
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.irq_config = spi_stm32_irq_config_func_##id,
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#define STM32_SPI_IRQ_HANDLER(id) \
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static void spi_stm32_irq_config_func_##id(struct device *dev) \
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{ \
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IRQ_CONNECT(DT_SPI_##id##_IRQ, DT_SPI_##id##_IRQ_PRI, \
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spi_stm32_isr, DEVICE_GET(spi_stm32_##id), 0); \
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irq_enable(DT_SPI_##id##_IRQ); \
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}
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#else
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#define STM32_SPI_IRQ_HANDLER_DECL(id)
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#define STM32_SPI_IRQ_HANDLER_FUNC(id)
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#define STM32_SPI_IRQ_HANDLER(id)
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#endif
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#endif /* CONFIG_SPI_1 */
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#define STM32_SPI_INIT(id) \
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STM32_SPI_IRQ_HANDLER_DECL(id); \
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\
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static const struct spi_stm32_config spi_stm32_cfg_##id = { \
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.spi = (SPI_TypeDef *) DT_SPI_##id##_BASE_ADDRESS, \
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.pclken = { \
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.enr = DT_SPI_##id##_CLOCK_BITS, \
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.bus = DT_SPI_##id##_CLOCK_BUS \
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}, \
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STM32_SPI_IRQ_HANDLER_FUNC(id) \
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}; \
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\
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static struct spi_stm32_data spi_stm32_dev_data_##id = { \
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SPI_CONTEXT_INIT_LOCK(spi_stm32_dev_data_##id, ctx), \
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SPI_CONTEXT_INIT_SYNC(spi_stm32_dev_data_##id, ctx), \
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}; \
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\
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DEVICE_AND_API_INIT(spi_stm32_##id, DT_SPI_##id##_NAME, &spi_stm32_init, \
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&spi_stm32_dev_data_##id, &spi_stm32_cfg_##id, \
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POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \
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&api_funcs); \
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\
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STM32_SPI_IRQ_HANDLER(id)
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#ifdef CONFIG_SPI_1
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STM32_SPI_INIT(1)
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#endif
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#ifdef CONFIG_SPI_2
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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static void spi_stm32_irq_config_func_2(struct device *port);
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STM32_SPI_INIT(2)
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#endif
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static const struct spi_stm32_config spi_stm32_cfg_2 = {
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.spi = (SPI_TypeDef *) DT_SPI_2_BASE_ADDRESS,
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.pclken = {
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.enr = DT_SPI_2_CLOCK_BITS,
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.bus = DT_SPI_2_CLOCK_BUS
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},
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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.irq_config = spi_stm32_irq_config_func_2,
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#endif
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};
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static struct spi_stm32_data spi_stm32_dev_data_2 = {
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SPI_CONTEXT_INIT_LOCK(spi_stm32_dev_data_2, ctx),
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SPI_CONTEXT_INIT_SYNC(spi_stm32_dev_data_2, ctx),
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};
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DEVICE_AND_API_INIT(spi_stm32_2, DT_SPI_2_NAME, &spi_stm32_init,
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&spi_stm32_dev_data_2, &spi_stm32_cfg_2,
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POST_KERNEL, CONFIG_SPI_INIT_PRIORITY,
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&api_funcs);
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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static void spi_stm32_irq_config_func_2(struct device *dev)
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{
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IRQ_CONNECT(DT_SPI_2_IRQ, DT_SPI_2_IRQ_PRI,
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spi_stm32_isr, DEVICE_GET(spi_stm32_2), 0);
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irq_enable(DT_SPI_2_IRQ);
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}
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#endif
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#endif /* CONFIG_SPI_2 */
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#ifdef CONFIG_SPI_3
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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static void spi_stm32_irq_config_func_3(struct device *port);
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STM32_SPI_INIT(3)
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#endif
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static const struct spi_stm32_config spi_stm32_cfg_3 = {
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.spi = (SPI_TypeDef *) DT_SPI_3_BASE_ADDRESS,
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.pclken = {
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.enr = DT_SPI_3_CLOCK_BITS,
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.bus = DT_SPI_3_CLOCK_BUS
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},
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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.irq_config = spi_stm32_irq_config_func_3,
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#endif
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};
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static struct spi_stm32_data spi_stm32_dev_data_3 = {
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SPI_CONTEXT_INIT_LOCK(spi_stm32_dev_data_3, ctx),
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SPI_CONTEXT_INIT_SYNC(spi_stm32_dev_data_3, ctx),
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};
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DEVICE_AND_API_INIT(spi_stm32_3, DT_SPI_3_NAME, &spi_stm32_init,
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&spi_stm32_dev_data_3, &spi_stm32_cfg_3,
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POST_KERNEL, CONFIG_SPI_INIT_PRIORITY,
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&api_funcs);
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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static void spi_stm32_irq_config_func_3(struct device *dev)
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{
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IRQ_CONNECT(DT_SPI_3_IRQ, DT_SPI_3_IRQ_PRI,
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spi_stm32_isr, DEVICE_GET(spi_stm32_3), 0);
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irq_enable(DT_SPI_3_IRQ);
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}
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#endif
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#endif /* CONFIG_SPI_3 */
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#ifdef CONFIG_SPI_4
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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static void spi_stm32_irq_config_func_4(struct device *port);
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STM32_SPI_INIT(4)
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#endif
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static const struct spi_stm32_config spi_stm32_cfg_4 = {
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.spi = (SPI_TypeDef *) DT_SPI_4_BASE_ADDRESS,
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.pclken = {
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.enr = DT_SPI_4_CLOCK_BITS,
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.bus = DT_SPI_4_CLOCK_BUS
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},
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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.irq_config = spi_stm32_irq_config_func_4,
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#endif
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};
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static struct spi_stm32_data spi_stm32_dev_data_4 = {
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SPI_CONTEXT_INIT_LOCK(spi_stm32_dev_data_4, ctx),
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SPI_CONTEXT_INIT_SYNC(spi_stm32_dev_data_4, ctx),
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};
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DEVICE_AND_API_INIT(spi_stm32_4, DT_SPI_4_NAME, &spi_stm32_init,
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&spi_stm32_dev_data_4, &spi_stm32_cfg_4,
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POST_KERNEL, CONFIG_SPI_INIT_PRIORITY,
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&api_funcs);
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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static void spi_stm32_irq_config_func_4(struct device *dev)
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{
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IRQ_CONNECT(DT_SPI_4_IRQ, DT_SPI_4_IRQ_PRI,
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spi_stm32_isr, DEVICE_GET(spi_stm32_4), 0);
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irq_enable(DT_SPI_4_IRQ);
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}
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#endif
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#endif /* CONFIG_SPI_4 */
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#ifdef CONFIG_SPI_5
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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static void spi_stm32_irq_config_func_5(struct device *port);
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STM32_SPI_INIT(5)
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#endif
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static const struct spi_stm32_config spi_stm32_cfg_5 = {
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.spi = (SPI_TypeDef *) DT_SPI_5_BASE_ADDRESS,
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.pclken = {
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.enr = DT_SPI_5_CLOCK_BITS,
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.bus = DT_SPI_5_CLOCK_BUS
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},
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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.irq_config = spi_stm32_irq_config_func_5,
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#endif
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};
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static struct spi_stm32_data spi_stm32_dev_data_5 = {
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SPI_CONTEXT_INIT_LOCK(spi_stm32_dev_data_5, ctx),
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SPI_CONTEXT_INIT_SYNC(spi_stm32_dev_data_5, ctx),
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};
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DEVICE_AND_API_INIT(spi_stm32_5, DT_SPI_5_NAME, &spi_stm32_init,
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&spi_stm32_dev_data_5, &spi_stm32_cfg_5,
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POST_KERNEL, CONFIG_SPI_INIT_PRIORITY,
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&api_funcs);
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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static void spi_stm32_irq_config_func_5(struct device *dev)
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{
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IRQ_CONNECT(DT_SPI_5_IRQ, DT_SPI_5_IRQ_PRI,
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spi_stm32_isr, DEVICE_GET(spi_stm32_5), 0);
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irq_enable(DT_SPI_5_IRQ);
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}
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#endif
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#endif /* CONFIG_SPI_5 */
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#ifdef CONFIG_SPI_6
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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static void spi_stm32_irq_config_func_6(struct device *port);
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STM32_SPI_INIT(6)
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#endif
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static const struct spi_stm32_config spi_stm32_cfg_6 = {
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.spi = (SPI_TypeDef *) DT_SPI_6_BASE_ADDRESS,
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.pclken = {
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.enr = DT_SPI_6_CLOCK_BITS,
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.bus = DT_SPI_6_CLOCK_BUS
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},
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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.irq_config = spi_stm32_irq_config_func_6,
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#endif
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};
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static struct spi_stm32_data spi_stm32_dev_data_6 = {
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SPI_CONTEXT_INIT_LOCK(spi_stm32_dev_data_6, ctx),
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SPI_CONTEXT_INIT_SYNC(spi_stm32_dev_data_6, ctx),
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};
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DEVICE_AND_API_INIT(spi_stm32_6, DT_SPI_6_NAME, &spi_stm32_init,
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&spi_stm32_dev_data_6, &spi_stm32_cfg_6,
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POST_KERNEL, CONFIG_SPI_INIT_PRIORITY,
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&api_funcs);
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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static void spi_stm32_irq_config_func_6(struct device *dev)
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{
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IRQ_CONNECT(DT_SPI_6_IRQ, DT_SPI_6_IRQ_PRI,
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spi_stm32_isr, DEVICE_GET(spi_stm32_6), 0);
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irq_enable(DT_SPI_6_IRQ);
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}
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#endif
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#endif /* CONFIG_SPI_6 */
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