drivers: spi: Add mcux flexcomm driver
Adds a shim layer around the mcux lpc flexcomm driver to adapt it to the zephyr spi interface. It leverages heavily from the existing mcux dspi shim driver. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm
Kumar Gala
parent
d55d532ebd
commit
a63676761b
5 changed files with 350 additions and 0 deletions
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@ -6,6 +6,7 @@ zephyr_library_sources_ifdef(CONFIG_SPI_CC13XX_CC26XX spi_cc13xx_cc26xx.c)
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zephyr_library_sources_ifdef(CONFIG_SPI_DW spi_dw.c)
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zephyr_library_sources_ifdef(CONFIG_SPI_STM32 spi_ll_stm32.c)
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zephyr_library_sources_ifdef(CONFIG_SPI_MCUX_DSPI spi_mcux_dspi.c)
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zephyr_library_sources_ifdef(CONFIG_SPI_MCUX_FLEXCOMM spi_mcux_flexcomm.c)
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zephyr_library_sources_ifdef(CONFIG_SPI_MCUX_LPSPI spi_mcux_lpspi.c)
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zephyr_library_sources_ifdef(CONFIG_SPI_SAM spi_sam.c)
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zephyr_library_sources_ifdef(CONFIG_SPI_SAM0 spi_sam0.c)
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@ -222,6 +222,8 @@ source "drivers/spi/Kconfig.dw"
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source "drivers/spi/Kconfig.mcux_dspi"
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source "drivers/spi/Kconfig.mcux_flexcomm"
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source "drivers/spi/Kconfig.mcux_lpspi"
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source "drivers/spi/Kconfig.rv32m1_lpspi"
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12
drivers/spi/Kconfig.mcux_flexcomm
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12
drivers/spi/Kconfig.mcux_flexcomm
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@ -0,0 +1,12 @@
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#
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# Copyright (c) 2016, Freescale Semiconductor, Inc.
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# Copyright (c) 2017,2019, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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menuconfig SPI_MCUX_FLEXCOMM
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bool "MCUX FLEXCOMM SPI driver"
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depends on HAS_MCUX_FLEXCOMM
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help
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Enable support for mcux flexcomm spi driver.
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330
drivers/spi/spi_mcux_flexcomm.c
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330
drivers/spi/spi_mcux_flexcomm.c
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@ -0,0 +1,330 @@
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/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright (c) 2017,2019, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <errno.h>
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#include <drivers/spi.h>
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#include <fsl_spi.h>
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#include <logging/log.h>
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LOG_MODULE_REGISTER(spi_mcux_flexcomm, CONFIG_SPI_LOG_LEVEL);
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#include "spi_context.h"
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#define SPI_CHIP_SELECT_COUNT 4
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#define SPI_MAX_DATA_WIDTH 16
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struct spi_mcux_config {
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SPI_Type *base;
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void (*irq_config_func)(struct device *dev);
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};
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struct spi_mcux_data {
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spi_master_handle_t handle;
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struct spi_context ctx;
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size_t transfer_len;
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};
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static void spi_mcux_transfer_next_packet(struct device *dev)
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{
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const struct spi_mcux_config *config = dev->config->config_info;
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struct spi_mcux_data *data = dev->driver_data;
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SPI_Type *base = config->base;
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struct spi_context *ctx = &data->ctx;
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spi_transfer_t transfer;
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status_t status;
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if ((ctx->tx_len == 0) && (ctx->rx_len == 0)) {
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/* nothing left to rx or tx, we're done! */
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spi_context_cs_control(&data->ctx, false);
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spi_context_complete(&data->ctx, 0);
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return;
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}
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if (ctx->tx_len == 0) {
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/* rx only, nothing to tx */
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transfer.txData = NULL;
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transfer.rxData = ctx->rx_buf;
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transfer.dataSize = ctx->rx_len;
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transfer.configFlags = kSPI_FrameAssert;
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} else if (ctx->rx_len == 0) {
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/* tx only, nothing to rx */
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transfer.txData = (u8_t *) ctx->tx_buf;
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transfer.rxData = NULL;
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transfer.dataSize = ctx->tx_len;
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transfer.configFlags = kSPI_FrameAssert;
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} else if (ctx->tx_len == ctx->rx_len) {
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/* rx and tx are the same length */
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transfer.txData = (u8_t *) ctx->tx_buf;
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transfer.rxData = ctx->rx_buf;
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transfer.dataSize = ctx->tx_len;
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transfer.configFlags = kSPI_FrameAssert;
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} else if (ctx->tx_len > ctx->rx_len) {
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/* Break up the tx into multiple transfers so we don't have to
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* rx into a longer intermediate buffer. Leave chip select
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* active between transfers.
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*/
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transfer.txData = (u8_t *) ctx->tx_buf;
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transfer.rxData = ctx->rx_buf;
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transfer.dataSize = ctx->rx_len;
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transfer.configFlags = 0;
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} else {
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/* Break up the rx into multiple transfers so we don't have to
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* tx from a longer intermediate buffer. Leave chip select
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* active between transfers.
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*/
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transfer.txData = (u8_t *) ctx->tx_buf;
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transfer.rxData = ctx->rx_buf;
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transfer.dataSize = ctx->tx_len;
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transfer.configFlags = 0;
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}
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if (ctx->tx_count <= 1 && ctx->rx_count <= 1) {
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transfer.configFlags = kSPI_FrameAssert;
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}
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data->transfer_len = transfer.dataSize;
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status = SPI_MasterTransferNonBlocking(base, &data->handle, &transfer);
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if (status != kStatus_Success) {
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LOG_ERR("Transfer could not start");
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}
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}
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static void spi_mcux_isr(void *arg)
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{
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struct device *dev = (struct device *)arg;
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const struct spi_mcux_config *config = dev->config->config_info;
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struct spi_mcux_data *data = dev->driver_data;
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SPI_Type *base = config->base;
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SPI_MasterTransferHandleIRQ(base, &data->handle);
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}
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static void spi_mcux_master_transfer_callback(SPI_Type *base,
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spi_master_handle_t *handle, status_t status, void *userData)
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{
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struct device *dev = userData;
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struct spi_mcux_data *data = dev->driver_data;
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spi_context_update_tx(&data->ctx, 1, data->transfer_len);
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spi_context_update_rx(&data->ctx, 1, data->transfer_len);
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spi_mcux_transfer_next_packet(dev);
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}
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static int spi_mcux_configure(struct device *dev,
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const struct spi_config *spi_cfg)
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{
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const struct spi_mcux_config *config = dev->config->config_info;
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struct spi_mcux_data *data = dev->driver_data;
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SPI_Type *base = config->base;
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spi_master_config_t master_config;
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u32_t clock_freq;
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u32_t word_size;
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if (spi_context_configured(&data->ctx, spi_cfg)) {
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/* This configuration is already in use */
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return 0;
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}
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SPI_MasterGetDefaultConfig(&master_config);
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if (spi_cfg->slave > SPI_CHIP_SELECT_COUNT) {
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LOG_ERR("Slave %d is greater than %d",
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spi_cfg->slave, SPI_CHIP_SELECT_COUNT);
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return -EINVAL;
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}
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word_size = SPI_WORD_SIZE_GET(spi_cfg->operation);
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if (word_size > SPI_MAX_DATA_WIDTH) {
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LOG_ERR("Word size %d is greater than %d",
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word_size, SPI_MAX_DATA_WIDTH);
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return -EINVAL;
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}
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master_config.sselNum = spi_cfg->slave;
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master_config.sselPol = kSPI_SpolActiveAllLow;
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master_config.dataWidth = word_size - 1;
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master_config.polarity =
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(SPI_MODE_GET(spi_cfg->operation) & SPI_MODE_CPOL)
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? kSPI_ClockPolarityActiveLow
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: kSPI_ClockPolarityActiveHigh;
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master_config.phase =
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(SPI_MODE_GET(spi_cfg->operation) & SPI_MODE_CPHA)
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? kSPI_ClockPhaseSecondEdge
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: kSPI_ClockPhaseFirstEdge;
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master_config.direction =
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(spi_cfg->operation & SPI_TRANSFER_LSB)
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? kSPI_LsbFirst
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: kSPI_MsbFirst;
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master_config.baudRate_Bps = spi_cfg->frequency;
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/* The clock frequency is currently hardcoded until we can support a
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* proper clock_control driver for lpc socs. This requires a new
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* MCUXpresso SDK release for lpcxpresso55s69 to fix conflicting
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* definitions of kCLOCK_Flexcomm0 in enum clock_name_t and enum
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* clock_ip_name_t.
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*/
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clock_freq = MHZ(12);
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SPI_MasterInit(base, &master_config, clock_freq);
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SPI_MasterTransferCreateHandle(base, &data->handle,
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spi_mcux_master_transfer_callback, dev);
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data->ctx.config = spi_cfg;
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spi_context_cs_configure(&data->ctx);
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return 0;
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}
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static int transceive(struct device *dev,
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const struct spi_config *spi_cfg,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs,
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bool asynchronous,
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struct k_poll_signal *signal)
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{
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struct spi_mcux_data *data = dev->driver_data;
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int ret;
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spi_context_lock(&data->ctx, asynchronous, signal);
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ret = spi_mcux_configure(dev, spi_cfg);
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if (ret) {
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goto out;
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}
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spi_context_buffers_setup(&data->ctx, tx_bufs, rx_bufs, 1);
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spi_context_cs_control(&data->ctx, true);
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spi_mcux_transfer_next_packet(dev);
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ret = spi_context_wait_for_completion(&data->ctx);
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out:
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spi_context_release(&data->ctx, ret);
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return ret;
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}
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static int spi_mcux_transceive(struct device *dev,
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const struct spi_config *spi_cfg,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs)
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{
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return transceive(dev, spi_cfg, tx_bufs, rx_bufs, false, NULL);
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}
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#ifdef CONFIG_SPI_ASYNC
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static int spi_mcux_transceive_async(struct device *dev,
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const struct spi_config *spi_cfg,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs,
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struct k_poll_signal *async)
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{
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return transceive(dev, spi_cfg, tx_bufs, rx_bufs, true, async);
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}
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#endif /* CONFIG_SPI_ASYNC */
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static int spi_mcux_release(struct device *dev,
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const struct spi_config *spi_cfg)
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{
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struct spi_mcux_data *data = dev->driver_data;
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spi_context_unlock_unconditionally(&data->ctx);
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return 0;
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}
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static int spi_mcux_init(struct device *dev)
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{
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const struct spi_mcux_config *config = dev->config->config_info;
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struct spi_mcux_data *data = dev->driver_data;
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config->irq_config_func(dev);
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spi_context_unlock_unconditionally(&data->ctx);
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return 0;
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}
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static const struct spi_driver_api spi_mcux_driver_api = {
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.transceive = spi_mcux_transceive,
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#ifdef CONFIG_SPI_ASYNC
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.transceive_async = spi_mcux_transceive_async,
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#endif
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.release = spi_mcux_release,
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};
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#define SPI_MCUX_FLEXCOMM_DEVICE(id) \
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static void spi_mcux_config_func_##id(struct device *dev); \
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static const struct spi_mcux_config spi_mcux_config_##id = { \
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.base = \
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(SPI_Type *)DT_NXP_LPC_SPI_SPI_##id##_BASE_ADDRESS, \
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.irq_config_func = spi_mcux_config_func_##id, \
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}; \
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static struct spi_mcux_data spi_mcux_data_##id = { \
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SPI_CONTEXT_INIT_LOCK(spi_mcux_data_##id, ctx), \
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SPI_CONTEXT_INIT_SYNC(spi_mcux_data_##id, ctx), \
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}; \
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DEVICE_AND_API_INIT(spi_mcux_##id, \
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DT_NXP_LPC_SPI_SPI_##id##_LABEL, \
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&spi_mcux_init, \
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&spi_mcux_data_##id, \
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&spi_mcux_config_##id, \
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POST_KERNEL, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&spi_mcux_driver_api); \
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static void spi_mcux_config_func_##id(struct device *dev) \
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{ \
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IRQ_CONNECT(DT_NXP_LPC_SPI_SPI_##id##_IRQ_0, \
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DT_NXP_LPC_SPI_SPI_##id##_IRQ_0_PRIORITY, \
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spi_mcux_isr, DEVICE_GET(spi_mcux_##id), \
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0); \
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irq_enable(DT_NXP_LPC_SPI_SPI_##id##_IRQ_0); \
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}
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#ifdef CONFIG_SPI_0
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SPI_MCUX_FLEXCOMM_DEVICE(0)
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#endif
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#ifdef CONFIG_SPI_1
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SPI_MCUX_FLEXCOMM_DEVICE(1)
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#endif
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#ifdef CONFIG_SPI_2
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SPI_MCUX_FLEXCOMM_DEVICE(2)
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#endif
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#ifdef CONFIG_SPI_3
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SPI_MCUX_FLEXCOMM_DEVICE(3)
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#endif
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#ifdef CONFIG_SPI_4
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SPI_MCUX_FLEXCOMM_DEVICE(4)
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#endif
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#ifdef CONFIG_SPI_5
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SPI_MCUX_FLEXCOMM_DEVICE(5)
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#endif
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#ifdef CONFIG_SPI_6
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SPI_MCUX_FLEXCOMM_DEVICE(6)
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#endif
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#ifdef CONFIG_SPI_7
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SPI_MCUX_FLEXCOMM_DEVICE(7)
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#endif
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#ifdef CONFIG_SPI_8
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SPI_MCUX_FLEXCOMM_DEVICE(8)
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#endif
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@ -52,6 +52,11 @@ config HAS_MCUX_FLEXCAN
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help
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Set if the FlexCAN module is presents in the SoC.
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config HAS_MCUX_FLEXCOMM
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bool
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help
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Set if the flexcomm (FLEXCOMM) module is present in the SoC.
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config HAS_MCUX_FTFX
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bool
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help
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