This adjust the MAC CONFIGURATION register settings to 10MBit/s if needed.
The reduction is needed for 10MBit only PHYs.
Signed-off-by: Adib Taraben <theadib@gmail.com>
DSA is part of Ethernet and will utilize more Ethernet definitions for
more features support. So, it's proper to let DSA header include
Ethernet header with moving some DSA definiton from DSA header to
Ethernet header and adding DSA header including in c files using DSA
definition.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
The missing variable "config" in phy_mc_ksz8081_cfg_link() maybe
used by the macro "USING_INTERRUPT_GPIO", add the variable to avoid
compiling errors.
fixes: #95492
Signed-off-by: Tony Han <tony.han@microchip.com>
Invert the RX/TX checksum offloading to hardware behaviour so that
hardware checksum generation / evaluation for TCP/UDP packets on
either IPv4 or IPv6 is enabled by default, but can be disabled
explicitly.
This behaviour, which should optimize network performance, has
become possible with the implementation of the device driver's
get_config function, indicating to the network stack that HW
checksum offloading is not supported for, e.g., ICMP packets.
Before this implementation, enabling the HW checksum offloading
resulted in invalid packets for any unsupported protocol and
could therefore not be enabled by default.
For QEMU, which does not support the emulation of the HW
checksum offloading, automatically disable the offloading.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Enable Link-Up and Link-Down interrupts. On the interrupt handling
the monitor work is scheduled to update the link status and calling
corresponding callback routine.
Signed-off-by: Tony Han <tony.han@microchip.com>
Call ksz8081_init_int_gpios() after phy_mc_ksz8081_reset() due to
keep the configurations for interrupt.
Signed-off-by: Tony Han <tony.han@microchip.com>
Update the internal driver flags to avoid setting DO_AUTONEG_FLAG
unconsciously when setting LINK_STATE_VALID.
Signed-off-by: Tony Han <tony.han@microchip.com>
Instead of using mdio bus for getting link state, only get it in the
monitor and save it off for get rate api implementation to use
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Two issues are being simultaneously address in this commit:
Issue 1:
Current issue is that zephyr boot / init is slow because it is blocked
by the phy ksz8081 init doing autonegotiation which can take on the
order of a few seconds.
Fix by now doing autonegotiation in the monitor handler instead of in
the cfg link call. The cfg link call will now only set the ANAR register
and a software flag to let the monitor handler know whether or not to
redo the autonegotiation sequence.
Issue 2:
The ksz8081 phy currently does not link up ever on cold boots on the NXP
RT platforms due to regression on mainline. My understanding of why is
not clear, but I found that re-setting the RMII override bit by the time
the monitor work handler runs with the change to fix the first issue,
makes the link come up.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add ethernet support for RA6M4, RA6M5.
Add soc script for generating Renesas Partition Data (RFP file).
Signed-off-by: Ta Minh Nhat <nhat-minh.ta.yn@bp.renesas.com>
Singed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
remove `select MDIO` from the
ethernet drivers, that don't directly use mdio
and only use the ethernet phy api, now that the
phys select MDIO
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
devices on a bus are recomended to
select its needed drivers, apply this to the eth phys
that need gpios, so that they just work by
enableing the device in the dts.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
devices on a bus are recomended to
select its protocol, apply this to the eth phys
on the mdio bus, so that they just work by
enableing the device in the dts.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
As it's not being used anywhere in the driver. Moreover, the extra
unref would trigger a double-free assert (#94311); which is what
motivated this cleanup.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
The Locally Administered Address (LAA) bit should be set on the first
octet of the MAC address.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The MAC addressed derived from the device ID is not assigned by the
manufacturer and therefor the Locally Administered Address (LAA) bit should
be set.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
stm32 dwmac_stm32h7x driver is relying on the pinctrl framework
hence select CONFIG_PINCTRL to ensure proper build.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
- Update the variable type for R_ETHER_CallbackSet in
eth_renesas_ra.c
- Update HAL callback event handler to be compatible with FSP 6.0.0
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Ta Minh Nhat <nhat-minh.ta.yn@bp.renesas.com>
Some of the logging was not very useful and missing info, some were the
wrong level. Such as routine drops of packets, this happens sometimes
and is not ideal but not going to cause things to fall apart, so demote
those messages. RX buffer underrun for example is pretty unavoidable
with enough traffic going on the local network.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Extract the RX underrun handle code to a separate function.
Named the function like "dma_rx_resume" to make it clear what the
function is really supposed to do.
Demote the error about not being a first descriptor to a warning.
Because most likely we already got an error about something else which
caused us to drop the packet in the first place. The rest of the frames
are expected to be dropped. And make the string shorter.
Also remove the debug message because the control bits do not tell us
any more information than we don't know already. They only tell us that
we own the descriptor (known since we are processing the frame), that it
is not a first descriptor (known since that is the reason we would drop
it at this point, as indicated by the warning).
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Instead of looping through only the amount of descriptors there are,
maybe it is possible to get some more things received in one work item
than even the max number of descriptors if RX is processed fast enough,
instead of waiting for work to be scheduled again.
So change to go around the ring until we actually hit a DMA owned
descriptor.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Don't enable interrupt until after init because there can be a interrupt
mistakenly happen during the init process which can cause various
problems.
Along similar lines, avoid issue for sporadic TX interrupt with no
packet in tx done handler.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
There was a deadlock occurring, exposed by http server sample because of
situations like this caused by tx done work being blocked in deadlock:
1) The TX would be started by some thread and the driver TX sem would be
taken.
2) The http server socket would get scheduled on the system workqueue to
send something, claim the network TX interface mutex,
and be blocked taking the semaphore.
3) The RX traffic class handler would get blocked trying to claim the
network interface TX mutex, while trying to send an ACK in the TCP
callback. This means the RX packets would not be processed.
4) Lots of RX unable to allocate packets errors would happen, and all RX
would be dropped. This was the main symptom of the deadlock, which
made it look like a memory leak but actually had nothing to do with
the RX code nor any memory leak.
5) The TX DMA would finish and schedule the TX DMA done work onto the
system work queue, behind the http server socket which is blocked on
the waiting for the driver TX semaphore.
6) If the TX DMA done work would have ran, that's what gives the TX
driver semaphore. So this is the reason for the deadlock of all these
different threads and work items, the misqueue in the system
workqueue.
Fix by just calling the TX DMA done code directly from the ISR, it
should be ISR safe, and really not a lot of code to execute, just
freeing some net buffers and the packet and updating the stats.
An optimization can be made later if needed, but for now,
solving the deadlock is a more urgent priority.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This change enables GMAC_MULTIPLE_TX_PACKETS to allow multiple TX packets
to be pushed to the DMA engine, improving transmit performance. Previously,
older Zephyr versions (pre-v2.6.0) lacked thread-safe handling in net_pkt
and net_buf, making multiple TX enqueuing unreliable. Issue #32564
("net_buf reference count not protected") was fixed in v2.6.0, providing
proper thread safety. The changes have been tested on SAME54 Curiosity
Ultra with EVB-LAN8670-RMII and KSZ8061 PHY daughter card, and the
expected performance of 9.5Mbps at 10Mbps PHY link speed was observed.
Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
Configure KSZ8081 phy drivers to set strapping mode override
for RMII mode without setting reference clock to 50MHz when
"RMII 25MHz" operation is selected in device tree node.
Signed-off-by: Daniel Coffey <danielcoffey@carallon.com>
In eth_cyclonev_send(), add a guard to detect if the net_pkt has no data
buffer (i.e., pkt->buffer is NULL) before starting the TX descriptor loop.
This prevents a potential null pointer dereference on frag->data in the
first iteration of the do-while loop.
The previous in-loop check for frag was redundant and misleading: it still
allowed access to frag->data even when frag could be NULL, making the code
both unnecessary and potentially unsafe.
The new check ensures frag is valid before entering the loop, covering the
rare case where net_pkt has no associated buffer.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
If reading the status register fails, the register
`sts` will contain meaningless data.
In such cases, the function should return an error
and not attempt to clear any pending interrupts
with invalid data.
Signed-off-by: Georgij Černyšiov <geo.cgv@gmail.com>
Before this commit size of rx and tx queues was set to 1, which is out of
spec. This commit adds queue logic, ability to set their size and exposes
configuration options w.r.t rx queue interrupts
Signed-off-by: Jakub Michalski <jmichalski@antmicro.com>