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drivers: ethernet: phy: rename LINK_*_*BASE_T

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rename  LINK_*_*BASE_T to  LINK_*_*BASE

speed options for ethernet drivers shouldn't end with a _T, implying
that ethernet is only supported via a twisted pair cable.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
This commit is contained in:
Fin Maaß 2025-03-17 11:40:43 +01:00 • committed by Fabio Baltieri
commit 203ca6fcde
18 changed files with 154 additions and 152 deletions
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28
drivers/ethernet/dwc_xgmac/eth_dwc_xgmac.c
View file

@ -1029,16 +1029,16 @@ static void phy_link_state_change_callback(const struct device *phy_dev,
if (is_up) {
/* Announce link up status */
switch (state->speed) {
case LINK_HALF_1000BASE_T:
case LINK_FULL_1000BASE_T:
case LINK_HALF_1000BASE:
case LINK_FULL_1000BASE:
dev_data->link_speed = LINK_1GBIT;
break;
case LINK_HALF_100BASE_T:
case LINK_FULL_100BASE_T:
case LINK_HALF_100BASE:
case LINK_FULL_100BASE:
dev_data->link_speed = LINK_100MBIT;
break;
case LINK_HALF_10BASE_T:
case LINK_FULL_10BASE_T:
case LINK_HALF_10BASE:
case LINK_FULL_10BASE:
default:
dev_data->link_speed = LINK_10MBIT;
}
@ -1484,30 +1484,30 @@ static enum phy_link_speed get_phy_adv_speeds(bool auto_neg, bool duplex_mode,
enum phy_link_speed adv_speeds = 0u;
if (auto_neg) {
adv_speeds = LINK_HALF_1000BASE_T | LINK_HALF_1000BASE_T | LINK_HALF_100BASE_T |
LINK_FULL_100BASE_T | LINK_HALF_10BASE_T | LINK_FULL_10BASE_T;
adv_speeds = LINK_HALF_1000BASE | LINK_HALF_1000BASE | LINK_HALF_100BASE |
LINK_FULL_100BASE | LINK_HALF_10BASE | LINK_FULL_10BASE;
} else {
if (duplex_mode) {
switch (link_speed) {
case LINK_1GBIT:
adv_speeds = LINK_FULL_1000BASE_T;
adv_speeds = LINK_FULL_1000BASE;
break;
case LINK_100MBIT:
adv_speeds = LINK_FULL_100BASE_T;
adv_speeds = LINK_FULL_100BASE;
break;
default:
adv_speeds = LINK_FULL_10BASE_T;
adv_speeds = LINK_FULL_10BASE;
}
} else {
switch (link_speed) {
case LINK_1GBIT:
adv_speeds = LINK_HALF_1000BASE_T;
adv_speeds = LINK_HALF_1000BASE;
break;
case LINK_100MBIT:
adv_speeds = LINK_HALF_100BASE_T;
adv_speeds = LINK_HALF_100BASE;
break;
default:
adv_speeds = LINK_HALF_10BASE_T;
adv_speeds = LINK_HALF_10BASE;
}
}
}

6
drivers/ethernet/eth_nxp_enet.c
View file

@ -459,14 +459,14 @@ static void eth_nxp_enet_rx_thread(struct k_work *work)
static int nxp_enet_phy_configure(const struct device *phy, uint8_t phy_mode)
{
enum phy_link_speed speeds = LINK_HALF_10BASE_T | LINK_FULL_10BASE_T |
LINK_HALF_100BASE_T | LINK_FULL_100BASE_T;
enum phy_link_speed speeds = LINK_HALF_10BASE | LINK_FULL_10BASE |
LINK_HALF_100BASE | LINK_FULL_100BASE;
int ret;
struct phy_link_state state;
if (COND_CODE_1(IS_ENABLED(CONFIG_ETH_NXP_ENET_1G),
(phy_mode == NXP_ENET_RGMII_MODE), (0))) {
speeds |= (LINK_HALF_1000BASE_T | LINK_FULL_1000BASE_T);
speeds |= (LINK_HALF_1000BASE | LINK_FULL_1000BASE);
}
/* Configure the PHY */

12
drivers/ethernet/eth_nxp_s32_gmac.c
View file

@ -71,27 +71,27 @@ static inline struct net_if *get_iface(struct eth_nxp_s32_data *ctx)
static void convert_phy_to_mac_config(Gmac_Ip_ConfigType *gmac_cfg, enum phy_link_speed phy_speed)
{
switch (phy_speed) {
case LINK_HALF_10BASE_T:
case LINK_HALF_10BASE:
gmac_cfg->Speed = GMAC_SPEED_10M;
gmac_cfg->Duplex = GMAC_HALF_DUPLEX;
break;
case LINK_FULL_10BASE_T:
case LINK_FULL_10BASE:
gmac_cfg->Speed = GMAC_SPEED_10M;
gmac_cfg->Duplex = GMAC_FULL_DUPLEX;
break;
case LINK_HALF_100BASE_T:
case LINK_HALF_100BASE:
gmac_cfg->Speed = GMAC_SPEED_100M;
gmac_cfg->Duplex = GMAC_HALF_DUPLEX;
break;
case LINK_FULL_100BASE_T:
case LINK_FULL_100BASE:
gmac_cfg->Speed = GMAC_SPEED_100M;
gmac_cfg->Duplex = GMAC_FULL_DUPLEX;
break;
case LINK_HALF_1000BASE_T:
case LINK_HALF_1000BASE:
gmac_cfg->Speed = GMAC_SPEED_1G;
gmac_cfg->Duplex = GMAC_HALF_DUPLEX;
break;
case LINK_FULL_1000BASE_T:
case LINK_FULL_1000BASE:
__fallthrough;
default:
gmac_cfg->Speed = GMAC_SPEED_1G;

8
drivers/ethernet/eth_renesas_ra.c
View file

@ -187,23 +187,23 @@ static void phy_link_state_changed(const struct device *pdev, struct phy_link_st
switch (state->speed) {
/* Half duplex link */
case LINK_HALF_100BASE_T: {
case LINK_HALF_100BASE: {
ctx->ctrl.link_speed_duplex = ETHER_PHY_LINK_SPEED_100H;
break;
}
case LINK_HALF_10BASE_T: {
case LINK_HALF_10BASE: {
ctx->ctrl.link_speed_duplex = ETHER_PHY_LINK_SPEED_10H;
break;
}
/* Full duplex link */
case LINK_FULL_100BASE_T: {
case LINK_FULL_100BASE: {
ctx->ctrl.link_speed_duplex = ETHER_PHY_LINK_SPEED_100F;
break;
}
case LINK_FULL_10BASE_T: {
case LINK_FULL_10BASE: {
ctx->ctrl.link_speed_duplex = ETHER_PHY_LINK_SPEED_10F;
break;
}

6
drivers/ethernet/eth_sensry_sy1xx_mac.c
View file

@ -261,19 +261,19 @@ static void phy_link_state_changed(const struct device *pdev, struct phy_link_st
(SY1XX_MAC_CTRL_CLK_DIV_MASK << SY1XX_MAC_CTRL_CLK_DIV_OFFS));
switch (speed) {
case LINK_FULL_10BASE_T:
case LINK_FULL_10BASE:
LOG_INF("link speed FULL_10BASE_T");
/* 2.5MHz, MAC is clock source */
v |= (SY1XX_MAC_CTRL_CLK_SEL_MII_CLK << SY1XX_MAC_CTRL_CLK_SEL_OFFS) |
(SY1XX_MAC_CTRL_CLK_DIV_10 << SY1XX_MAC_CTRL_CLK_DIV_OFFS);
break;
case LINK_FULL_100BASE_T:
case LINK_FULL_100BASE:
LOG_INF("link speed FULL_100BASE_T");
/* 25MHz, MAC is clock source */
v |= (SY1XX_MAC_CTRL_CLK_SEL_MII_CLK << SY1XX_MAC_CTRL_CLK_SEL_OFFS) |
(SY1XX_MAC_CTRL_CLK_DIV_1 << SY1XX_MAC_CTRL_CLK_DIV_OFFS);
break;
case LINK_FULL_1000BASE_T:
case LINK_FULL_1000BASE:
LOG_INF("link speed FULL_1000BASE_T");
/* 125MHz, Phy is clock source */
v |= BIT(SY1XX_MAC_CTRL_GMII_OFFS) |

4
drivers/ethernet/eth_xilinx_axienet.c
View file

@ -529,8 +529,8 @@ static int xilinx_axienet_probe(const struct device *dev)
XILINX_AXIENET_RECEIVER_CONFIGURATION_FLOW_CONTROL_EN_MASK);
/* at time of writing, hardware does not support half duplex */
err = phy_configure_link(config->phy, LINK_FULL_10BASE_T | LINK_FULL_100BASE_T |
LINK_FULL_1000BASE_T);
err = phy_configure_link(config->phy, LINK_FULL_10BASE | LINK_FULL_100BASE |
LINK_FULL_1000BASE);
if (err) {
LOG_WRN("Could not configure PHY: %d", -err);
}

4
drivers/ethernet/phy/phy_adin2111.c
View file

@ -353,7 +353,7 @@ static int phy_adin2111_cfg_link(const struct device *dev,
{
ARG_UNUSED(dev);
if (!!(adv_speeds & LINK_FULL_10BASE_T)) {
if (!!(adv_speeds & LINK_FULL_10BASE)) {
return 0;
}
@ -449,7 +449,7 @@ static int phy_adin2111_init(const struct device *dev)
data->dev = dev;
data->state.is_up = false;
data->state.speed = LINK_FULL_10BASE_T;
data->state.speed = LINK_FULL_10BASE;
/*
* For adin1100 and further mii stuff,

16
drivers/ethernet/phy/phy_dm8806.c
View file

@ -498,16 +498,16 @@ static int phy_dm8806_get_link_state(const struct device *dev, struct phy_link_s
status >>= DM8806_SPEED_AND_DUPLEX_OFFSET;
switch (status & DM8806_SPEED_AND_DUPLEX_MASK) {
case DM8806_SPEED_10MBPS_HALF_DUPLEX:
state->speed = LINK_HALF_10BASE_T;
state->speed = LINK_HALF_10BASE;
break;
case DM8806_SPEED_10MBPS_FULL_DUPLEX:
state->speed = LINK_FULL_10BASE_T;
state->speed = LINK_FULL_10BASE;
break;
case DM8806_SPEED_100MBPS_HALF_DUPLEX:
state->speed = LINK_HALF_100BASE_T;
state->speed = LINK_HALF_100BASE;
break;
case DM8806_SPEED_100MBPS_FULL_DUPLEX:
state->speed = LINK_FULL_100BASE_T;
state->speed = LINK_FULL_100BASE;
break;
}
/* Extract link status from Switch Per-Port Register: Per Port Status Data
@ -531,19 +531,19 @@ static int phy_dm8806_cfg_link(const struct device *dev, enum phy_link_speed adv
req_speed = adv_speeds;
switch (req_speed) {
case LINK_HALF_10BASE_T:
case LINK_HALF_10BASE:
req_speed = DM8806_MODE_10_BASET_HALF_DUPLEX;
break;
case LINK_FULL_10BASE_T:
case LINK_FULL_10BASE:
req_speed = DM8806_MODE_10_BASET_FULL_DUPLEX;
break;
case LINK_HALF_100BASE_T:
case LINK_HALF_100BASE:
req_speed = DM8806_MODE_100_BASET_HALF_DUPLEX;
break;
case LINK_FULL_100BASE_T:
case LINK_FULL_100BASE:
req_speed = DM8806_MODE_100_BASET_FULL_DUPLEX;
break;
}

16
drivers/ethernet/phy/phy_microchip_ksz8081.c
View file

@ -186,13 +186,13 @@ static int phy_mc_ksz8081_get_link(const struct device *dev,
uint32_t mutual_capabilities = anar & anlpar;
if (mutual_capabilities & MII_ADVERTISE_100_FULL) {
state->speed = LINK_FULL_100BASE_T;
state->speed = LINK_FULL_100BASE;
} else if (mutual_capabilities & MII_ADVERTISE_100_HALF) {
state->speed = LINK_HALF_100BASE_T;
state->speed = LINK_HALF_100BASE;
} else if (mutual_capabilities & MII_ADVERTISE_10_FULL) {
state->speed = LINK_FULL_10BASE_T;
state->speed = LINK_FULL_10BASE;
} else if (mutual_capabilities & MII_ADVERTISE_10_HALF) {
state->speed = LINK_HALF_10BASE_T;
state->speed = LINK_HALF_10BASE;
} else {
ret = -EIO;
}
@ -365,22 +365,22 @@ static int phy_mc_ksz8081_cfg_link(const struct device *dev,
}
/* Setup advertising register */
if (speeds & LINK_FULL_100BASE_T) {
if (speeds & LINK_FULL_100BASE) {
anar |= MII_ADVERTISE_100_FULL;
} else {
anar &= ~MII_ADVERTISE_100_FULL;
}
if (speeds & LINK_HALF_100BASE_T) {
if (speeds & LINK_HALF_100BASE) {
anar |= MII_ADVERTISE_100_HALF;
} else {
anar &= ~MII_ADVERTISE_100_HALF;
}
if (speeds & LINK_FULL_10BASE_T) {
if (speeds & LINK_FULL_10BASE) {
anar |= MII_ADVERTISE_10_FULL;
} else {
anar &= ~MII_ADVERTISE_10_FULL;
}
if (speeds & LINK_HALF_10BASE_T) {
if (speeds & LINK_HALF_10BASE) {
anar |= MII_ADVERTISE_10_HALF;
} else {
anar &= ~MII_ADVERTISE_10_HALF;

4
drivers/ethernet/phy/phy_microchip_t1s.c
View file

@ -193,7 +193,7 @@ static int phy_mc_t1s_get_link(const struct device *dev, struct phy_link_state *
}
state->is_up = value & MII_BMSR_LINK_STATUS;
state->speed = LINK_HALF_10BASE_T;
state->speed = LINK_HALF_10BASE;
if (memcmp(&old_state, state, sizeof(struct phy_link_state)) != 0) {
if (state->is_up) {
@ -424,7 +424,7 @@ static int phy_mc_t1s_cfg_link(const struct device *dev, enum phy_link_speed spe
{
ARG_UNUSED(dev);
if (speeds & LINK_HALF_10BASE_T) {
if (speeds & LINK_HALF_10BASE) {
return 0;
}

14
drivers/ethernet/phy/phy_microchip_vsc8541.c
View file

@ -297,22 +297,22 @@ static int phy_mc_vsc8541_get_speed(const struct device *dev, struct phy_link_st
if ((status & (1 << 2)) == 0) {
/* no link */
state->speed = LINK_HALF_10BASE_T;
state->speed = LINK_HALF_10BASE;
}
if ((status & (1 << 5)) == 0) {
/* auto negotiation not yet complete */
state->speed = LINK_HALF_10BASE_T;
state->speed = LINK_HALF_10BASE;
}
if ((link1000_status & (1 << 12))) {
state->speed = LINK_FULL_1000BASE_T;
state->speed = LINK_FULL_1000BASE;
}
if (link100_status & (1 << 12)) {
state->speed = LINK_FULL_100BASE_T;
state->speed = LINK_FULL_100BASE;
}
if (link10_status & (1 << 6)) {
state->speed = LINK_FULL_10BASE_T;
state->speed = LINK_FULL_10BASE;
}
return 0;
@ -329,7 +329,7 @@ static int phy_mc_vsc8541_init(const struct device *dev)
data->cb = NULL;
data->cb_data = NULL;
data->state.is_up = false;
data->state.speed = LINK_HALF_10BASE_T;
data->state.speed = LINK_HALF_10BASE;
data->active_page = -1;
/* Reset PHY */
@ -392,7 +392,7 @@ static int phy_mc_vsc8541_get_link(const struct device *dev, struct phy_link_sta
}
} else {
state->is_up = 0;
state->speed = LINK_HALF_10BASE_T;
state->speed = LINK_HALF_10BASE;
}
return 0;

48
drivers/ethernet/phy/phy_mii.c
View file

@ -261,18 +261,18 @@ static int check_autonegotiation_completion(const struct device *dev)
if (data->gigabit_supported &&
((c1kt_reg & s1kt_reg) & MII_ADVERTISE_1000_FULL)) {
data->state.speed = LINK_FULL_1000BASE_T;
data->state.speed = LINK_FULL_1000BASE;
} else if (data->gigabit_supported &&
((c1kt_reg & s1kt_reg) & MII_ADVERTISE_1000_HALF)) {
data->state.speed = LINK_HALF_1000BASE_T;
data->state.speed = LINK_HALF_1000BASE;
} else if ((anar_reg & anlpar_reg) & MII_ADVERTISE_100_FULL) {
data->state.speed = LINK_FULL_100BASE_T;
data->state.speed = LINK_FULL_100BASE;
} else if ((anar_reg & anlpar_reg) & MII_ADVERTISE_100_HALF) {
data->state.speed = LINK_HALF_100BASE_T;
data->state.speed = LINK_HALF_100BASE;
} else if ((anar_reg & anlpar_reg) & MII_ADVERTISE_10_FULL) {
data->state.speed = LINK_FULL_10BASE_T;
data->state.speed = LINK_FULL_10BASE;
} else {
data->state.speed = LINK_HALF_10BASE_T;
data->state.speed = LINK_HALF_10BASE;
}
LOG_INF("PHY (%d) Link speed %s Mb, %s duplex",
@ -411,38 +411,38 @@ static int phy_mii_cfg_link(const struct device *dev,
}
}
if (adv_speeds & LINK_FULL_10BASE_T) {
if (adv_speeds & LINK_FULL_10BASE) {
anar_reg |= MII_ADVERTISE_10_FULL;
} else {
anar_reg &= ~MII_ADVERTISE_10_FULL;
}
if (adv_speeds & LINK_HALF_10BASE_T) {
if (adv_speeds & LINK_HALF_10BASE) {
anar_reg |= MII_ADVERTISE_10_HALF;
} else {
anar_reg &= ~MII_ADVERTISE_10_HALF;
}
if (adv_speeds & LINK_FULL_100BASE_T) {
if (adv_speeds & LINK_FULL_100BASE) {
anar_reg |= MII_ADVERTISE_100_FULL;
} else {
anar_reg &= ~MII_ADVERTISE_100_FULL;
}
if (adv_speeds & LINK_HALF_100BASE_T) {
if (adv_speeds & LINK_HALF_100BASE) {
anar_reg |= MII_ADVERTISE_100_HALF;
} else {
anar_reg &= ~MII_ADVERTISE_100_HALF;
}
if (data->gigabit_supported) {
if (adv_speeds & LINK_FULL_1000BASE_T) {
if (adv_speeds & LINK_FULL_1000BASE) {
c1kt_reg |= MII_ADVERTISE_1000_FULL;
} else {
c1kt_reg &= ~MII_ADVERTISE_1000_FULL;
}
if (adv_speeds & LINK_HALF_1000BASE_T) {
if (adv_speeds & LINK_HALF_1000BASE) {
c1kt_reg |= MII_ADVERTISE_1000_HALF;
} else {
c1kt_reg &= ~MII_ADVERTISE_1000_HALF;
@ -515,12 +515,12 @@ static int phy_mii_initialize(const struct device *dev)
*/
if (cfg->fixed) {
const static int speed_to_phy_link_speed[] = {
LINK_HALF_10BASE_T,
LINK_FULL_10BASE_T,
LINK_HALF_100BASE_T,
LINK_FULL_100BASE_T,
LINK_HALF_1000BASE_T,
LINK_FULL_1000BASE_T,
LINK_HALF_10BASE,
LINK_FULL_10BASE,
LINK_HALF_100BASE,
LINK_FULL_100BASE,
LINK_HALF_1000BASE,
LINK_FULL_1000BASE,
};
data->state.speed = speed_to_phy_link_speed[cfg->fixed_speed];
@ -548,12 +548,12 @@ static int phy_mii_initialize(const struct device *dev)
data->gigabit_supported = is_gigabit_supported(dev);
/* Advertise all speeds */
phy_mii_cfg_link(dev, LINK_HALF_10BASE_T |
LINK_FULL_10BASE_T |
LINK_HALF_100BASE_T |
LINK_FULL_100BASE_T |
LINK_HALF_1000BASE_T |
LINK_FULL_1000BASE_T);
phy_mii_cfg_link(dev, LINK_HALF_10BASE |
LINK_FULL_10BASE |
LINK_HALF_100BASE |
LINK_FULL_100BASE |
LINK_HALF_1000BASE |
LINK_FULL_1000BASE);
k_work_init_delayable(&data->monitor_work,
monitor_work_handler);

34
drivers/ethernet/phy/phy_qualcomm_ar8031.c
View file

@ -188,22 +188,22 @@ static int qc_ar8031_update_link_state(const struct device *dev)
switch (speed | duplex) {
case PHY_SPEED_10M | PHY_DUPLEX_FULL:
data->state.speed = LINK_FULL_10BASE_T;
data->state.speed = LINK_FULL_10BASE;
break;
case PHY_SPEED_10M | PHY_DUPLEX_HALF:
data->state.speed = LINK_HALF_10BASE_T;
data->state.speed = LINK_HALF_10BASE;
break;
case PHY_SPEED_100M | PHY_DUPLEX_FULL:
data->state.speed = LINK_FULL_100BASE_T;
data->state.speed = LINK_FULL_100BASE;
break;
case PHY_SPEED_100M | PHY_DUPLEX_HALF:
data->state.speed = LINK_HALF_100BASE_T;
data->state.speed = LINK_HALF_100BASE;
break;
case PHY_SPEED_1000M | PHY_DUPLEX_FULL:
data->state.speed = LINK_FULL_1000BASE_T;
data->state.speed = LINK_FULL_1000BASE;
break;
case PHY_SPEED_1000M | PHY_DUPLEX_HALF:
data->state.speed = LINK_HALF_1000BASE_T;
data->state.speed = LINK_HALF_1000BASE;
break;
}
@ -271,37 +271,37 @@ static int qc_ar8031_cfg_link(const struct device *dev, enum phy_link_speed adv_
return -EIO;
}
if (adv_speeds & LINK_FULL_10BASE_T) {
if (adv_speeds & LINK_FULL_10BASE) {
anar_reg |= MII_ADVERTISE_10_FULL;
} else {
anar_reg &= ~MII_ADVERTISE_10_FULL;
}
if (adv_speeds & LINK_HALF_10BASE_T) {
if (adv_speeds & LINK_HALF_10BASE) {
anar_reg |= MII_ADVERTISE_10_HALF;
} else {
anar_reg &= ~MII_ADVERTISE_10_HALF;
}
if (adv_speeds & LINK_FULL_100BASE_T) {
if (adv_speeds & LINK_FULL_100BASE) {
anar_reg |= MII_ADVERTISE_100_FULL;
} else {
anar_reg &= ~MII_ADVERTISE_100_FULL;
}
if (adv_speeds & LINK_HALF_100BASE_T) {
if (adv_speeds & LINK_HALF_100BASE) {
anar_reg |= MII_ADVERTISE_100_HALF;
} else {
anar_reg &= ~MII_ADVERTISE_100_HALF;
}
if (adv_speeds & LINK_FULL_1000BASE_T) {
if (adv_speeds & LINK_FULL_1000BASE) {
c1kt_reg |= MII_ADVERTISE_1000_FULL;
} else {
c1kt_reg &= ~MII_ADVERTISE_1000_FULL;
}
if (adv_speeds & LINK_HALF_1000BASE_T) {
if (adv_speeds & LINK_HALF_1000BASE) {
c1kt_reg |= MII_ADVERTISE_1000_HALF;
} else {
c1kt_reg &= ~MII_ADVERTISE_1000_HALF;
@ -463,17 +463,17 @@ static int qc_ar8031_init(const struct device *dev)
}
const static int speed_to_phy_link_speed[] = {
LINK_HALF_10BASE_T, LINK_FULL_10BASE_T, LINK_HALF_100BASE_T,
LINK_FULL_100BASE_T, LINK_HALF_1000BASE_T, LINK_FULL_1000BASE_T,
LINK_HALF_10BASE, LINK_FULL_10BASE, LINK_HALF_100BASE,
LINK_FULL_100BASE, LINK_HALF_1000BASE, LINK_FULL_1000BASE,
};
data->state.speed = speed_to_phy_link_speed[cfg->fixed_speed];
data->state.is_up = true;
} else { /* Auto negotiation */
/* Advertise all speeds */
qc_ar8031_cfg_link(dev, LINK_HALF_10BASE_T | LINK_FULL_10BASE_T |
LINK_HALF_100BASE_T | LINK_FULL_100BASE_T |
LINK_HALF_1000BASE_T | LINK_FULL_1000BASE_T);
qc_ar8031_cfg_link(dev, LINK_HALF_10BASE | LINK_FULL_10BASE |
LINK_HALF_100BASE | LINK_FULL_100BASE |
LINK_HALF_1000BASE | LINK_FULL_1000BASE);
k_work_init_delayable(&data->monitor_work, monitor_work_handler);

22
drivers/ethernet/phy/phy_realtek_rtl8211f.c
View file

@ -241,24 +241,24 @@ static int phy_rt_rtl8211f_get_link(const struct device *dev,
>> PHY_RT_RTL8211F_PHYSR_LINKSPEED_SHIFT) {
case PHY_RT_RTL8211F_PHYSR_LINKSPEED_100M:
if (duplex) {
new_state.speed = LINK_FULL_100BASE_T;
new_state.speed = LINK_FULL_100BASE;
} else {
new_state.speed = LINK_HALF_100BASE_T;
new_state.speed = LINK_HALF_100BASE;
}
break;
case PHY_RT_RTL8211F_PHYSR_LINKSPEED_1000M:
if (duplex) {
new_state.speed = LINK_FULL_1000BASE_T;
new_state.speed = LINK_FULL_1000BASE;
} else {
new_state.speed = LINK_HALF_1000BASE_T;
new_state.speed = LINK_HALF_1000BASE;
}
break;
case PHY_RT_RTL8211F_PHYSR_LINKSPEED_10M:
default:
if (duplex) {
new_state.speed = LINK_FULL_10BASE_T;
new_state.speed = LINK_FULL_10BASE;
} else {
new_state.speed = LINK_HALF_10BASE_T;
new_state.speed = LINK_HALF_10BASE;
}
break;
}
@ -318,29 +318,29 @@ static int phy_rt_rtl8211f_cfg_link(const struct device *dev,
}
/* Setup advertising register */
if (speeds & LINK_FULL_100BASE_T) {
if (speeds & LINK_FULL_100BASE) {
anar |= MII_ADVERTISE_100_FULL;
} else {
anar &= ~MII_ADVERTISE_100_FULL;
}
if (speeds & LINK_HALF_100BASE_T) {
if (speeds & LINK_HALF_100BASE) {
anar |= MII_ADVERTISE_100_HALF;
} else {
anar &= ~MII_ADVERTISE_100_HALF;
}
if (speeds & LINK_FULL_10BASE_T) {
if (speeds & LINK_FULL_10BASE) {
anar |= MII_ADVERTISE_10_FULL;
} else {
anar &= ~MII_ADVERTISE_10_FULL;
}
if (speeds & LINK_HALF_10BASE_T) {
if (speeds & LINK_HALF_10BASE) {
anar |= MII_ADVERTISE_10_HALF;
} else {
anar &= ~MII_ADVERTISE_10_HALF;
}
/* Setup 1000Base-T control register */
if (speeds & LINK_FULL_1000BASE_T) {
if (speeds & LINK_FULL_1000BASE) {
gbcr |= MII_ADVERTISE_1000_FULL;
} else {
gbcr &= ~MII_ADVERTISE_1000_FULL;

16
drivers/ethernet/phy/phy_ti_dp83825.c
View file

@ -213,13 +213,13 @@ static int phy_ti_dp83825_get_link(const struct device *dev, struct phy_link_sta
mutual_capabilities = anar & anlpar;
if (mutual_capabilities & MII_ADVERTISE_100_FULL) {
state->speed = LINK_FULL_100BASE_T;
state->speed = LINK_FULL_100BASE;
} else if (mutual_capabilities & MII_ADVERTISE_100_HALF) {
state->speed = LINK_HALF_100BASE_T;
state->speed = LINK_HALF_100BASE;
} else if (mutual_capabilities & MII_ADVERTISE_10_FULL) {
state->speed = LINK_FULL_10BASE_T;
state->speed = LINK_FULL_10BASE;
} else if (mutual_capabilities & MII_ADVERTISE_10_HALF) {
state->speed = LINK_HALF_10BASE_T;
state->speed = LINK_HALF_10BASE;
} else {
return -EIO;
}
@ -401,25 +401,25 @@ static int phy_ti_dp83825_cfg_link(const struct device *dev, enum phy_link_speed
}
/* Setup advertising register */
if (speeds & LINK_FULL_100BASE_T) {
if (speeds & LINK_FULL_100BASE) {
anar |= MII_ADVERTISE_100_FULL;
} else {
anar &= ~MII_ADVERTISE_100_FULL;
}
if (speeds & LINK_HALF_100BASE_T) {
if (speeds & LINK_HALF_100BASE) {
anar |= MII_ADVERTISE_100_HALF;
} else {
anar &= ~MII_ADVERTISE_100_HALF;
}
if (speeds & LINK_FULL_10BASE_T) {
if (speeds & LINK_FULL_10BASE) {
anar |= MII_ADVERTISE_10_FULL;
} else {
anar &= ~MII_ADVERTISE_10_FULL;
}
if (speeds & LINK_HALF_10BASE_T) {
if (speeds & LINK_HALF_10BASE) {
anar |= MII_ADVERTISE_10_HALF;
} else {
anar &= ~MII_ADVERTISE_10_HALF;

22
drivers/ethernet/phy/phy_ti_dp83867.c
View file

@ -193,24 +193,24 @@ static int phy_ti_dp83867_get_link(const struct device *dev, struct phy_link_sta
PHY_TI_DP83867_PHYSTS_LINKSPEED_SHIFT) {
case PHY_TI_DP83867_PHYSTS_LINKSPEED_1000M:
if (duplex) {
new_state.speed = LINK_FULL_1000BASE_T;
new_state.speed = LINK_FULL_1000BASE;
} else {
new_state.speed = LINK_HALF_1000BASE_T;
new_state.speed = LINK_HALF_1000BASE;
}
break;
case PHY_TI_DP83867_PHYSTS_LINKSPEED_100M:
if (duplex) {
new_state.speed = LINK_FULL_100BASE_T;
new_state.speed = LINK_FULL_100BASE;
} else {
new_state.speed = LINK_HALF_100BASE_T;
new_state.speed = LINK_HALF_100BASE;
}
break;
case PHY_TI_DP83867_PHYSTS_LINKSPEED_10M:
default:
if (duplex) {
new_state.speed = LINK_FULL_10BASE_T;
new_state.speed = LINK_FULL_10BASE;
} else {
new_state.speed = LINK_HALF_10BASE_T;
new_state.speed = LINK_HALF_10BASE;
}
break;
}
@ -345,29 +345,29 @@ static int phy_ti_dp83867_cfg_link(const struct device *dev, enum phy_link_speed
}
/* Setup advertising register */
if (speeds & LINK_FULL_100BASE_T) {
if (speeds & LINK_FULL_100BASE) {
anar |= MII_ADVERTISE_100_FULL;
} else {
anar &= ~MII_ADVERTISE_100_FULL;
}
if (speeds & LINK_HALF_100BASE_T) {
if (speeds & LINK_HALF_100BASE) {
anar |= MII_ADVERTISE_100_HALF;
} else {
anar &= ~MII_ADVERTISE_100_HALF;
}
if (speeds & LINK_FULL_10BASE_T) {
if (speeds & LINK_FULL_10BASE) {
anar |= MII_ADVERTISE_10_FULL;
} else {
anar &= ~MII_ADVERTISE_10_FULL;
}
if (speeds & LINK_HALF_10BASE_T) {
if (speeds & LINK_HALF_10BASE) {
anar |= MII_ADVERTISE_10_HALF;
} else {
anar &= ~MII_ADVERTISE_10_HALF;
}
/* Setup 1000Base-T control register */
if (speeds & LINK_FULL_1000BASE_T) {
if (speeds & LINK_FULL_1000BASE) {
cfg1 |= MII_ADVERTISE_1000_FULL;
} else {
cfg1 &= ~MII_ADVERTISE_1000_FULL;

4
drivers/ethernet/phy/phy_tja1103.c
View file

@ -342,7 +342,7 @@ static int phy_tja1103_cfg_link(const struct device *dev, enum phy_link_speed ad
{
ARG_UNUSED(dev);
if (adv_speeds & LINK_FULL_100BASE_T) {
if (adv_speeds & LINK_FULL_100BASE) {
return 0;
}
@ -360,7 +360,7 @@ static int phy_tja1103_init(const struct device *dev)
data->dev = dev;
data->cb = NULL;
data->state.is_up = false;
data->state.speed = LINK_FULL_100BASE_T;
data->state.speed = LINK_FULL_100BASE;
ret = WAIT_FOR(!phy_tja1103_id(dev, &phy_id) && phy_id == TJA1103_ID,
TJA1103_AWAIT_RETRY_COUNT * TJA1103_AWAIT_DELAY_POLL_US,

42
include/zephyr/net/phy.h
View file

@ -32,22 +32,22 @@ extern "C" {
/** @brief Ethernet link speeds. */
enum phy_link_speed {
/** 10Base-T Half-Duplex */
LINK_HALF_10BASE_T = BIT(0),
/** 10Base-T Full-Duplex */
LINK_FULL_10BASE_T = BIT(1),
/** 100Base-T Half-Duplex */
LINK_HALF_100BASE_T = BIT(2),
/** 100Base-T Full-Duplex */
LINK_FULL_100BASE_T = BIT(3),
/** 1000Base-T Half-Duplex */
LINK_HALF_1000BASE_T = BIT(4),
/** 1000Base-T Full-Duplex */
LINK_FULL_1000BASE_T = BIT(5),
/** 2.5GBase-T Full-Duplex */
LINK_FULL_2500BASE_T = BIT(6),
/** 5GBase-T Full-Duplex */
LINK_FULL_5000BASE_T = BIT(7),
/** 10Base Half-Duplex */
LINK_HALF_10BASE = BIT(0),
/** 10Base Full-Duplex */
LINK_FULL_10BASE = BIT(1),
/** 100Base Half-Duplex */
LINK_HALF_100BASE = BIT(2),
/** 100Base Full-Duplex */
LINK_FULL_100BASE = BIT(3),
/** 1000Base Half-Duplex */
LINK_HALF_1000BASE = BIT(4),
/** 1000Base Full-Duplex */
LINK_FULL_1000BASE = BIT(5),
/** 2.5GBase Full-Duplex */
LINK_FULL_2500BASE = BIT(6),
/** 5GBase Full-Duplex */
LINK_FULL_5000BASE = BIT(7),
};
/**
@ -57,7 +57,9 @@ enum phy_link_speed {
*
* @return True if link is full duplex, false if not.
*/
#define PHY_LINK_IS_FULL_DUPLEX(x) (x & (BIT(1) | BIT(3) | BIT(5) | BIT(6) | BIT(7)))
#define PHY_LINK_IS_FULL_DUPLEX(x) \
(x & (LINK_FULL_10BASE | LINK_FULL_100BASE | LINK_FULL_1000BASE | LINK_FULL_2500BASE | \
LINK_FULL_5000BASE))
/**
* @brief Check if phy link speed is 1 Gbit/sec.
@ -66,16 +68,16 @@ enum phy_link_speed {
*
* @return True if link is 1 Gbit/sec, false if not.
*/
#define PHY_LINK_IS_SPEED_1000M(x) (x & (BIT(4) | BIT(5)))
#define PHY_LINK_IS_SPEED_1000M(x) (x & (LINK_HALF_1000BASE | LINK_FULL_1000BASE))
/**
* @brief Check if phy link speed is 100 Mbit/sec.
*
* @param x Link capabilities
*
* @return True if link is 1 Mbit/sec, false if not.
* @return True if link is 100 Mbit/sec, false if not.
*/
#define PHY_LINK_IS_SPEED_100M(x) (x & (BIT(2) | BIT(3)))
#define PHY_LINK_IS_SPEED_100M(x) (x & (LINK_HALF_100BASE | LINK_FULL_100BASE))
/** @brief Link state */
struct phy_link_state {