drivers: eth/mdio: esp32: enable GPIO0 for phy clock out
Currently, GPIO16/17 are supported for Ethernet phy clock out, but some boards are also using GPIO0. This change allows GPIO0 to be configured. Signed-off-by: Cliff Brake <cbrake@bec-systems.com>
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9bd8bd6b75
commit
346bd7d16d
2 changed files with 6 additions and 4 deletions
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@ -282,9 +282,10 @@ int eth_esp32_initialize(const struct device *dev)
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if (strcmp(phy_connection_type, "rmii") == 0) {
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emac_hal_iomux_init_rmii();
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#if DT_INST_NODE_HAS_PROP(0, ref_clk_output_gpios)
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BUILD_ASSERT(DT_INST_GPIO_PIN(0, ref_clk_output_gpios) == 16 ||
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BUILD_ASSERT(DT_INST_GPIO_PIN(0, ref_clk_output_gpios) == 0 ||
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DT_INST_GPIO_PIN(0, ref_clk_output_gpios) == 16 ||
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DT_INST_GPIO_PIN(0, ref_clk_output_gpios) == 17,
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"Only GPIO16/17 are allowed as a GPIO REF_CLK source!");
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"Only GPIO0/16/17 are allowed as a GPIO REF_CLK source!");
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int ref_clk_gpio = DT_INST_GPIO_PIN(0, ref_clk_output_gpios);
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emac_hal_iomux_rmii_clk_output(ref_clk_gpio);
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emac_ll_clock_enable_rmii_output(dev_data->hal.ext_regs);
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@ -147,9 +147,10 @@ static int mdio_esp32_initialize(const struct device *dev)
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#if DT_INST_NODE_HAS_PROP(0, ref_clk_output_gpios)
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emac_hal_init(&dev_data->hal, NULL, NULL, NULL);
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emac_hal_iomux_init_rmii();
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BUILD_ASSERT(DT_INST_GPIO_PIN(0, ref_clk_output_gpios) == 16 ||
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BUILD_ASSERT(DT_INST_GPIO_PIN(0, ref_clk_output_gpios) == 0 ||
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DT_INST_GPIO_PIN(0, ref_clk_output_gpios) == 16 ||
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DT_INST_GPIO_PIN(0, ref_clk_output_gpios) == 17,
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"Only GPIO16/17 are allowed as a GPIO REF_CLK source!");
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"Only GPIO0/16/17 are allowed as a GPIO REF_CLK source!");
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int ref_clk_gpio = DT_INST_GPIO_PIN(0, ref_clk_output_gpios);
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emac_hal_iomux_rmii_clk_output(ref_clk_gpio);
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