Not all STM32 series support Zephyr MDIO API yet, while the API is enabled
by default.
To preserve compatibility, put MDIO API related code under the condition
of "st,stm32-mdio" compatible enablement.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Previously, ipv6 being disabled was a dependency of the hw acceleration
of the checksums for the nxp enet driver, because this ethernet has an
errata causing icmpv6 checksum to not be supported. Now, there is a new
config type in ethernet api for checksum types, so we can re-enable
hardware acceleration for ipv6 by implementing this type in the
get_config api in this driver.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
To remove CONFIG_PINCTRL from board side for numaker boards.
The Drivers using Pinctrl should be turning Pinctrl on
instead of the responsibility of the board.
Fixes#78619
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Improve type safety and consistency by adjusting variable and
parameter types to avoid signed/unsigned comparisons and implicit casts.
Moreover, explicit casts were applied when converting from
`size_t` to `uint16_t`.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
This change marks `w5500_api_funcs`, an instance of
the `ethernet_api`, as `const`.
By using `const`, we ensure immutability, leading to usage of only
`.rodata` and a reduction in the `.data` area.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
The newest AN1760 application note - Revision F (DS60001760G - June 2024)
is recommending to not write the node count to PLCA_CTRL1 register when
the node is not the PLCA coordinator (i.e. its ID is not zero).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This patch brings update of the procedure to initially configure the
LAN865x devices. It follows setup guidelines from newest AN1760 [*].
The values from "TABLE1" on the [*] must be written to the device in the
indicated order with recommended values.
This was not the case previously, as first values from in-flash allocated
(const) table were written and only afterwards calculated configuration
parameters (cfgparams) were updated.
With this patch the lan865x_conf[] table is allocated in-RAM, so
placeholder values can be updated and it can be written at once at the
end of configuration process.
Its single entry has been reduced from 8B to only 4B. Moreover, moving
it out of flash saves 512B of flash memory.
Note:
[*] - AN1760 Revision F (DS60001760G - June 2024)
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This reverts commit 0036b8bf21.
The reverted commit causes a compile error with the STM32F2 because
there are some variables used in the file eth_stm32_hal that are
not defined in the HAL module of the STM32F2 series,
such as 'ETH_RX_DESC_CNT' and 'HAL_ETH_MII_MODE'
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Still mark the iface as down after ethernet_init, but then actually
check the link state and initialize carrier appropriately
This fixes the case where, the phy driver doesn't give a callback after
iface init due to the link already being up, there was no change from
the phy driver perspective, so callback wouldn't happen, and therefore
the interface could remain marked as down after boot even if carrier is up.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit moves one function before another, to make the diff of the
next commit clearer of what it's doing.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Use net_if_carrier_off during iface init instead of net_eth_carrier_off,
to immediately mark net if as down
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
In some circumstances the struct eth_stm32_tx_context object that was
allocated on eth_tx's stack is still referenced after the function exits.
This usually happens when the network is disconnected, depending on the
PHY hardware.
When the network is reconnected there will eventually be a call to
HAL_ETH_ReleaseTxPacket, which calls HAL_ETH_TxFreeCallback with the
(now invalid) pointer to the tx context. When HAL_ETH_TxFreeCallback
tries to dereference that pointer we get a bus error.
Fix this by allocating struct eth_stm32_tx_context objects from a
static array, similarly to how the buffers are allocated. This ensures
that they remain valid until the HAL is finished with them.
Fixes: #79037
Signed-off-by: Kevin ORourke <kevin.orourke@ferroamp.se>
This Kconfig has wrongly been added to defconfig files. It is not the
right place for it. It has never been the right place for it. Drivers
that need it should select the symbol in their Kconfig entries. Drop
PINCTL from Kconfig.defconfig and add proper select at Kconfig.sam*.
Fixes#78619
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
I for the life of me do not know what is going on here with the RNB chip
but it seems this override must be set in order for the chip to work,
regardless of strap-in configuration, and if not set explicitly, the
value after a reset for these two bits will be seemingly random and
inconsistent. And it was working before by luck before removing a second
redundant reset in a recent commit, because apparently the register
was getting the opposite of the reset value according to the datasheet
which makes it work. The result of these bits after reset seem to vary
depending on host mcu, board, debugger, number of times reset, type of
reset, and with a pinch of random chance after keeping all variables
seemingly the same, so let's just set it to the value that works
explicitly, even if it doesn't make sense. The bit here doesn't have
clear documentation but it seems it's for using RMII regardless of the
strap in option, which is what we want to do anyways if we know the
interface type from DT, so I think it's fine, considering it is making
this driver work again.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
500 ms reset time is only for software reset and comes from IEEE spec.
Datasheet mentions for hardware reset the assertion of the signal should
only need to be 500 us, and 100 us after deassert to wait to access
programming interface.
Also remove an unused macro.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Replace "CONFIG_SOC_SERIES_STM32H7X || CONFIG_SOC_SERIES_STM32H5X"
by the compatble st_stm32h7_ethernet
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
If OA read fails, then the essential thread is terminated.
Correct the behavior so that the driver re-tries the read and
continues to work.
Refactor offload thread OA and Generic SPI parts into
if/else statement.
Add missing `is_adin2111` to OA port 2 RX status check.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
The Drivers using Pinctrl should be turning Pinctrl on
this should not be the responsibility of the board. This
commit removes CONFIG_PINCTRL from the boards side for nxp boards.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
If there is a carrier (cable plugged in) on device initialisation
there is a race between the interrupt service and the L2 init.
Signed-off-by: Dean Sellers <dsellers@evos.com.au>
Drop preprocessor redefinitions
Some preprocessor defines were redefined to follow
stm32 hal naming conventions.
People seems to be confused by redefines and use
them with alternating names.
This PR does not change code behaviour,
but shall increase it's readability.
Signed-off-by: Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
No need to reset in cfg link, this was blocking system workqueue during
phy callbacks that call cfg link, since this happens from monitor work
handler which is in the system workqueue.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Fixes a bug that results in double RX buffer read from ADIN
when generic SPI protocol is used.
Actual frame size to be read must be RX_FSIZE - HEADER.
If we read less amount of bytes, then ADIN raises an IRQ or
signals via Pn_RX_RDY that there is another frame available, as
we fail to read the whole frame.
The fix for "Still some length to go 2" is still present, we drop
the CRC32 bytes from the frame prior allocation and network
stack pass.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
The code path for error handling and timestamping in tx path
was meant to be identical in function to old eth_mcux driver,
but there is actually a discrepancy causing no error handling
for timestamped frames, fix it.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This change will allow users to configure the Ethernet RX thread
according to their specific real-time requirements.
Adding preemptive threading helps to reduce jitter and
the impact of Ethernet traffic on real-time performance.
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
ethernet driver
This driver is capable of supporting basic features
of synposys dwc-xgmac ethernet MAC IP. Basic features
includes,
1. Tx and Rx, multiple Tx and Rx DMA channels, multiple
Tx and Rx queues
2. Check Sum Offloading on Tx and Rx for IPv4, IPv6,
TCP, UDP and ICMP packets
3. 10M/100M/1G speeds, Autonegotiation, Link speed
configuration, Promiscuous mode, Full/Half
duplex configuration
4. Added source files for synopsys dwc xgmac mdio driver.
synopsys dwc xgmac mdio driver fetures includes:
It supports clause 22 of IEEE 802.3 for ethernet PHY devices
management.
5. Extended mdio shell support for dwcxgmac mdio driver.
Signed-off-by: Santosh Male <santosh.male@intel.com>
Select PINCTRL subsystem by drivers which require it.
Prevent the need from enabling this symbol at board or soc level.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Fixes: #77705
Fix wrong macro.
Tested with all the boards mentioned in that issue, build now works.
Signed-off-by: Sergio R. Caprile <scaprile@gmail.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Config to enable VLAN promiscuous and untagged.
Config to enable SI message interrupt.
Fix the build warning.
Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
When the PHY is hardware designed to communicate on address '1', the mdio
node of the device tree is labeled 'ethernet-phy@1'.
Therefore, STM32 HAL must adapt to resolve the appropriate DT node:
'ethernet_phy_1'.
Signed-off-by: Alex Fabre <alex.fabre@rtone.fr>
