Commit graph

366 commits

Author SHA1 Message Date
Anas Nashif
7e225efab7 arch: initialize irq_offload during boot, do not use SYS_INIT
Do not use SYS_INIT for initializing irq_offload when enabled, instead
using a new interface that is called during the boot process for all
architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-09-17 20:05:22 -04:00
Anas Nashif
6ec74d02b6 cache: add new interface arch_cache_init() for initializing cache
Add a new call for initializing cache on architectures that need that.
Avoid using SYS_INIT for this and instead call the hook in a fixed place
and run if implemented.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-09-17 20:05:22 -04:00
Yong Cong Sin
035c822253 arch: riscv: fill all IRQ stacks with 0xAA
Fill the memory of all CPU's IRQ stack with 0xAA on init, so
that `z_stack_space_get` can calculate the remaining space
correctly.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-09-13 09:17:34 +02:00
Yong Cong Sin
26d75ab796 arch: riscv: optionally stores a pointer to csf in struct arch_esf
The callee-saved-registers can be helpful to debug the state of
a core upon an exception, however, currently there's no way to
access that information in user-implemented
`k_sys_fatal_error_handler()`, even though the csf is already stored
in the stack.

This patch conditionally add a `csf` member in the `arch_esf` when
`CONFIG_EXTRA_EXCEPTION_INFO=y`*, which the `_isr_wrapper` would update
when a fatal error occurs before invoking `z_riscv_fatal_error_csf()`.

Functions such as `k_sys_fatal_error_handler()` would then be able
to access the callee-saved-registers at the time of exception via
`esf->csf`.

* For SoCs that select `RISCV_SOC_HAS_ISR_STACKING`, the
  `SOC_ISR_STACKING_ESF_DECLARE` has to include the `csf` member,
  otherwise the build would fail.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-09-10 11:43:40 +02:00
Yong Cong Sin
5365421fa1 arch: riscv: use string array instead of switch statement for cause
Get rid of the switch statement and use an string array
for the cause instead. This saves about ~600 bytes.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-09-09 15:23:43 +03:00
Yong Cong Sin
7844f5aebb arch: riscv: fatal: make cause_str reusable
Rename `cause_str` to `z_riscv_mcause_str` and make it non-static,
so that it can be used in user-implemented `k_sys_fatal_error_handler`.

Also, this function should return a constant string, so add `const`
to it.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-09-09 15:23:43 +03:00
Yong Cong Sin
951af0d457 arch: riscv: fatal: always print mcause & mtval
Relocate the logging of mcause & mtval from `_Fault` to
`z_riscv_fatal_error_csf` so that they are always printed
upon exception.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-09-09 15:23:43 +03:00
Anas Nashif
e260d03686 init: introduce soc and board hooks
Introduce soc and board hooks to replace arch specific code
and replace usages of SYS_INIT for platform initialization.

include/zephyr/platform/hooks.h introduces the hooks to be implemented
by boards and SoCs.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-09-09 10:07:33 +02:00
Magdalena Pastula
0237d375de arch: riscv: add an option for empty spurious interrupt handler
Add the possibility to disable fault handling in spurious
interrupt handler on RISCs and replacce it with an infinite loop.

Signed-off-by: Magdalena Pastula <magdalena.pastula@nordicsemi.no>
2024-09-02 12:35:57 -04:00
Yong Cong Sin
ed8dd0fa63 arch: riscv: stacktrace: undo the fp/sp alignment check in #76045
The change of alignment check in #76045 could be wrong and
isn't unnecessary to fix the stack traces output, undo it for
now.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-09-02 12:33:36 -04:00
Daniel Leung
0962114f2b riscv: implements arch_thread_priv_stack_space_get
This implements arch_thread_priv_stack_space_get() so this can
be used to figure out how much privileged stack space is used.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-08-28 06:50:30 -04:00
Daniel Leung
bb313355f3 riscv: initialize privileged stack during thread init
This adds the bits to initialize the privileged stack when
a thread is transitioning to user mode. This prevents
information leaking if the stack is reused, and also aids
in calculating stack space usage during system calls.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-08-28 06:50:30 -04:00
Yong Cong Sin
74f46bd421 arch: riscv: stacktrace: print additional arg when fatal error
Print `sp`/`fp` in traces.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-08-26 14:44:53 -04:00
Yong Cong Sin
074931057c subsys/debug: remove CONFIG_EXCEPTION_STACK_TRACE_SYMTAB
Having `CONFIG_EXCEPTION_STACK_TRACE_SYMTAB` to select the
`CONFIG_SYMTAB` or to explicitly not print the symbol name
during exception stack unwind seems unnecessary, as the extra
code to print the symbol name is negligible when compared with
the symbol table, so just remove it.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-08-26 14:44:53 -04:00
Yong Cong Sin
6fae891c7e arch: reorg the dependencies around (exception) stack trace
This commit introduces a new ARCH_STACKWALK Kconfig which
determines if the `arch_stack_walk()` is available should the
arch supports it.

Starting from RISCV, this will be able to converge the exception
stack trace implementation & stack walking features. Existing
exception stack trace implementation will be updated later.
Eventually we will end up with the following:

1. If an arch implements `arch_stack_walk()`
   `ARCH_HAS_STACKWALK` should be selected.
2. If the above is enabled, `ARCH_SUPPORTS_STACKWALK` indicates
   if the dependencies are met for arch to enable stack walking.
   This Kconfig replaces `<arch>_EXCEPTION_STACK_TRACE`
2. If the above is enabled, then, `ARCH_STACKWALK` determines
   if `arch_stack_walk()` should be compiled.
3. `EXCEPTION_STACK_TRACE` should build on top of the
   `ARCH_STACKWALK`, stack traces will be printed when it
   is enabled.
4. `ARCH_STACKWALK_MAX_FRAMES` will be removed as it is
   replaced by `ARCH_STACKWALK_MAX_FRAMES`

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-08-26 14:44:53 -04:00
Yong Cong Sin
42362c6fcc subsys/profiling: relocate stack unwind backends
Relocate stack unwind backends from `arch/` to perf's
`backends/` folder, just like logging/shell/..

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-08-20 14:45:23 +02:00
Mikhail Kushnerov
a74474c1f9 arch: riscv: Implement perf stack thrace func
Implement stack trace function for riscv arch, that get required
thread register values and unwind stack with it.

Signed-off-by: Mikhail Kushnerov <m.kushnerov@yadro.com>
2024-08-13 18:28:44 -04:00
Anas Nashif
a91c6e56c8 arch: use same syntax for custom arch calls
Use same Kconfig syntax for those  custom arch call.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-08-12 12:43:36 +02:00
Anas Nashif
7f52fc4188 arch: custom cpu_idle and cpu_atomic harmonization
custom arch_cpu_idle and arch_cpu_atomic_idle implementation was done
differently on different architectures. riscv implemented those as weak
symbols, xtensa used a kconfig and all other architectures did not
really care, but this was a global kconfig that should apply to all
architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-08-12 12:43:36 +02:00
Yong Cong Sin
9698df9dc4 arch: riscv: stacktrace: fix output without ra on the stack top
Account for the scenario when we are doing `esf`-based
unwinding from a function which doesn't have any callee.
In this case the `ra` is not saved on the stack and the
second function from the top of the frame could be missing.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-08-06 17:17:17 -04:00
Yong Cong Sin
7db18ab721 arch: riscv: stacktrace: fix user thread stack bound check
According to the riscv's `arch.h`:

 +------------+ <- thread.arch.priv_stack_start
 | Guard      | } Z_RISCV_STACK_GUARD_SIZE
 +------------+
 | Priv Stack | } CONFIG_PRIVILEGED_STACK_SIZE
 +------------+ <- thread.arch.priv_stack_start +
                   CONFIG_PRIVILEGED_STACK_SIZE +
                   Z_RISCV_STACK_GUARD_SIZE

The start of the privilege stack should be:

  `thread.arch.priv_stack_start + Z_RISCV_STACK_GUARD_SIZE`

Instead of

  `thread.arch.priv_stack_start - CONFIG_PRIVILEGED_STACK_SIZE`

For the `end`, use the same equation of `top_of_priv_stack` in
the `arch_user_mode_enter()`

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-07-27 20:47:51 +03:00
Jimmy Zheng
421f81a243 arch: riscv: remove PMP stack guard for stack overflow handler
When RISCV_ALWAYS_SWITCH_THROUGH_ECALL is enabled, do_swap() enables PMP
checking in is_kernel_syscall.
If the PMP stack guard is triggered and do_swap() is called from the
fault handler, a PMP error occurs because the stack usage violates the
previous PMP setting.

Remove the stack guard setting during a stack overflow handler to allow
enabling PMP checking safely in fault handler.

Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
2024-07-27 15:12:25 +03:00
Jimmy Zheng
58bda887ce arch: riscv: update PMP setting to privileged mode for fault handler
When RISCV_ALWAYS_SWITCH_THROUGH_ECALL is enabled, do_swap() enables PMP
checking in is_kernel_syscall.
If a user thread violates memory protection and do_swap() is called from
the fault handler, a PMP error occurs because the thread is in privileged
mode but still using the old user mode PMP setting.

Update the PMP setting to privileged mode for fault handler.
This also enables the stack guard for user thread's privileged stack in
fault handler.

Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
2024-07-27 15:12:25 +03:00
Jimmy Zheng
ba263da94e arch: riscv: fix exception_depth with RISCV_ALWAYS_SWITCH_THROUGH_ECALL
When 'arch_switch()' switches though Ecall, 'exception_depth' is
incorrectly added to the next thread because the current thread is updated
before arch_switch().
Add 'exception_depth' back to the previous thread when Ecall is called from
'arch_switch()'.

Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
2024-07-12 05:55:26 -04:00
Nicolas Pitre
8d485d4a24 riscv: pmp: actually activate stack overflow protection during boot
Before this, stack protection would be effective only after switching to
the first thread.

Even before the first thread is created, the kernel init code uses the
IRQ stack to set things up. Let's make sure this is safeguarded as well.

This also fixes the incompatibility between CONFIG_RISCV_PMP and
CONFIG_RISCV_ALWAYS_SWITCH_THROUGH_ECALL, the later needing an exception
call to switch to the first thread and exception code assuming stack
guard is already set up in the PMP.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2024-07-11 18:22:08 -04:00
Nicolas Pitre
0207c7ff73 riscv: pmp: abstract the MPRV catchall entry and its QEMU workaround
This will be needed at more than one location.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2024-07-11 18:22:08 -04:00
Yong Cong Sin
e912a95355 arch: riscv: update the description of INCLUDE_RESET_VECTOR Kconfig
Update the description of the `INCLUDE_RESET_VECTOR` Kconfig so
that it is more clear to the user what it does.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-07-02 09:24:44 +02:00
Yong Cong Sin
2bb78f3e1a arch: riscv: stacktrace: use current thread if thread is NULL
Zephyr's thread stack size is not fixed, in most cases we would
need the `thread` argument to obtain the `stack_info`, unless
we are unwinding the irq stack, since that is fixed.

Otherwise we can only safely print the current `mepc` register,
unwinding the esf without the stack info of a thread can
result in undefined behavior.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-21 14:55:27 -04:00
Yong Cong Sin
b79a68fc49 arch: riscv: stacktrace: refactor fatal stack bound
Pass the current thread to `walk_stackframe()`, so that we do
not need to hardcode `_current` in `in_fatal_stack_bound()`,
which will allow it to reuse the `in_stack_bound()`

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-21 14:55:27 -04:00
Yong Cong Sin
bb66d1188c arch: riscv: stacktrace: conditionally check stack_info
Check if an address is in the thread stack only when
`CONFIG_THREAD_STACK_INFO` is enabled, since otherwise the
`stack_info` will not be available.

This fixes compilation error when `CONFIG_THREAD_STACK_INFO`
is explicitly disabled.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-14 05:22:59 -04:00
Marcin Szymczyk
0b20e2afa7 arch: riscv: skip isr.S when SW ISR table is not generated
`isr.S` depends on `CONFIG_GEN_SW_ISR_TABLE`.
Do not build it if SW ISR table is not present.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2024-06-13 16:57:32 -04:00
Yong Cong Sin
61a0f9f1c0 arch: riscv: stop printing symbol name at mepc
Now that the unwind starts from mepc already, the symbol
name at the mepc reg is kinda redundant, so just remove it.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-13 16:46:48 -04:00
Yong Cong Sin
726fefd12c arch: riscv: stacktrace: implement arch_stack_walk()
Created the `arch_stack_walk()` function out from the original
`z_riscv_unwind_stack()`, it's been updated to support
unwinding any thread.

Updated the stack_unwind test case accordingly.

Increased the delay in `test_fatal_on_smp`, to wait
for the the fatal thread to be terminated, as stacktrace can
take a bit more time.

Doubled the kernel/smp testcase timeout from 60 (default) to
120s, as some of the tests can take a little bit more than 60s
to finish.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-13 16:46:48 -04:00
Anas Nashif
c20e798646 arch: call arch_smp_init() directly, do not use SYS_INIT
Move this to a call in the init process. arch_* calls are no services
and should be called consistently during initialization.

Place it between PRE_KERNEL_1 and PRE_KERNEL_2 as some drivers
initialized in PRE_KERNEL_2 might depend on SMP being setup.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-06-12 18:23:54 -04:00
Jakub Zymelka
502fcac821 arch: riscv: core: Enable RISCV IRQs for no multithreading
Enable MSTATUS.IEN to allow RISCV interrupts for
non-multithreaded applications.

Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
2024-06-10 16:57:44 +03:00
Peter Mitsis
0bcdae2c62 kernel: Add CONFIG_ARCH_HAS_DIRECTED_IPIS
Platforms that support IPIs allow them to be broadcast via the
new arch_sched_broadcast_ipi() routine (replacing arch_sched_ipi()).
Those that also allow IPIs to be directed to specific CPUs may
use arch_sched_directed_ipi() to do so.

As the kernel has the capability to track which CPUs may need an IPI
(see CONFIG_IPI_OPTIMIZE), this commit updates the signalling of
tracked IPIs to use the directed version if supported; otherwise
they continue to use the broadcast version.

Platforms that allow directed IPIs may see a significant reduction
in the number of IPI related ISRs when CONFIG_IPI_OPTIMIZE is
enabled and the number of CPUs increases.  These platforms can be
identified by the Kconfig option CONFIG_ARCH_HAS_DIRECTED_IPIS.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2024-06-04 22:35:54 -04:00
Yong Cong Sin
6a3cb93d88 arch: remove the use of z_arch_esf_t completely from internal
Created `GEN_OFFSET_STRUCT` & `GEN_NAMED_OFFSET_STRUCT` that
works for `struct`, and remove the use of `z_arch_esf_t`
completely.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-04 14:02:51 -05:00
Yong Cong Sin
e54b27b967 arch: define struct arch_esf and deprecate z_arch_esf_t
Make `struct arch_esf` compulsory for all architectures by
declaring it in the `arch_interface.h` header.

After this commit, the named struct `z_arch_esf_t` is only used
internally to generate offsets, and is slated to be removed
from the `arch_interface.h` header in the future.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-04 14:02:51 -05:00
Yong Cong Sin
3998e18ec4 arch: rename all esf struct to struct arch_esf
Rename every architecture's esf struct to `struct esf`.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-04 14:02:51 -05:00
Piotr Wojnarowski
0f3fe4daab riscv: Align _isr_wrapper to 64 bytes for CLIC
The CLIC requires that mtvec.base is aligned to 64 bytes.
_isr_wrapper is used as mtvec.base, so align it to 64 bytes.

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2024-06-04 13:41:49 +02:00
Yong Cong Sin
02770ad963 debug: EXCEPTION_STACK_TRACE should depend on arch Kconfigs
Fix the dependencies of `CONFIG_EXCEPTION_STACK_TRACE`:
- Architecture-specific Kconfig, i.e.
  `X86_EXCEPTION_STACK_TRACE`, will be enabled automatically
  when all the dependencies are met.
- `EXCEPTION_STACK_TRACE` depends on architecture-specific
  Kconfig to be enabled.
- The stack trace implementations should be compiled only if
  user enables `CONFIG_EXCEPTION_STACK_TRACE`.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-03 03:02:04 -07:00
Yong Cong Sin
c87dc641bc arch: generalize frame pointer via CONFIG_FRAME_POINTER introduction
Enabling `CONFIG_FRAME_POINTER` allows the users to build the
kernel with frame-pointer.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-05-30 03:00:40 -07:00
Marcin Szymczyk
e17b3fd884 arch: riscv: implement arch_irq_disconnect_dynamic
For SoC with `CONFIG_RISCV_RESERVED_IRQ_ISR_TABLES_OFFSET`,
it should be taken into consideration when disconnecting IRQ.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2024-05-29 11:58:44 +02:00
Yong Cong Sin
6e8d979336 arch: riscv: stacktrace: handle user threads
Handle user threads stack bound validation in
`in_stack_bound()` to get more accurate traces.

If `CONFIG_PMP_POWER_OF_TWO_ALIGNMENT` is enabled:

```
+------------+ <- thread.arch.priv_stack_start
| Guard      | } Z_RISCV_STACK_GUARD_SIZE
+------------+
| Priv Stack | } CONFIG_PRIVILEGED_STACK_SIZE
+------------+ <- thread.arch.priv_stack_start +
                  CONFIG_PRIVILEGED_STACK_SIZE +
                  Z_RISCV_STACK_GUARD_SIZE
```

otherwise:

```
+------------+ <- thread.stack_obj
| Guard      | } Z_RISCV_STACK_GUARD_SIZE
+------------+
| Priv Stack | } CONFIG_PRIVILEGED_STACK_SIZE
+------------+ <- thread.stack_info.start
| Thread     |
| stack      |
|            |
+............|
| TLS        | } thread.stack_info.delta
+------------+ <- thread.stack_info.start +
                  thread.stack_info.size
```

See: zephyr/include/zephyr/arch/riscv/arch.h

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-05-29 08:38:53 +02:00
Yong Cong Sin
602c993799 arch: riscv: stacktrace: fix cpuid type and optimize branch with compiler
Change the type of `cpu_id` to `uint8_t` since that is the type
of `arch_curr_cpu()->id`.

Instead of using precompiler switch (`#ifdef CONFIG_SMP`), use
if-else shorthand instead (`IS_ENABLED(CONFIG_SMP)`).

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-05-29 08:38:53 +02:00
Yong Cong Sin
bbe5e1e6eb build: namespace the generated headers with zephyr/
Namespaced the generated headers with `zephyr` to prevent
potential conflict with other headers.

Introduce a temporary Kconfig `LEGACY_GENERATED_INCLUDE_PATH`
that is enabled by default. This allows the developers to
continue the use of the old include paths for the time being
until it is deprecated and eventually removed. The Kconfig will
generate a build-time warning message, similar to the
`CONFIG_TIMER_RANDOM_GENERATOR`.

Updated the includes path of in-tree sources accordingly.

Most of the changes here are scripted, check the PR for more
info.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-05-28 22:03:55 +02:00
Yong Cong Sin
5a35037af3 arch: riscv: check esf before calling z_riscv_unwind_stack
Make sure that esf is not NULL before calling
z_riscv_unwind_stack to prevent NULL pointer dereferencing.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-05-27 06:19:32 -04:00
Yong Cong Sin
c118cd5a13 arch: make the max stack frames configurable
Current on x86 & risc-v that implement stack trace, the
maximum depth of the stack trace is defined by a macro.

Introduce a new Kconfig:EXCEPTION_STACK_TRACE_MAX_FRAMES
so that this is configurable in software.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-05-23 11:52:08 -04:00
Yong Cong Sin
eafc4eff04 arch: riscv: print symbol name of mepc if CONFIG_SYMTAB is enabled
The mepc register is the address of the instruction that was
interrupted, it will make debugging easier if we know the
name of the symbol, so print it if `CONFIG_SYMTAB` is enabled.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-05-23 11:52:08 -04:00
Yong Cong Sin
c1a925de98 arch: riscv: use symtab to print function name in stack trace
Selecting `CONFIG_EXCEPTION_STACK_TRACE_SYMTAB` will
enable the symtab generation which will be used in the
stack trace to print the function name of the return
address.

Updated the `stack_unwind` test to test the symbols in a
stack trace.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-05-23 11:52:08 -04:00