Add support to stm32wb series in stm32 clock_control driver.
Ip is similar to stm32l4 one but AHB bus presacler is renamed
to "CPU1" and CPU2 and AHB4 prescalers should be defined.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Added option to have LFCLK synthesized from HFCLK. It is not low
power but ensures constant relation between HFCLK and LFCLK and
might be useful in certain scenarios (e.g. testing).
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier. Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.
By default all files without license information are under the default
license of Zephyr, which is Apache version 2.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Rename reserved function names in drivers/ subdirectory. Update
function macros concatenatenating function names with '##'. As
there is a conflict between the existing gpio_sch_manage_callback()
and _gpio_sch_manage_callback() names, leave the latter unmodified.
Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
An external project extending the Zephyr RTOS and its drivers may have
subsystems that must use its own specific driver(s) when active. One
example is the nRF5x NVMC that must be scheduled in between radio
operations. A subsystem may also be dependent on its own drivers for
security, real-time and/or because of hardware constrains.
In order to not introduce non-Zephyr specific code into the Zephyr tree,
an option is added to disable the in-tree drivers in Zephyr. Because
Kconfig does not support a good way of de-selecting other symbols, a
variable on the form `<DRIVER>_FORCE_ALT` is added as a
dependency for each `<DRIVER>`. For example, the out-of-tree subsystem
will select `FLASH_NRF_FORCE_ALT` to disable the in-tree driver. A
solution for issue #8181 would open up for a more general solution,
however #8181 requires significant effort.
Support for out-of-tree drivers is added to Nordic drivers for
clock_control, entropy and flash.
A generic solution for this is desired. Issue #14527 is tracking that
progress.
Signed-off-by: Thomas Stenersen <thomas.stenersen@nordicsemi.no>
Add choice variables for CLOCK_CONTROL_NRF_SOURCE and
CLOCK_CONTROL_NRF_ACCURACY such that the choices may be augmented
out-of-tree.
Signed-off-by: Thomas Stenersen <thomas.stenersen@nordicsemi.no>
Redefining the config will not let another (out-of-source) driver be
chosen instead of the default. The driver is practically forced by the
soc settings. This commit moves default settings from soc/arm/nordic_nrf
into the drivers themselves.
Signed-off-by: Thomas Stenersen <thomas.stenersen@nordicsemi.no>
These symbols appear within an 'if CLOCK_CONTROL' (in
drivers/clock_control/Kconfig).
'if FOO' is just shorthand for adding 'depends on FOO' to each item
within the 'if'. Dependencies on menus work similarly. There are no
"conditional includes" in Kconfig, so 'if FOO' has no special meaning
around a source. Conditional includes wouldn't be possible, because an
if condition could include (directly or indirectly) forward references
to symbols not defined yet.
Tip: When adding a symbol, check its dependencies in the menuconfig
('ninja menuconfig', then / to jump to the symbol). The menuconfig also
shows how the file with the symbol got included, so if you see
duplicated dependencies, it's easy to hunt down where they come from.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Converts the rv32m1 clock control driver to use 'DT_' prefixed defines
instead of deprecated non-prefixed defines.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Allow for the MSI to be auto-cal'd via an LSE when enabled, even when
being used as a source for the PLL as the sysclock.
Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
This commit adds the Clock Control Interrupt Service
Routine into the customized vector table, when building
for nRF52X-based platforms. As a result, the interrupts
generated by the clock control will not interfere with
the test.
Fixes#13823.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
For PLLQ divisor configuration, use directly RCC_PLLCFGR_PLLQ_Pos
definition instead of calculating its position from RCC_PLLCFGR_PLLQ.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Default AHB presacler value was set to 0 which is not an allowed
value. Set it to 1 and limit range from 1 to 512.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Some more were added since the cleanup pass in June 2018. See e.g.
commit 2d50da70a1 ("drivers: ipm: Kconfig: Remove redundant 'default n'
properties") for a motivation. It also avoids people wondering whether
or not they need to put in 'default n'.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add a Peripheral Clock Controller (PCC) driver. This gates and ungates
clocks to various peripherals on the SoC.
Signed-off-by: Michael Scott <mike@foundries.io>
Signed-off-by: Marti Bolivar <marti@foundries.io>
Minor adjustments are done to the nRF clock_control and rtc_timer
drivers to make them usable on nRF9160 as well.
The arm_irq_vector_table test code is modified only because it uses
the function that has been renamed in the nrf_rtc_timer driver.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use the symbol generated from DT so that it is common for nRF9160
and nRF5 family SoCs. To avoid artificial renaming of CLOCK_POWER_IRQn
to POWER_CLOCK_IRQn.
For nRF5 family SoCs clock nodes were not defined so far, thus they are
added so that the proper DT symbol is generated for them as well.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Renaming Kconfig.nrf5 to Kconfig.nrf in the wake of extending
the use of the nRF clock control driver to both nRF5 and nRF91
SOC series.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit renames the nrf5_clock_control.h and
nrf5_clock_control.c files to nrf_clock_control.h and
nrf_clock_control.c, respectively, as they are used
in nRF9160 builds, as well.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit renames the CLOCK_CONTROL_NRF5 Kconfig symbol to
CLOCK_CONTROL_NRF. The change is required to aleviates confusion
when selecting the symbol in nRF9160 SOC definition.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add support for Low Speed External 32.768 kHz oscillator (LSE ).
Add support for MSI PLL-Mode offering an automatic calibration feature
in combination with the LSE. This allows the MSI to reach an accurate
+/-0,25% clock perfectly suitable for USB full-speed clock.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Driver was not complaining when unsupported bus values where used.
Add default to switch cases and return error.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The LFSTARTED event was disabled so it was impossible to wake the
CPU up on LF clock being ready. The Bluetooth stack was putting
the CPU to sleep, expecting to be woken up on LFSTARTED event.
As the event never triggered, the CPU was woken up seconds later
by a different event introducing a multi-second startup delay.
Bug introduced by 23c92100ac.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
These changes were obtained by running a script created by
Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following
specification:
1. Read the contents of all dts_fixup.h files in Zephyr
2. Check the left-hand side of the #define macros (i.e. the X in
#define X Y)
3. Check if that name is also the name of a Kconfig option
3.a If it is, then do nothing
3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it
has neither of these two prefixes
4. Replace the use of the changed #define in the code itself
(.c, .h, .ld)
Additionally, some tweaks had to be added to this script to catch some
of the macros used in the code in a parameterized form, e.g.:
- CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS
- CONFIG_UART_##idx##_TX_PIN
- I2C_SBCON_##_num##_BASE_ADDR
and to prevent adding DT_ prefix to the following symbols:
- FLASH_START
- FLASH_SIZE
- SRAM_START
- SRAM_SIZE
- _ROM_ADDR
- _ROM_SIZE
- _RAM_ADDR
- _RAM_SIZE
which are surprisingly also defined in some dts_fixup.h files.
Finally, some manual corrections had to be done as well:
- name##_IRQ -> DT_##name##_IRQ in uart_stm32.c
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Fix RCOSC calibration initiation to ensure LF clock is
running; and the HF clock is running with crystal before
triggering the actual calibration in ISR.
Fixes#10811.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
There are two asserts in the ISR for clock events on the nRF5 that
appear to be accidental.
The first assert fails if there are any LF clock started events, which
there will be when starting up the RC oscillator with calibration.
The second assert fails when we decrement the refcount on the HF
oscillator after finishing a calibration. There will typically be
users left of the HF oscillator, so _m16src_stop() doesn't actually
stop it and thus doesn't return 0.
This code typically works fine because it's not built with asserts
enabled by default. Can be reproduced on a BBC microbit with the
default config plus CONFIG_ASSERT=y.
Signed-off-by: Jonas Norling <jonas.norling@greeneggs.se>
Depend on the new SOC_COMPATIBLE_NRF symbol instead of the
SOC_FAMILY_NRF symbol.
This allows the driver to be used from the bsim simulated board
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
* Add usbd_dc_nrfx shim
The shim is based on the previous one usbd_dc_nrf5.
For handling the USBD hardware, tested nrfx_usbd driver from nRF SDK
was used.
Briefly tested examples:
* usb/cdc_acm
* usb/dfu (USB communication only due to flash handling issues)
* usb/hid-mouse
* bluetooth/hci_usb
Signed-off-by: Paweł Zadrożniak <pawel.zadrozniak@nordicsemi.no>
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Consistently use
config FOO
bool/int/hex/string "Prompt text"
instead of
config FOO
bool/int/hex/string
prompt "Prompt text"
(...and a bunch of other variations that e.g. swapped the order of the
type and the 'prompt', or put other properties between them).
The shorthand is fully equivalent to using 'prompt'. It saves lines and
avoids tricking people into thinking there is some semantic difference.
Most of the grunt work was done by a modified version of
https://unix.stackexchange.com/questions/26284/how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some
of the rarer variations had to be converted manually.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Fix the implementation to correctly check the status of
HFCLK and LFCLK states with respect to the requested
sources.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Added Kconfig option and implementation to support a
non-blocking startup of 32KHz crystal oscillator.
This will reduce the time from boot to application start
while the crystal startup happens in background.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Bool symbols implicitly default to 'n'.
A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.
This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
MSI clock signal can be selected in several ranges.
These ranges should be taken into account for calculating its
frequency and hence global system frequency.
Provide a Kconfig option to set MSI range.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
To enable for easier testing, replace direct use of registers
from Nordic's nrfx MDK with accesses via its HAL inlined functions
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
In stm32 clock_control driver, Kconfig symbol CLOCK_STM32_PLL_PREDIV1
in stm32f3 series was set as conditional on the activation of some
specific STM32F3 SoCs that are not supported yet in Zephyr.
Remove this flag.
In order not to loose a rather studious part of code, comment it out
and set a TODO to specify how to re-enable it once it will be
required.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The mcux sim clock control driver was originally designed to pass
through the clock subsystem value from dts to the mcux CLOCK_GetFreq()
function. This assumed that the values in
include/dt-bindings/clock/kinetis_sim.h matched the enumeration in
fsl_clock.h, which is true for the coresys, platform, and bus clocks.
However, the low-power oscillator (LPO) clock has a different values in
k64 vs. kw2xd, therefore we must update the clock_control driver to
parse the value from dts and convert it to the fsl_clock.h enumeration.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enable System Configuration Controller clock in clock_control
instead of gpio controller when we set a gpio as interrupt.
We use System Configuration Controller to manage external
interrupts and enable PIN pair PA11/12, used in USB device,
mapped instead of PA9/10.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Enable System Configuration Controller clock in clock_control
instead of gpio controller when we set a gpio as interrupt.
We use System Configuration Controller to manage external
interrupts and internal voltage reference for 48 MHz HSI
used in USB device.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Add MSI as potential SYSCLK direct source for L0 and L4.
It could be needed in some cases when an accurate clock
is required and no external clock is available.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Commit 29f8b23b broke "make menuconfig" due to a missing newline in
this Kconfig.quark_se file.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Upcoming Nordic ICs that share many of the peripherals and architecture
with the currently supported nRF5x ones are no longer part of the nRF5
family. In order to accomodate that, rename the SoC family from nrf5 to
nrf, so that it can contain all of the members of the wider Nordic
family.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
nRF52840 USBD requires power events to start USB enumeration.
Add APIs to enable/disable the power events, read the USB VBUS detect
and output power ready statuses which can then be used by the USB driver
in the enumeration sequence.
Signed-off-by: Sundar Subramaniyan <sundar.subramaniyan@gmail.com>
Fix return value to -EBUSY instead of 0 when releasing a
reference but not physically turning off the clock.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Remove SoCs part dependency of CLOCK_STM32_PLL_PREDIV1 config since
it will only be used on parts having an HSE oscillator, ignored
otherwise.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Use "select USE_STM32_LL_UTILS" to select the needed STM32 LL files,
instead of editing ext/hal/st/stm32cube/CMakeLists.txt
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
The combination of
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL and
CONFIG_CLOCK_STM32_PLL_SRC_HSI
on SOCs with PREDIV1 support made use of the LL define
LL_RCC_PLLSOURCE_HSI_DIV_2, which is not defined for SOCs with
PREDIV1 support.
This exchanges LL_RCC_PLLSOURCE_HSI_DIV_2 with LL_RCC_PLLSOURCE_HSI
which is the appropiate source according to stm32f0xx_ll_rcc.h
line 473 and stm32f3xx_ll_rcc.h line 795.
Tested by compiling hello world for nucleo_f091rc board with HSI as
PLLSOURCE.
Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.
Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.
This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.
For users that just want to continue their work with minimal
disruption the following should suffice:
Install CMake 3.8.2+
Port any out-of-tree Makefiles to CMake.
Learn the absolute minimum about the new command line interface:
$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..
$ cd build
$ make
PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
Adds a new clock control driver for Kinetis SoCs that have the system
integration (SIM) module. This will allow mcux shim drivers, such as
uart and i2c, to abstract the call to CLOCK_GetFreq() behind the
clock_control interface and thus be reused for SoCs with different clock
architectures.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
If the LF clock was already started, but wasn't initialized with
_k32src_start yet, allow it to run once. This is needed because if a
soft reset is triggered while watchdog is active, the LF clock will
already be running, but won't be configured yet (watchdog forces LF
clock to be running).
If the LF clock isn't configured with _k32src_start, the nRF5 RTC
won't count and the whole system will malfunction, as the kernel
depends on the clock source being working properly.
Signed-off-by: Thiago Silveira <thiago@exati.com.br>
Frequency tolerance for LFRC after calibration for nRF5x
Series ICs is between 251 and 500 ppm as per Product
Specification. For more details refer to:
http://infocenter.nordicsemi.com/
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Following introduction of stm32cube LL based clock control driver,
remove references to former native driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Align stm32f1xx series clock driver to other parts of stm32 family.
Driver support both Connectivity and Density lines of stm32f1 series,
that are based on different Reset and Clock Control architectures.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
During introduction of LL clock_control driver on stm32f4 series,
AHB2 clock activation/deactivation case was let under stm32l4 condition
preventing activation of this clock with F4 series.
This patch fixes the issue.
Change-Id: I5e488e990d33252f491f8960fc7a798ca3416be2
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Commit 58c8d15 ("clock control:stm32: provide STM32Cube LL based
driver") added PLL initialization which disables the PLL before
configuring it.
This works if the system clock source is not the PLL (which is the
usual case for Zephyr booting out of chip reset). However, if the
SYSCLK source *is* the PLL, this halts execution.
To support this use case, switch the SYSCLK source to the
always-present HSI before disabling the PLL.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Factor out a subroutine used to switch SYSCLK to HSI. This code will
be used again in a subsequent patch.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
fix misspelling in Kconfig files that would show up in configuration
documentation and screens.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This commits align CONFIG_ factor names between stm32f4 and stm32l4
series to enable code factorization such as use of Q_DIVISOR.
Though, it does not concatenate kconfig sections as we might use
a bit of time to see what is needed in this regard
Change-Id: Ia603406d53949abf5675b801a5448397d5ab8462
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following activation of stm32 common clock driver for stm32f4 series
remove references to stm32f4 specific driver.
Change-Id: I372a0ea046007bcb34944d6b2b8880077583b1d3
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit enables STM32Cube LL based driver for stm32f4 series.
This generic driver provides a unified API to clock driver for all
stm32 series.
LL API allows driver to be lightweight and to keep genericity across
stm32 family to ease further devlopment and maintenance.
Change-Id: Ie31ae8f433313787f9c9eda77de41925721d54dd
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I08f51e2bfd475f6245771c1bd2df7ffc744c48c4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The PLLN multiplier can range between 50 and 432 on all STM32F4, except
on the STM32F401 where the lower bound is restricted to 192.
Fix the range property and the help text to reflect this reality.
Change-Id: I7b93e84b321f7869aaf611287344cd3e25c893c8
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Some fixes where needed to get PLL2 source of PREVI1 functional.
Compiled ok with following configuration:
CONFIG_CLOCK_STM32F10X_CONN_LINE_PREDIV1_SRC_PLL2CLK=y
CONFIG_CLOCK_STM32F10X_CONN_LINE_PREDIV2=0
CONFIG_CLOCK_STM32F10X_CONN_LINE_PLL2_MULTIPLIER=8
Jira: ZEP-1758
Change-Id: I5ddfaef1b44c4c4e5e6adedc158a1c9092bc8df5
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit brings code size optimization as suggested by Christer
Weinigel review during review of initial commit for this driver.
It also cleans up useless definition in header file.
Change-Id: Ibeaa2e51570dff21825c60c30ba83d939b31d938
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
After introduction and activation of STM32Cube LL based driver on
F3 and L4 series, this commit removes the no more needed code for
native driver for these soc.
Change-Id: I266d1a3fc4b464cee34b1cc1a1a333c5bf923e41
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This new clock control driver aims at providing a lightweight
generic driver to the whole stm32 family.
Driver is based on LL Cube API and hence is for now available
only for STM32 supporting this API: stm32f3xx and stm32l4xx.
Other families should be supported soon.
Once globally supported, this unique driver will also help
reducing the impact of stm32 clock control heterogeneity in
other drivers.
Change-Id: Id15a8d0d44f03809b2907ef10d6877700459e674
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert driver to use the CMSIS NVIC APIs rather than the internal ones
so we can remove them in the future.
Change-Id: I7bf3024ea4baf61f1e42bbbd5e4b0abfc6c04e6b
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move logging out of misc/ to its own subsystem. Anything related to
logging and any new logging features or backends could be added here
instead of the generic location in misc/ which is overcrowded with
options that are not related to eachother.
Jira: ZEP-1467
Change-Id: If6a3ea625c3a3562a7a61a0ba5fd7e6ca75518ba
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch adds the clock_control implementation for the ARM LTD
Beetle platform.
The main features enabled are:
* Clock on and off in ACTIVE, SLEEP and DEEPSLEEP mode.
* PLL support (freq: 12, 36, 48 Mhz).
The integration with the existing drivers will be done in future
patches.
Jira: ZEP-1300
Change-Id: I07cb2325275bd86a036e8e24aeb7bbf2c6176a93
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Add the clock driver for the STM32L4 series.
Change-Id: Icdf79061f163d8d00187b382d1564422fb875c5b
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit replaces the nanokernel.h include by kernel.h.
Change-Id: Ib42fbf2d9f77a73c0831f569b3dbbfb342ea2e1d
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
This patch addresses the following issues:
* Aligns the Kconfig code style with Zephyr projects requirements.
* Removes redundant "depends on" from Kconfig.
* Adds static to the containing file scope declarations.
Change-Id: Idaaa0d705a31bc69cdf7e576e303f581d3d0bd5f
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch addresses the following issues:
* Aligns the Kconfig code style with Zephyr projects requirements.
* Removes redundant "depends on" from Kconfig.
* Adds static to the containing file scope declarations.
Change-Id: I14651826724c014cc71d62ab6cab03c668c578c0
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch addresses the following issues:
* Aligns the Kconfig code style with Zephyr projects requirements.
* Removes redundant "depends on" from Kconfig.
* Adds static to the containing file scope declarations.
Change-Id: I6d48d2eaf6ffd5fa28b37e1d3ca2d467705110f3
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch addresses the following issues:
* Aligns the Kconfig code style with Zephyr projects requirements.
* Removes redundant "depends on" from Kconfig.
Change-Id: Ic9e2fd935417fa40127bddeba4660109332087ff
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
In ST CMSIS files, FLASH_BASE does not mean base address of FLASH register
Instead FLASH_R_BASE is used.
stm32f1 clock control driver is updated to be compatible with this naming.
Change-Id: Ic4fb49c60c392e15fd12c69266baf4c686bd343b
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Based on the STM32F10x driver. Removing old code as we need to use the
bus number when dealing with 4 possible peripherals.
Change-Id: Id0263aa008e9b039ff9a00339e5622e289ffdf99
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Integrating the IRQ definitions for both nRF51 and nRF52, and defining
the set of IRQ values that are common to both.
Also switch the controller, uart and clock drivers to use the common
header definitions.
Change-Id: Id6816d7a97720896cfe4df83656fb8b1f8fb01fa
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
In the Nordic Semiconductor's nRF5x series SoC clock control
system can source the system clocks from a range of internal or
external high and low frequency oscillators and distribute them
to modules based upon a module’s individual requirements.
In this commit the implementation adds support for 16MHz
peripheral clock, 32.768 kHz RC oscillator, and 32.768 kHz
crystal oscillator clock sources.
16MHz peripheral clock is required to use the 2.4GHz Radio
peripheral. 32.768 kHz RC or crystal oscillator clock source
is required to use the real time counter peripheral.
Jira: ZEP-896
Change-id: I1a1e22322a5a26b587f3e27bb979e6296987ac1c
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Clock control drivers are now using new system log macros. also update
the Kconfig variable to be a level rather than a bool.
JIRA: ZEP-311
Change-Id: Ia64e79e4e083df580861f64c661f8dbaa8a3985d
Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
Convert leading whitespace into tabs in Kconfig files. Also replaced
double spaces between config and <prompt>.
Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.
Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.
The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.
This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.
Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.
Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add support for use of HSE (incorrectly named PREDIV1)as input of PLL,
along with HSE bypass for stabilized external clock, and XTPRE
prescaler. Update PLL handling so that we do not unnecessarily enable
PLL clocks, instead enabling only the clocks sources that are required
as per user's configuration.
This change allows higher SYSCLK clock values, up to 72MHz.
Change-Id: Ia7c2be3ce11ac0de2efa664b20e7ab5fddd57a51
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Moves the kconfig options for STM32F10X clock control driver
into its own submenu.
Change-Id: I9ef658defe85feab3dfdb3e329710cb48bbffd86
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
() Moves the Quark SE clock control into its submenu.
() Fixes the dependencies in the SoC default Kconfig
so the options are not displayed out of place in
menuconfig.
Change-Id: Ifdf06242be8ceed03c2c657c942875a5a7f2750e
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This patch replaces all occurences of the macro DEV_OK by the actual
value 0 at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: I69980ecb9755f2fb026de5668ae9c21a4ae62d1e
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
The patch adds a driver for STM32F10x series RCC (Reset and Clock
Control) subsystem.
The module is primarily responsible for setting up of MCU's clock
tree. In particular the driver sets up SYSCLK, PLL (with source
configuration), AHB prescaler, and APB1/APB2 prescalers. As part of this
functionality, the subsystem can enable/disable clock signal for
particular peripherals, thus reducing the power consumption of the MCU.
The driver implements clock control driver API. However, subsystem IDs
being HW specific are exposed in driver public header that must be
included by callers. The driver registers a single device using a common
name STM32_CLOCK_CONTROL_NAME. The device is initialized at
the PRIMARY level with priority 1. This allows the initialization to
take place right after SoC initialization routine.
The driver depends on selection of SOC_STM32F1X config option and is MCU
specific.
Change-Id: I8bea5db20726a24bce7b7ffe0b95de543240429a
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Extend the public API of clock_control driver with a function for
querying of clock rate driving given peripheral. This is useful when the
driver must calculate or configurae values that depend on the rate of
clock driving this subsystem.
A baud rate setting of UART port is an example of such operation. To
configure a particular baud rate the driver may need to set the internal
counters of UART port, where the actual value will depend on the clock
rate for this peripheral.
The implementation returns DEV_NO_SUPPORT for clock_control drivers that
do not implement such functionality.
Change-Id: I4e7ec96cd3678a4bb1ff289b0247488289310f2d
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Move quark_se clock control entries to separate file. This will help to
keep things organized once we add more clock control drivers.
Change-Id: Id8f4a94189ab5bbba9b6552777549cf426d79273
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Fix dependencies for external and sensor clock device names in
clock_control Kconfig.
Change-Id: I708f025cf3ce97bcd003754fb5b395712d203107
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
This is the last step before obsoleting DEVICE_DEFINE() and
DEVICE_INIT_CONFIG_DEFINE().
Change-Id: Ica4257662969048083ab9839872b4b437b8b351b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_DEFINE() so that it fits in the 'device' namespace.
Change-Id: I3af3a39cf9154359b31d22729d0db9f710cd202b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_INIT_CONFIG_DEFINE(), because (a) it was not fitting
in any namespace and (b) it is not used to declare, but rather define a
object.
Change-Id: I1da5822f06b85a9fb024b5b184afd0ccc01012ec
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Change terminology and use SoC instead of platform. An SoC provides
features and default configurations available with an SoC. A board
implements the SoC and adds more features and IP block specific to the
board to extend the SoC functionality such as sensors and debugging
features.
Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Put initialization priorities as device driver Kconfig
parameter.
Initialization priority value for each platform is defined
in the platform Kconfig file.
Drivers and platform code use SYS_DEFINE_DEVICE to add
and initialization function.
Change-Id: I2f4f3c7370dac02408a1b50a0a1bade8b427a282
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Quark SE provides various clock controllers through its SCSS block.
Peripheral, external, sensor, and others.
This current drivers provides only the clock gating capability, for
peripheral, external and sensor. But it could support divider and more
other features once defined in the generic API.
Note: such clock has _nothing_ to do with a Real Time Clock (RTC).
An RTC provide clock timing like a watch would do. Here the clock
controller is about circuit clocking.
Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
