drivers: stm32 clock control: fix HSI PLLSOURCE with PREDIV1 support
The combination of CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL and CONFIG_CLOCK_STM32_PLL_SRC_HSI on SOCs with PREDIV1 support made use of the LL define LL_RCC_PLLSOURCE_HSI_DIV_2, which is not defined for SOCs with PREDIV1 support. This exchanges LL_RCC_PLLSOURCE_HSI_DIV_2 with LL_RCC_PLLSOURCE_HSI which is the appropiate source according to stm32f0xx_ll_rcc.h line 473 and stm32f3xx_ll_rcc.h line 795. Tested by compiling hello world for nucleo_f091rc board with HSI as PLLSOURCE. Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
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2 changed files with 2 additions and 2 deletions
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@ -36,7 +36,7 @@ void config_pll_init(LL_UTILS_PLLInitTypeDef *pllinit)
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/* following SoCs: STM32F070x6, STM32F070xB and STM32F030xC */
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/* cf Reference manual for more details */
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#if defined(CONFIG_CLOCK_STM32_PLL_SRC_HSI)
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pllinit->PLLDiv = LL_RCC_PLLSOURCE_HSI_DIV_2;
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pllinit->PLLDiv = LL_RCC_PLLSOURCE_HSI;
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#else
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/*
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* PLL DIV
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@ -36,7 +36,7 @@ void config_pll_init(LL_UTILS_PLLInitTypeDef *pllinit)
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/* following SoCs: STM32F302XE, STM32F303xE and STM32F398xx */
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/* cf Reference manual for more details */
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#if defined(CONFIG_CLOCK_STM32_PLL_SRC_HSI)
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pllinit->PLLDiv = LL_RCC_PLLSOURCE_HSI_DIV_2;
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pllinit->PLLDiv = LL_RCC_PLLSOURCE_HSI;
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#else
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/*
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* PLL DIV
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