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drivers: stm32 clock control: fix HSI PLLSOURCE with PREDIV1 support

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The combination of
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL and
CONFIG_CLOCK_STM32_PLL_SRC_HSI
on SOCs with PREDIV1 support made use of the LL define
LL_RCC_PLLSOURCE_HSI_DIV_2, which is not defined for SOCs with
PREDIV1 support.

This exchanges LL_RCC_PLLSOURCE_HSI_DIV_2 with LL_RCC_PLLSOURCE_HSI
which is the appropiate source according to stm32f0xx_ll_rcc.h
line 473 and stm32f3xx_ll_rcc.h line 795.

Tested by compiling hello world for nucleo_f091rc board with HSI as
PLLSOURCE.

Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
This commit is contained in:
Daniel Wagenknecht 2017-12-14 11:02:47 +01:00 • committed by Anas Nashif
commit 39bb93d402
2 changed files with 2 additions and 2 deletions
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2
drivers/clock_control/stm32f0x_ll_clock.c
View file

@ -36,7 +36,7 @@ void config_pll_init(LL_UTILS_PLLInitTypeDef *pllinit)
/* following SoCs: STM32F070x6, STM32F070xB and STM32F030xC */
/* cf Reference manual for more details */
#if defined(CONFIG_CLOCK_STM32_PLL_SRC_HSI)
pllinit->PLLDiv = LL_RCC_PLLSOURCE_HSI_DIV_2;
pllinit->PLLDiv = LL_RCC_PLLSOURCE_HSI;
#else
/*
* PLL DIV

2
drivers/clock_control/stm32f3x_ll_clock.c
View file

@ -36,7 +36,7 @@ void config_pll_init(LL_UTILS_PLLInitTypeDef *pllinit)
/* following SoCs: STM32F302XE, STM32F303xE and STM32F398xx */
/* cf Reference manual for more details */
#if defined(CONFIG_CLOCK_STM32_PLL_SRC_HSI)
pllinit->PLLDiv = LL_RCC_PLLSOURCE_HSI_DIV_2;
pllinit->PLLDiv = LL_RCC_PLLSOURCE_HSI;
#else
/*
* PLL DIV