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clock_control: have FLASH_BASE compatible with ST CMSIS files

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In ST CMSIS files, FLASH_BASE does not mean base address of FLASH register
Instead FLASH_R_BASE is used.
stm32f1 clock control driver is updated to be compatible with this naming.

Change-Id: Ic4fb49c60c392e15fd12c69266baf4c686bd343b
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2016-10-19 14:44:02 +02:00 • committed by Kumar Gala
commit eed678612b
2 changed files with 2 additions and 2 deletions
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2
arch/arm/soc/st_stm32/stm32f1/soc.h
View file

@ -65,7 +65,7 @@
#define IWDG_BASE (APB1PERIPH_BASE + 0x3000)
/* FLASH */
#define FLASH_BASE (AHBPERIPH_BASE + 0x2000)
#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000)
#ifndef _ASMLANGUAGE

2
drivers/clock_control/stm32f10x_clock.c
View file

@ -205,7 +205,7 @@ static const struct clock_control_driver_api stm32f10x_clock_control_api = {
static inline void __setup_flash(void)
{
volatile struct stm32f10x_flash *flash =
(struct stm32f10x_flash *)(FLASH_BASE);
(struct stm32f10x_flash *)(FLASH_R_BASE);
if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 24000000) {
flash->acr.bit.latency = STM32F10X_FLASH_LATENCY_0;