Commit graph

815 commits

Author SHA1 Message Date
Thomas Stranger
a44e9f496e soc: stm32g0: Add support for STM32 IWDG
The driver for STM32's independent watchdog already exists and is
compatible with the stm32g0 SoC. Enable the independent watchdog
for the stm32g0 series for use with this driver.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2020-03-10 14:46:07 +02:00
Gerson Fernando Budke
1203547034 soc: arm: atmel: sam4s: Add missing symbols for usart
This add dts_fixup and soc_pinmap to enable usart serial driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-03-10 14:43:14 +02:00
Gerson Fernando Budke
2da3b0a7fd soc: arm: atmel: sam4s: Fix code align
Fix dts_fixup.h code align.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-03-10 14:43:14 +02:00
Francois Ramu
abd8ca94c2 soc: arm: stm32g474 config device
This patch aligns the Kconfig.defconfig.stm32g474re to the
Kconfig.defconfig.stm32g431rb

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-03-09 17:26:40 +02:00
Daniel Leung
2ac3a85273 soc: mec1501: wait for UART FIFO clear before deep sleep
It is observed that after each test, weird characters appear on
console. This problem goes away if deep sleep is disabled.
The theory is that the CPU runs to deep sleep (_sys_suspend())
faster than UART can shift all the bits out. If we spin wait
for UART FIFO to clear, this is no longer an issue. This is
circumstantial evidence to the theory. So for now, put in
a workaround to spin wait for UART FIFO to clear before
going into deep sleep.

Relates to #22885

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-02-28 20:18:13 +02:00
Alexander Wachter
b96477dd69 SoC: SAM3x and SAM4: Add the Flash Controller to the DT
This commit adds Device-Tree instances of the Flash controller
to the SAM3X, SAM4E and SAM4S series. The Flash-Controller
is used to get the unique device identifier.

Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
2020-02-27 21:14:54 +01:00
Alexander Wachter
4cfd4a707d SoC: stm32: Include LL utilities if HWINFO is selected
Include stm32XXxx_ll_utils.h in soc.h for every stm32 SoC,
if CONFIG_HWINFO_STM32 is selected.

Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
2020-02-27 21:14:54 +01:00
Ioannis Glaropoulos
a062edd805 boards: arm: silabs_exx32: correct Kconfig option prompt
Fix a typo in the option prompt for Kconfig symbol
SOC_SERIES_EFM32GG11B.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-02-25 14:07:45 +02:00
Abhishek Shah
f64cd1a5db soc: arm64: qemu-cortex-a53: Add MMU support
Add qemu-cortex-a53 memory regions with proper attributes
to translation tables. Minimal regions to execute "hello_world"
are added as of now, More granular memory regions should be
added later as per the requirement.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-02-20 17:24:59 +02:00
Gerson Fernando Budke
6ea8ae7a9a soc: arm: atmel: sam4e: Fix USART1 soc_pinmap
The USART1 soc_pinmap have wrong TXD1 pin definition. This fix port and
function definition.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-15 16:35:01 -06:00
Gerson Fernando Budke
09eab93889 soc: arm: atmel: sam4e: Add missing usart dts_fixup
Add mising dts_fixups symbols to allow enable usart driver. This fix
align code on dts_fixups too.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-15 16:35:01 -06:00
Ulf Magnusson
378d6b137a kconfig: Replace non-defconfig single-symbol 'if's with 'depends on'
Same deal as in commit eddd98f811 ("kconfig: Replace some single-symbol
'if's with 'depends on'"), for the remaining cases outside defconfig
files. See that commit for an explanation.

Will do the defconfigs separately in case there are any complaints
there.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-12 10:32:34 -06:00
Ulf Magnusson
a42a42cd5a kconfig: Replace defconfig singe-symbol 'if's with 'depends on'
Same deal as in commit eddd98f ("kconfig: Replace some single-symbol
'if's with 'depends on'"), for all symbols defined within defconfig
files. See that commit for an explanation.

Maybe 'if's were used originally to mirror the 'if's in the main Kconfig
files, and then it got copied around by people assuming 'if' must work
differently from 'depends on'. It doesn't match in every spot at least.
Better to keep it simple and just consistently use 'depends on' when
it's a single symbol/choice I think. Helps reinforce that 'if' isn't
magic too.

Verified by printing all Kconfig menu nodes (symbols, choices, menus,
etc.) before and after the change and diffing (should show no
difference).

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-12 10:32:13 -06:00
Erwan Gouriou
9631709ca4 soc: stm32h7: Move PWR init code in soc init function
Move PWR init code out of clock control driver and
put SMPS related function under SMPS condition as it
is not supported by all soc variants of the series.

Fixes #22363

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-02-11 17:41:49 +02:00
Kumar Gala
28da5fdde7 sam0: flash: Fix build issue reported by flash_shell sample
The DT_FLASH_DEV_NAME define used by the sample was set to a define
symbol that was never generated.  Change it to use
DT_INST_0_ATMEL_SAM0_NVMCTRL_LABEL on the sam0 family of SoCs that
had this issue.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-08 10:29:28 -06:00
Ulf Magnusson
c5839f834b kconfig: Remove assignments to CONFIG_<arch> syms and hide them
All board defconfig files currently set the architecture in addition to
the board and the SoC, by setting e.g. CONFIG_ARM=y. This spams up
defconfig files.

CONFIG_<arch> symbols currently being set in configuration files also
means that they are configurable (can be changed in menuconfig and in
configuration files), even though changing the architecture won't work,
since other things get set from -DBOARD=<board>. Many boards also allow
changing the architecture symbols independently from the SoC symbols,
which doesn't make sense.

Get rid of all assignments to CONFIG_<arch> symbols and clean up the
relationships between symbols and the configuration interface, like
this:

1. Remove the choice with the CONFIG_<arch> symbols in arch/Kconfig and
   turn the CONFIG_<arch> symbols into invisible
   (promptless/nonconfigurable) symbols instead.

   Getting rid of the choice allows the symbols to be 'select'ed (choice
   symbols don't support 'select').

2. Select the right CONFIG_<arch> symbol from the SOC_SERIES_* symbols.
   This makes sense since you know the architecture if you know the SoC.

   Put the select on the SOC_* symbol instead for boards that don't have
   a SOC_SERIES_*.

3. Remove all assignments to CONFIG_<arch> symbols. The assignments
   would generate errors now, since the symbols are promptless.

The change was done by grepping for assignments to CONFIG_<arch>
symbols, finding the SOC_SERIES_* (or SOC_*) symbol being set in the
same defconfig file, and putting a 'select' on it instead.

See
https://github.com/ulfalizer/zephyr/commits/hide-arch-syms-unsquashed
for a split-up version of this commit, which will make it easier to see
how stuff was done. This needs to go in as one commit though.

This change is safer than it might seem re. outstanding PRs, because any
assignment to CONFIG_<arch> symbols generates an error now, making
outdated stuff easy to catch.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-08 00:50:08 -06:00
Markus Fuchs
53e3c310b5 dts: arm: stm32f4: Add CRYP support for STM32F4xx SoC series
Add Cryptographic Accelerator support for STM32F415/417 and STM32F43x
devices.

Signed-off-by: Markus Fuchs <markus.fuchs@de.sauter-bc.com>
2020-02-07 10:45:51 -06:00
Gerson Fernando Budke
f3663292bc soc: arm: sam4s: Add spi driver support
Add device tree fixups and pinmap to enable spi driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-05 14:25:23 -06:00
Francois Ramu
612f29ee27 soc: arm: stm32g4 disable sleep mode
This patch allows successive reflashing operation
on nucleo_g431rb boards

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-02-05 13:48:15 -06:00
Gerson Fernando Budke
49ccf28242 drivers: spi: sam: Add SPI CS soc_pinmap for sam4e soc
Add SPI CS soc_pinmap definitions to enable SPI driver on sam4e series.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-05 10:14:51 -05:00
Peter Bigot
d869a6c766 drivers: gpio_imx: add support for pin validation
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.  Not all aliases appear to be present, but using instances breaks
because the ports used by different boards do not always start with
the first.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Gerson Fernando Budke
4a5de7bb87 soc: arm: atmel: Add sam4e mcu
Add sam4e related soc files.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-04 17:51:41 -05:00
Gerson Fernando Budke
f21aaeffaa soc: atmel: sam: Add spi pinmap
This add SPI pinmap definitions to spi0/1 for SAMV71 series.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-04 14:55:45 -05:00
Gerson Fernando Budke
7422cff736 drivers: spi: sam: Enable generic config
The current sam spi driver uses soc dependent name which duplicate
configuration to enable other platforms. This refactor current
definitions to a generic way to reuse symbols by multi soc definitions.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-04 14:55:45 -05:00
Gerson Fernando Budke
9e52789054 soc: arm: atmel: Add samv71 mcu
Add samv71 related soc files.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-04 08:56:19 -06:00
Henrik Brix Andersen
a28f8fbef5 soc: arm: nxp: ke1xf: add option for keeping watchdog enabled at boot
Add option for keeping the watchdog timer of the NXP Kinetis KE1xF SoC
series enabled at boot with a configurable, initial timeout.

This removes the risk of failure from when z_arm_watchdog_init()
disables the watchdog timer until the application code configures a
timeout and re-enables the watchdog timer.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-02-03 14:58:01 -08:00
Oane Kingma
fff0a2b5e7 dts / boards / soc: Add support for SiLabs Gecko watchdog
This commit adds the following:
- device tree bindings for Gecko watchdog driver
- EFM32PG SOC support for the watchdog driver
- EFM32PG board support for the watchdog driver
- DTS aliases for testing with default watchdog driver test

Signed-off-by: Oane Kingma <o.kingma@interay.com>
2020-02-03 11:25:40 -08:00
Carlo Caione
0958673ee1 arch: arm64: Enable shared IRQ line for UART
Enable the shared IRQ for the UART line and enable the remaining tasks
that depends on a separated declaration of the TX/RX/Err/... IRQs.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Carlo Caione
a61290e1a3 arch: arm64: Add support for qemu_cortex_a53 board
This patch introduces support for the qemu_cortex_a53 board emulated
using QEMU (virt platform) adding SoC, board and DTS files.

| ./scripts/sanitycheck -p qemu_cortex_a53
|
| Total complete:  190/ 190  100%  skipped:   40, failed:    0
| 150 of 150 tests passed (100.00%), 0 failed,
|     40 skipped with 0 warnings in 580.93 seconds

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Ivo Clarysse
0c8a99582e dts: arm: stm32f4: add CAN_2 controller
Add the CAN controller device tree node for CAN_2 of the STM32F4 SoC
series.

Signed-off-by: Ivo Clarysse <ivo@bcdevices.com>
2020-01-30 14:27:28 -05:00
Christian Taedcke
fbbf68d63c soc: silabs_exx32: Support all gpio ports on efm32jg and efm32pg
This commit adds the remaining gpio ports I, J and K to the device
tree and dts_fixup headers of the EFM32JG12B and EFM32PG12B SoCs.

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2020-01-30 09:15:53 -06:00
Benjamin Valentin
6fd08da96a soc: atmel_sam0: remove CONFIG_ENTROPY_NAME from dts_fixup.h
It's not needed anymore and causes build failures.

Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2020-01-30 08:44:30 -06:00
Benjamin Valentin
9f548b94cd soc: atmel_sam0: remove obsolete include
`cortex_m/exc.h` is not needed anymore and ceased to exist.

Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2020-01-30 08:44:30 -06:00
Francois Ramu
4ef62a2db7 soc: arm: st_stm32: configure stm32g431 series
This patch cleans the defconfig of the STM32G431
     device from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-01-30 08:30:15 -06:00
Francois Ramu
fafd20ca93 soc: arm: st_stm32: add stm32g474 series
This patch introduces the support of the STM32G474
     device from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-01-30 08:30:15 -06:00
Christian Taedcke
4ead400d79 arm: exx32: Add Silabs EFM32JG12B soc files
The Silicon Labs EFM32 Jade Gecko MCU includes:

    * Cortex-M3 core at 40MHz
    * up to 1024KB of flash and 256KB of RAM
    * multiple low power peripherals

This is basically the same as the EFM32 Pearl Gecko, but with an ARM
Cortex-M3 core instead of a Cortex-M4F.

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2020-01-30 07:06:54 -06:00
Scott Branden
54ce0b2d34 arm: Add Broadcom Valkyrie SoC support
Add initial support for Broadcom Valkyrie SoC as part of Zephyr.

Signed-off-by: Scott Branden <scott.branden@broadcom.com>
2020-01-30 03:54:01 -06:00
Henrik Brix Andersen
be3cb485eb soc: arm: nxp: kinetis: disable watchdog init if bootloader is enabled
Disable the early watchdog initialization for the NXP Kinetis series
if the application is to be chain-loaded by mcuboot.

The early watchdog initialization must only take place once and needs
to happen within a SoC specific number of CPU clock cycles after
reset.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-29 15:12:24 -06:00
Henrik Brix Andersen
282d85c3f4 soc: arm: nxp: kinetis: unify CONFIG_WDOG_INIT Kconfig option
Move CONFIG_WDOG_INIT for the NXP Kinetis series to the top-level
Kinetis Kconfig file and enable it where needed.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-29 15:12:24 -06:00
Henrik Brix Andersen
9523f792da soc: nxp: kinetis: kw4xz: move watchdog init to z_arm_watchdog_init
Move the NXP Kinetis KW4xZ watchdog initialization code to
z_arm_watchdog_init() and make it optional based on CONFIG_WDOG_INIT.

This brings the KW4xZ in line with the other NXP Kinetis series SoC
implementations.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-29 15:12:24 -06:00
Henrik Brix Andersen
f9f7379549 soc: nxp: kinetis: kl2x: move watchdog init to z_arm_watchdog_init
Move the NXP Kinetis KL2x watchdog initialization code to
z_arm_watchdog_init() and make it optional based on
CONFIG_WDOG_INIT.

This brings the KL2x in line with the other NXP Kinetis series SoC
implementations.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-29 15:12:24 -06:00
Kwon Tae-young
271bd8bcea soc: stm32l1: Add support for STM32 IWDG
The driver for STM32's independent watchdog already exists and is
compatible with the stm32l1 SoC. Enable the independent watchdog
for the stm32l1 series for use with this driver.

Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2020-01-29 11:20:57 -06:00
Ulf Magnusson
1b394ad153 soc: ti_simplelink: kconfig: Refactor CCFG flash block handling
Instead of having TI_CCFG_PRESENT as a symbol that's only defined in
soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.defconfig.series and y when
SOC_SERIES_CC13X2_CC26X2 is enabled, turn it into a helper symbol that's
selected by SOC_SERIES_CC13X2_CC26X2.

This avoids having a symbol that's only defined in a Kconfig.defconfig
file, which is confusing. It also makes things a bit more generic, in
case other boards with CCFGs are added.

Also rename it to HAS_TI_CCFG to be consistent with other helper
symbols, and add a help text.

Flagged by scripts/kconfig/lint.py.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-29 09:41:46 -06:00
Krzysztof Chruscinski
510102dd71 soc: arm: nordic_nrf: nrf52: Add workaround for anomaly 132
Added delay before starting low frequency clock for the first time to
ensure that anomaly conditions are not met. Delay is configurable and
might be disabled.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-01-29 15:38:55 +01:00
Andrzej Głąbek
01648cc099 Revert "soc: nrf5340: Fix busy waiting on nRF5340 application core"
This reverts commit 49bd19f3f2,
as the patch it contains is no longer needed after nrfx is updated
to version 2.1.0.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-01-29 15:00:45 +01:00
Andrzej Głąbek
7899b1f5b6 modules: hal_nordic: Update nrfx to version 2.1.0
Update the hal_nordic module revision, to switch to nrfx 2.1.0.

Because the list of peripherals for nRF5340 has changed as follows:
- SPIM2 has been renamed to SPIM4
- SPIM2-3, SPIS2-3, TWIM2-3, TWIS2-3, and UARTE2-3 have been added
a couple of related corrections needed to be applied in dts and Kconfig
files, plus the spi_nrfx_spim driver has been extended with the support
for SPIM4.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-01-29 15:00:45 +01:00
Henrik Brix Andersen
5a82424767 dts: arm: stm32f3: add can controller
Add the CAN controller device tree node for CAN_1 of the STM32F3 SoC
series.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-29 09:47:27 +01:00
Sarvesh Patkar
4f2c107389 drivers: flash: stm32: Update flash driver implementation
Remove soc/arm/st_stm32/stm32YY/flash_registers.h files.
Change register accesses in stm32 flash drivers to use FLASH_TypeDef
from modules/hal/stm32/stm32cube/stm32YYxx/soc/stm32xxxxxx.h.

Fixes #16235

Signed-off-by: Sarvesh Patkar <psarvesh314@gmail.com>
2020-01-28 15:30:12 -06:00
Francois Ramu
25700ace0a soc: arm: stm32: define the heap size when enabling dma feature
when DMA IP is enabled on stm32 series,
the heap size must be configured to large value
because of dma channels configuration.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-01-28 12:58:44 -06:00
Jose Alberto Meza
592e0afdf3 soc: arm: microchip: Update fixup for priorities
Avoid exposing unnecessary details for eSPI IRQ priorities.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-01-28 20:13:36 +02:00