Commit graph

815 commits

Author SHA1 Message Date
Jonas Eriksson
3e64e751b6 soc: stm32f1: Add support for stm32f1xx SoCs
Define stm32f100xx family, tested using stm32vl_disco
(stm32f100rb).

Signed-off-by: Jonas Eriksson <jonas@upto.se>
2020-01-28 08:30:52 -06:00
Ulf Magnusson
cf89ba33ea global: Fix up leading/trailing blank lines in files
To make the updated test in
https://github.com/zephyrproject-rtos/ci-tools/pull/121 clean, though it
only checks modified files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-27 17:41:55 -06:00
Peter Bigot
02ae343100 treewide: use full path to uart.h header
The build infrastructure should not be adding the drivers subdirectory
to the include path.  Fix the legacy uses that depended on that
addition.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-01-26 17:52:12 +01:00
Peter Bigot
5e470ec3bf treewide: use full path to gpio/gpio_mmio32.h header
The build infrastructure should not be adding the drivers subdirectory
to the include path.  Fix the legacy uses that depended on that
addition.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-01-26 17:52:12 +01:00
Henrik Brix Andersen
cd28b0b6d2 soc: arm: nxp: ke1xf: remove unused SPI dts fixups
Remove unused SPI device tree fixups from the NXP KE1xF SoC.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-24 21:31:25 -05:00
Ulf Magnusson
d28e1f6bcb kconfig: Turn pointless 'menuconfig's into 'config's
Same deal as in commit 677f1e6 ("config: Turn pointless/confusing
'menuconfig's into 'config's"), for a newly-introduced stuff.

Also clean up headers to be consistent with recent cleanups.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-24 21:30:17 -05:00
Oane Kingma
e91da4ae45 soc/arm/silabs_exx32: Add support for EFM32GG11B SoC
This commit adds support for the Silicon Labs EFM32GG11B
series of SoCs.

Signed-off-by: Oane Kingma <o.kingma@interay.com>
2020-01-24 10:28:33 -06:00
Benjamin Valentin
2539a1751d soc: atmel_sam0: update dts_fixup.h for TRNG
Update dts_fixup.h to re-use the SAM TRNG driver.

Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
2020-01-23 12:40:59 +01:00
Øyvind Rønningstad
05f0d85b6a extensions.cmake: Replace TEXT_START with ROM_START
In zephyr_linker_sources().
This is done since the point of the location is to place things at given
offsets. This can only be done consistenly if the linker code is placed
into the _first_ section.

All uses of TEXT_START are replaced with ROM_START.

ROM_START is only supported in some arches, as some arches have several
custom sections before text. These don't currently have ROM_START or
TEXT_START available, but that could be added with a bit of refactoring
in their linker script.

No SORT_KEYs are changed.

This also fixes an error introduced when TEXT_START was added, where
TEXT_SECTION_OFFSET was applied to riscv's common linker.ld instead of
to openisa_rv32m1's specific linker.ld.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-01-23 03:22:59 -08:00
Ulf Magnusson
77743741e6 soc: psoc6: kconfig: Do not select CPU_CORTEX_M_HAS_DWT on Cortex-M0
CPU_CORTEX_M_HAS_DWT depends on

    !CPU_CORTEX_M0 && !CPU_CORTEX_M0PLUS

, but SOC_SERIES_PSOC62 unconditionally selects it, even for
SOC_PSOC6_M0. This forces CPU_CORTEX_M_HAS_DWT on on Cortex-M0.

Fix it by moving the selects for CPU capabilities to the more specific
SOC_PSOC6_{M0,M4} symbols. This seems more readable than adding a
condition to the 'select CPU_CORTEX_M_HAS_DWT'.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-23 09:39:01 +01:00
Robert Lubos
65ec2d9701 boards: nrf52811_pca10056: Enable nRF 802.15.4 driver by default
nrf52811_pca10056 board should enable nRF 802.15.4 radio driver
automatically when 802.15.4 subsystem is enabled, as other Nordic
802.15.4-compliant boards do.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-01-22 14:58:40 +01:00
Henrik Brix Andersen
75549fc560 soc: arm: nxp: kinetis: k6x: enable RTC device
Enable the RTC counter present in the NXP K6x SoC if CONFIG_COUNTER is
enabled. Add the needed dts fixup for the RTC device.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-22 06:27:30 -06:00
Antony Pavlov
fc1cdf233d soc: arm: stm32l1: Add STM32L152Xe stuff
The STM32L151 and STM32L152 differ in that
the STM32L152 features an LCD controller.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2020-01-20 18:08:43 -06:00
Ioannis Glaropoulos
7fee3efd99 soc: arm: remove explicit selection of already selected symbols
CPU_CORTEX_M_HAS_SYSTICK and CPU_CORTEX_M_HAS_VTOR do not need
to be explicitely selected in SoC/Boards definitions of
platforms implementing the Cortex-M mainline architecture; they
are already selected by ARMV7_M_ARM8_M_MAINLINE Kconfig symbol.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-01-20 17:23:42 -05:00
Ioannis Glaropoulos
1d60bca3fe soc: arm: arm: Select CPU DWT feature symbol for ARM Cortex-M SoCs
The Data Watchpoint and Trace (DWT) is an optional debug unit
for the Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+)
that provides watchpoints, data tracing and system profiling
capabilities. We select it for the ARM Cortex-M SoCs
- Beetle
- Musca A, Musca B
since it is present in these SoCs.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis
155c1f5ffe soc: arm: ti_simplelink: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis
4cef583dc7 soc: arm: ti_lm3s6965: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis
88d79a49d2 soc: arm: st_stm32: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis
f9453832aa soc: arm: silabs_exx32: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis
d658883a7c soc: arm: nxp_lpc: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis
09843584ec soc: arm: nxp_kinetis: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis
16bb973044 soc: arm: nxp_imx: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis
8095cafaa1 soc: arm: nordic_nrf: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis
3d7deff3fb soc: arm: microchip_mec: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis
02090592ab soc: arm: psoc6: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis
d32546fb7e soc: arm: atmel_sam: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Kumar Gala
b1602c8e39 arm: Removed support for CC2650
The SoC, driver, and board support for the CC2650 and CC2650 Sensortag
aren't currently supported and we are removing them as such.  If anyone
is interesting in supporting this platform we can easily recovery it
from git.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-01-18 09:27:55 -06:00
Ulf Magnusson
4e85006ba4 dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf}
generated_dts_board.h is pretty redundant and confusing as a name. Call
it devicetree.h instead.

dts.h would be another option, but DTS stands for "devicetree source"
and is the source code format, so it's a bit confusing too.

The replacement was done by grepping for 'generated_dts_board' and
'GENERATED_DTS_BOARD'.

Two build diagram and input-output SVG files were updated as well, along
with misc. documentation.

hal_ti, mcuboot, and ci-tools updates are included too, in the west.yml
update.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-17 17:57:59 +01:00
Henrik Brix Andersen
774367b14a soc: nxp: k6x: enable bandgap buffer if temperature sensor is enabled
Enable the bandgap buffer on the NXP Kinetis K6x SoC series Power
Management Controller (PMC) if the internal temperature sensor is in
use.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-16 17:30:42 -06:00
Roland Ma
b0bdf91e11 boards: arm: Add board definition for stm32 nucleo_f767zi
Added board definition additions for stm32 nucleo_f767zi
board.

Signed-off-by: Roland Ma <rolandma@yahoo.com>
2020-01-16 22:51:13 +01:00
Roland Ma
01049b73be dts: arm: st: Add dts and soc additions for stm32 F767ZI board
Added dts additions for stm32 nucleo f767zi board, also added
and modified soc addtions for thet board.
Updated dts reference file name.
Updated yaml to take out adc for now.

Signed-off-by: Roland Ma <rolandma@yahoo.com>
2020-01-16 22:51:13 +01:00
Andrei Gansari
c9301ad8a3 soc: enables flash on LPC55xxx SoCs
Enables IAP Flash Controller device on LPC55xxx SoCs.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2020-01-16 08:19:46 -06:00
Maureen Helm
ee65932c96 drivers: watchdog: Refactor mcux wdog driver to use generated dts macros
Refactors the mcux wdog driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-15 18:02:19 -05:00
Maureen Helm
9329c0db27 drivers: counter: Refactor mcux rtc driver to use generated dts macros
Refactors the mcux rtc driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-15 18:02:19 -05:00
Maureen Helm
94c5a75998 drivers: spi: Refactor mcux dspi driver to use generated dts macros
Refactors the mcux dspi driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-15 18:02:19 -05:00
Maureen Helm
93b457f4da drivers: serial: Refactor mcux lpsci driver to use generated dts macros
Refactors the mcux lpsci driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt and kinetis
socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-15 18:02:19 -05:00
Maureen Helm
5df8b5d63e drivers: serial: Refactor mcux uart driver to use generated dts macros
Refactors the mcux uart driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-15 18:02:19 -05:00
Maureen Helm
806813bb6a drivers: i2c: Refactor mcux i2c driver to use generated dts macros
Refactors the mcux lpi2c driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-15 18:02:19 -05:00
Maureen Helm
c0e2c6369b soc: nxp_imx: Fix counter_basic_api test for i.mx rt boards
The counter_basic_api test was broken for i.mx rt boards when we
refactored the mcux gpt driver to use generated device tree macros in
commit b8ad9969ef.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-15 11:30:44 -05:00
Håkon Øye Amundsen
e3da8cc18c soc: nordic: add HAS_HW_NRF_ACL for nrf53 net core
The network core has the ACL peripheral, reflect this in the
SoC kconfig.

Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
2020-01-15 14:13:05 +01:00
Maureen Helm
b541962cce soc: nxp_kinetis: Remove extra blank line at end of ke1xf dts fixup
Removes an extra blank line at the end of the ke1xf device tree fixup
file.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-14 11:10:27 -05:00
Maureen Helm
b8ad9969ef drivers: counter: Refactor mcux gpt driver to use generated dts macros
Refactors the mcux gpt driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-14 11:10:27 -05:00
Maureen Helm
9e14543c19 drivers: gpio: Refactor mcux igpio driver to use generated dts macros
Refactors the mcux igpio driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-14 11:10:27 -05:00
Maureen Helm
a2082303b8 drivers: serial: Refactor mcux lpuart driver to use generated dts macros
Refactors the mcux lpuart driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt and kinetis
socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-14 11:10:27 -05:00
Maureen Helm
7242660399 drivers: i2c: Refactor mcux lpi2c driver to use generated dts macros
Refactors the mcux lpi2c driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt and kinetis
socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-14 11:10:27 -05:00
Vincent Wan
ce90e24d25 kconfig: deprecate TI cc2650_sensortag and cc2650 SoC
Adding Kconfig settings to warn anyone trying to build for this
platform of its pending deprecation in 2.2.0.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-01-13 10:21:12 -05:00
Christian Taedcke
20aa2bcf05 boards: efr32_slwstk6061a: Add support for spi nor flash
This commit adds support for the on-board flash MX25R8035F that is
directly connected to the efr32fg soc.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2020-01-10 07:14:35 -06:00
Christian Taedcke
0201d182a8 boards: efr32mg_sltb004a: Add support for spi nor flash
This commit adds support for the on-board flash MX25R8035F that is
directly connected to the efr32mg soc.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2020-01-10 07:14:35 -06:00
Marcin Szymczyk
2d6c6959f9 soc: nrf91: add power management
Only System OFF mode is supported.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2020-01-10 13:09:44 +01:00
Marcin Szymczyk
32b3ab2354 soc: nrf53: add power management
Only System OFF mode is supported.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2020-01-10 13:09:44 +01:00