Commit graph

5955 commits

Author SHA1 Message Date
Alexandre Rey
59a23b57f6 soc: mcxn547: add support for MCXN547
Add MCXN547 support

Signed-off-by: Alexandre Rey <alexandre.rey@swisstiming.com>
2025-05-21 19:56:47 +02:00
Francois Ramu
ad0466f423 soc: st: stm32 Kconfig to retrieve the external Flash Base address
This commit is retrieving the config FLASH_BASE_ADDRESS
from the XSPI node of the stm32 device dtsi <reg> property of the
"st,stm32-xspi" node. For example the CONFIG_FLASH_BASE_ADDRESS
 is 0x90000000 and application is linked for that address.
Size is given by the size property of the "st,stm32-xspi-nor" node.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-05-21 17:35:06 +02:00
Chun-Chieh Li
369f15d8c9 soc: nuvoton: numaker: m55m1x: support mve feature
Nuvoton M55M1 series supports M-profile Vector Extension (MVE) (also
known as Arm Helium technology). This enables compute applications
such as DSP and machine learning.

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-05-21 12:35:40 +02:00
Alberto Escolar Piedras
448eac13d4 soc/ambiq/apollo5x: Fix code compliance issues
Fix issues detected by checkpatch

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-05-21 12:35:28 +02:00
Saravanan Sekar
258cc7e9cf drivers: pinctrl: mspm0: Add a pinctrl driver for TI MSPM0
Added a pinctrl driver support for MSPM0 Family.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Signed-off-by: Jackson Farley <j-farley@ti.com>
2025-05-21 08:04:32 +02:00
Saravanan Sekar
51bb5ddde4 drivers: clock: ti: Add initial support TI MSPM0 clock module
Add initial support TI MSPM0 clock module

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Signed-off-by: Jackson Farley <j-farley@ti.com>
2025-05-21 08:04:32 +02:00
Saravanan Sekar
ce2c8f2b99 soc: mspm0: Add a support for TI MSPM0-G series SoC
Add a support for Texas Instruments MSPM0 fmaily and
MSPM0-G series SoC.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Signed-off-by: Jackson Farley <j-farley@ti.com>
2025-05-21 08:04:32 +02:00
Sadik Ozer
367cd74ed1 soc: Add the MAX32657 NS Peripheral
This commit adds MAX32657 Non-Secure peripheral support

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2025-05-21 08:01:25 +02:00
Peter Wang
dd1bc2434a boards: frdm_mcxa166, frdm_mcxa276: add hwinfo reset_cause support
1. enable hwinfo support
   - get_reset_cause
   - get_supported_reset_cause
   - clear_reset_cause
2. verified tests/drivers/hwinfo

Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
2025-05-20 18:27:56 +02:00
Krzysztof Chruściński
08d327d595 soc: nordic: nrf54h: Fix s2ram
Cache was not enabled when s2ram did not completed which
lead to system malfunction. Always power up cache when
returning from s2ram function.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-05-20 16:08:39 +01:00
Marcin Szymczyk
fe1b0e31b7 soc: nordic: allow setting VPR_LAUNCHER support for out of tree SoCs
Make the compilation of vpr_launcher dependent on sysbuild Kconfig
that can be set by SoC.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2025-05-20 15:24:58 +02:00
Arunmani Alagarsamy
2844850de8 soc: silabs: siwg917: Refactor siwx91x_get_nwp_config
Refactor siwx91x_get_nwp_config function to reduce its
Cognitive Complexity from 34 to below the allowed limit of 25
as per SonarQube guidelines. Extracted configuration logic into
smaller helper functions.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-05-20 15:24:06 +02:00
Arunmani Alagarsamy
88846ddc81 drivers: wifi: siwx91x: Add Wi-Fi mgmt events
- Implement event handling for AP and STA modes
- Enable configurations for security (PSK), aggregation,
  and hidden PSK credentials

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-05-20 15:24:06 +02:00
Arunmani Alagarsamy
4c1a91fa63 drivers: wifi: siwx91x: Enable AP configuration support
- Adds support for configuring client maximum inactivity timeout.
- Adds support for bandwidth, It supports 20MHZ only.
- Adds support for setting the maximum number of clients and
  hidden SSID mode by rebooting the NWP device.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-05-20 15:24:06 +02:00
Arunmani Alagarsamy
0459bd8638 drivers: wifi: siwx91x: Replace opermode flags
Replaced SL_SI91X_CLIENT_MODE and SL_SI91X_ACCESS_POINT_MODE with
WIFI_STA_MODE and WIFI_SOFTAP_MODE, respectively, for AP configuration
command intergration.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-05-20 15:24:06 +02:00
Oleh Kravchenko
4f69acc3d4 soc: stm32f1x: Add support for stop/standby modes
Add config and overlay to samples for testing stop/standby modes:

- samples/boards/st/power_mgmt/blinky
- samples/boards/st/power_mgmt/wkup_pins

I've measured consumption for each low-power mode:
- stop (regulator in run mode) ~217 uA
- stop (regulator in low-power mode) ~206 uA
- standby mode ~3.5 uA

Low-power mode wakeup timings from the datasheet,
but it barely meets these in reality:
- stop (regulator in run mode) 3.6 us
- stop (regulator in low-power mode) 5.4 us
- standby 50 us

It's possible to use RTC as idle timer to exit from stop mode.

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
2025-05-20 10:16:20 +02:00
Martin Hoff
ea95e2d7f0 soc: silabs: siwx91x: add missing kconfig for ns16550 driver variant
The ns16550 UART driver has multiple variant Kconfig options. To
successfully run the uart_basic_api test, the correct variant must be
selected. This commit adds the missing Kconfig option.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-05-19 16:36:21 +02:00
Appana Durga Kedareswara rao
4f6b48ee6c soc: amd: Add support for AMD Versal Gen 2 RPU
Add support for the RPU, real-time processing unit on Versal Gen 2 SoC.
It is based on Cortext-R52 processor.

The patch contains initial wiring and configuration for generic board
with OCM(1MB) and DDR(2G) memories, cpu, interrupt controller, global
timer and UART.

versal2.dtsi contains common peripherals integrated into Versal Gen 2
SoC, and versal2_r52.dtsi has peripherals which are private to
Cortex-R52 processor.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
2025-05-19 13:32:09 +02:00
Camille BAUD
7521971de8 dts: bflb: Enable efuse driver on bl60x
This enables the driver by default, it will be needed at init in the future

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-05-19 10:11:58 +02:00
Yunshao Chiang
8f8b223ff2 drivers: crypto: add it51xxx sha256 driver
Implement a crypto sha256 driver for it51xxx series.

Signed-off-by: Yunshao Chiang <Yunshao.Chiang@ite.com.tw>
2025-05-16 19:07:37 +02:00
Chun-Chieh Li
7095608f7c drivers: usb: udc: support numaker m55m1x series soc
This supports nuvoton numaker m55m1x series soc. Besides, it also
has relevant modifications, including:
1. Fix failure to enable HICR48M, which is to clock usbd and phy
2. Support HWINFO for USB device serial number

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-05-16 16:11:54 +02:00
Anas Nashif
7e47227d87 boards: max10/nios2: remove remaining boards/socs
Remove remaining nios2 based boards and soc files.

Part of #89280

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-05-15 20:01:05 -04:00
Anas Nashif
d881fb334b boards: qemu_nios2: drop board definition
Remove qemu_nios2, more removals will follow.

Part of #89280

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-05-15 20:01:05 -04:00
Adrian Bonislawski
7918839ddd intel_adsp: ace30: Bring up ACE 3.0 (WCL)
This commit adds definition of ACE 3.0 Wildcat Lake board

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2025-05-15 22:14:44 +02:00
Manuel Aebischer
da6f39172f rp2350: Only add IMAGE_DEF for apps at start of flash.
The image_def header shall not be added to apps that are booted by a
bootloader, e.g. mcuboot. Added proper handling for UF2 by hanan619.

Signed-off-by: Manuel Aebischer <manuel.aebischer@belden.com>
2025-05-15 22:14:01 +02:00
Martin Hoff
cfb0a80df4 dts: arm: silabs: change siwg917 board ram start address
The first 1 KB is reserved for the NWP (Network Coprocessor). This
change also resolves the null pointer error issue, as a .data or a
_ramfunc might get the address 0x0.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-05-15 17:54:02 +02:00
Muzaffar Ahmed
a73f20214a drivers: wifi: siwx91x: Fix boot_config
Enable and rearrange some features in the boot config.

Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
2025-05-15 16:16:54 +02:00
Muzaffar Ahmed
d6e106b5f0 drivers: wifi: siwx91x: Introduce flag for LIMIT_PACKET_BUF_PER_STA
Introduced WIFI_SILABS_SIWX91X_LIMIT_PACKET_BUF_PER_STA.
This flag limits packet queues in AP mode.

Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
2025-05-15 16:16:54 +02:00
Jhan BoChao
7450a5249d driver: flash: add flash driver for rts5912
add flash driver for rts5912.

Signed-off-by: Jhan BoChao <jhan_bo_chao@realtek.com>
2025-05-15 11:18:22 +02:00
Harris Tomy
e31a6be0b0 soc: st: add stm32u535 support
Adds the u535 soc, similar to the u545 except without the AES HW
accelerator

signed-off-by: Harris Tomy <harristomy@gmail.com>
2025-05-14 19:36:26 +02:00
Aksel Skauge Mellbye
6a7cbff9b2 soc: silabs: siwx91x: Initialize NWP sufficiently early
The NWP provides Bluetooth, Wi-Fi and crypto services, and must
be initialized before any users of these. Mbed TLS is initialized
at priority level 40 (kernel default priority), ensure that the
NWP is initialized before that.

Make the priority configurable to allow users to tweak the init
sequence.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-05-14 16:27:27 +02:00
Bjarki Arge Andreasen
9dfeaf2054 soc: nordic: nrf54h: gpd: select PINCTRL
Select PINCTRL if SOC_NRF54H20_GPD is selected as it is dependent
on it.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-05-14 16:27:10 +02:00
Daniel Schultz
3112f856d2 soc: Add aesc
Currently, the only available platform is Nitrogen, featuring a
VexRiscv CPU that boots from external SPI flash and runs code from
external HyperRAM.

Signed-off-by: Daniel Schultz <dnltz@aesc-silicon.de>
2025-05-14 14:09:41 +02:00
Sudan Landge
8c02ffc6dd arch: arm: enable pxn support at arch level
Move PXN support selection to arch so that it is enabled
for all Armv8.1-m socs.

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-05-14 14:09:31 +02:00
Camille BAUD
72dadd3242 soc: wch: Introduce Qingke V4B
Introduces the Soc for ch32v203

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-05-14 11:02:52 +01:00
Martin Hoff
a05506a256 soc: silabs: add missing kconfig resource for siwx91x
Fixes the missing Kconfig resource for the siwx91x SoC. This ensures
that soc_early_init_hook function is correctly called for the siwg917
SoC during initialization.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-05-13 22:19:16 -04:00
Alberto Escolar Piedras
e32b98c3a1 soc posix: Be explicit about wanting the function address
To be more readable

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-05-13 12:09:30 +02:00
Michał Stasiak
63f2fe9dd4 soc: nordic: nrf54l: Clean up internal capacitance calculations.
Code responsible for internal capacitor values containted
leftover workarounds in the calculations after PS update.
Removed redundant conversions and cleaned up both code
and comments to align both LFXO and HFXO calculation.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-05-13 10:06:01 +02:00
Jiafei Pan
6e72749c64 soc: imx93: a55: add empty soc.h
Some drivers need header file soc.h, according to Zephyr SoC Porting Guide
soc.h must be provided for each SoC, so created an empty one.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-05-12 16:47:49 +02:00
Camille BAUD
bab50a55de dts: wch: Enable using whole flash with CH32V208
Enables using the whole flash on CH32V208
This also involves limiting frequency of the CPU to 120Mhz
from 144Mhz to meet recommendations.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-05-12 16:47:33 +02:00
Nikodem Kastelik
566b3c0002 soc: nordic: nrf54l: remove workaround for nRF54L anomaly 31
MDK 8.69.1 included in nrfx 3.10 already applies the workaround,
so there is no need to do it again.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2025-05-12 14:53:51 +02:00
Alvis Sun
d0e488e071 drivers: pinctrl: npcx: add pinctrl driver support for npck3
As title.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2025-05-12 13:30:46 +02:00
Carles Cufi
32047d3938 soc: nordic: nrf54h: Remove external square wave
This option is no longer present in the Datasheet, remove it from the
BICR JSON file.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-05-09 14:01:58 +02:00
Swift Tian
443b7012d7 soc: ambiq: fix potential issues
1. fix compile issue when CONFIG_DCACHE=n
2. check null in buf_in_nocache

Signed-off-by: Swift Tian <swift.tian@ambiq.com>
2025-05-09 12:51:42 +02:00
Declan Snyder
ddce1e1c67 soc: nxp: rw: Policy constraints when PM2 enabled
When PM2 is enabled, it will disable many of the devices, so need to
enable PM policy constraints for this mode also so that device drivers
can work.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-05-09 01:41:05 +02:00
64067e5d6a soc: wch: add the CH32V00x series
Compared to the CH32V003, the CH32V00x series is an evolution that
uses a different microarchitecture (V2C instead of V2A) and different
pinctrl mappings.

Fork the current qingke_v2a and use the new proposed naming convention.

Signed-off-by: Michael Hope <michaelh@juju.nz>
2025-05-09 01:40:22 +02:00
Emilio Benavente
5fd6715917 drivers: watchdog: Added Driver for the EWM
Added a driver for the External Watchdog Driver

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2025-05-09 01:39:56 +02:00
Torsten Rasmussen
c79c4ef9a8 linker: move last section id constant to c-code
Move creation of last section id from ld linker script LONG() usage to
C code with last section attribute.

The use of `LONG()` works correctly with ld but lld emits a warning
because .last_section section is not allocated as there are no matching
input sections and discards the `LONG()` call, meaning the last section
identifier will not be present in the flash.
> ld.lld: warning: ignoring memory region assignment for
>                             non-allocatable section '.last_section'

Placing the last section id in `.last_section` in C code makes lld
allocate the memory for the id and thereby create the output section
with the correct output.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2025-05-08 15:55:40 +02:00
Amneesh Singh
c4dcb17637 soc: ti: k3: am6x: do not override KERNEL_ENTRY
The SOC defconfig overrides CONFIG_KERNEL_ENTRY from the default of
__start to _vector_table. This is undesirable for cores such as M4 where
the _vector_table symbol has just raw addresses and no instructions. The
change was done to make sure Zephyr images can be loaded via remoteproc in
which case the entrypoint needs to be 64 byte aligned. To fix this, use
_vector_table as the ELF entrypoint only for R5 cores.

Signed-off-by: Amneesh Singh <a-singh7@ti.com>
2025-05-08 12:24:56 +02:00
Conny Marco Menebröcker
fa53d93107 soc: add stm32l100xb
This patch adds support for the stm32l100 SoC. Tested on private board.

Signed-off-by: Conny Marco Menebröcker <c-m-m@gmx.de>
2025-05-08 01:57:52 +02:00