Fix build error when CONFIG_MCUX_COMPONENT_driver.fro_calib is set.
Error message:
modules/hal/nxp/mcux/mcux-sdk-ng/cmake/extension/function.cmake:2084 (if)
if given arguments:
"IN_LIST" "NEED_WRAP_TOOLCHAINS"
The error is because, mcux sdk ng cmake functions `mcux_add_xxx` support
add content based on toolchains. CMake should set current toolchain in
CMake Variable `CONFIG_TOOLCHAIN` to use this feature.
Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
In MCUX SDK NG, the `core_id` and `core_id_suffix_name` are
different concepts, generally the values are the same. But
there are exeptions, such as RT595 F1.
Zephyr's `CONFIG_MCUX_CORE_SUFFIX` is actually MCUX SDK's
`core_id_suffix_name`. SDK NG CMake needs `core_id`, but
current integration layer uses `CONFIG_MCUX_CORE_SUFFIX`
as `core_id`, so there is build error with RT595 F1.
Fix the code that convert `CONFIG_MCUX_CORE_SUFFIX` to `core_id`,
handle the special case.
Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
Adapt MAX32690 driver to use Wrap_MXC_CAN_Init to handle differences
in the MSDK API (see analogdevicesinc/msdk#1306) between the
MAX32690 and MAX32662.
can_driver_api.timing_min required phase_seg1 >= 3 and phase_seg2 >= 2
when configuring CAN bit timing. Both microcontrollers covered by this
driver (MAX32662, MAX32690) support values down to 1 for both of these
timing parameters.
Refer to the docs for registers CAN_BUSTIM1, CANn_BUSTIM1.
Add a can0 node to the MAX32662 dtsi.
Signed-off-by: Ioan Dragomir <ioan.dragomir@analog.com>
Currently, the `display_read_write` test execution can be suppressed
by `harness: display`, but since the display harness does not exist,
there is no way to run tests.
Using a fixture, it will be possible only to build if not specified,
and run tests if specified.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Drop this redundant check that was likely meant to be checking that Z
field is zero but in the case of reception the RFC says it MUST be
ignored anyway.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
When CONFIG_NO_OPTIMIZATIONS the compiler will not inline
socket_offload_dns_is_enabled(), which means calls to
socket_offload* remain, and the linker will fail with
in function `zsock_getaddrinfo': undefined reference to
`socket_offload_getaddrinfo'
in function `zsock_freeaddrinfo': undefined reference to
`socket_offload_freeaddrinfo'
Instead of relaying on that function being inlined and the
if'ed code being removed, let's just use the preprocessor.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add external HSPI flash on STM32U5G9J-DK2
Use external loader to flash it with STM32CubeProgrammer
Signed-off-by: Mathias Markussen <mathias.markussen@st.com>
- with the updates made to the spi_ll_stm32 driver,
we no longer need to configure the 16-bit frame/word size
in the DTS overlay file. The test_spi_word_size_16 testsuite
helps us verify the 16-bit frame mode supported on
the ST platform.
- remove testcases that use thoses files in testcase.yaml
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Update the source_data and dest_data sizes with the frame size
in bytes before performing the transfer.
With these changes, we can handle cases where the buffers switch
between 8-bit and 16-bit modes.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Workaround to avoid getting the -EFAULT (14) error when running
the test_spi_word_size_x (x = 7, 9, 24) test cases:
Since these testcase configurations aren't supported, update
the error type to ENOTSUP to allow skipping the test cases using ztest.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Place transfer buffers in non-cacheable memory when
CONFIG_NOCACHE_MEMORY=y. This change ensures that DMA transfer
buffers are allocated in non-cacheable memory on platforms where
CONFIG_NOCACHE_MEMORY is enabled. This avoids potential cache
coherence issues that are not handled by the SPI driver.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Set a convenient latency for each platform, since each platform
reacts differently to the driver.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
The driver treats the `source_data_size` and `dest_data_size` as a
width in bits and converts 8 bits to 1, 16 bits to 2, and 32 bits to 3.
This should be a width in bytes with 1 byte mapping to 0, 2 bytes to
1, and 4 bytes to 3.
Note that this preserves the current behaviour of silently accepting
invalid transfer bit widths.
Signed-off-by: Michael Hope <michaelh@juju.nz>
This adds `tests/drivers/dma/chan_blen_transfer` and
`tests/drivers/dma/loop_transfer` as build tests to any manual Twister
run.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Sets LinkServer as the default runner for the mimxrt1060-evk board,
as the board is configured for CMSIS-DAP by default.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
Add minimal support for Renesas RZ/V2N-EVK
Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Add devicetree to support for Renesas RZ/V2N
Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Add initial support for Renesas RZ/V2N
Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Introduce the stm32u3 serie to the the existing flash driver
It is based on the stm32l5 model.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
Implement conditional compilation to avoid the warning:
- Use LL_PWR_EnableVDDIO2() for STM32U3 series.
- Use LL_PWR_EnableVddIO2() for other series.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
Add documentation for am243x_evm and while at it, add the openocd
configuration as well.
Co-authored-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
Add SoC support and device trees for Texas Instruments AM2434 SoC. Both R5
and M4 cores are supported here.
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
Some devices have multiple pinctrl regions; for instance, main pinctrl and
mcu pinctrl. Currently there can only be a single pinctrl instance picked
form a DT label. This patch makes the pinctrl driver initialise one
instance for each node with correct compatible string.
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
