Assignments have no effect on promptless symbols. Flagged by
https://github.com/zephyrproject-rtos/zephyr/pull/20742.
This symbol is enabled through being select'ed.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Defines device tree aliases for on-chip peripherals at the soc level
instead of the board level for all lpc socs. The eliminates some
duplicate code in the board level device trees, and will allow drivers
to use device-tree generated macros directly instead of through dts
fixups.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Defines device tree aliases for on-chip peripherals at the soc level
instead of the board level for all i.mx 6/7 socs. The eliminates some
duplicate code in the board level device trees, and will allow drivers
to use device-tree generated macros directly instead of through dts
fixups.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Defines device tree aliases for on-chip peripherals at the soc level
instead of the board level for all i.mx rt socs. The eliminates some
duplicate code in the board level device trees, and will allow drivers
to use device-tree generated macros directly instead of through dts
fixups.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adding Kconfig settings to warn anyone trying to build for this
platform of its pending deprecation in 2.2.0.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
The DT_INST_* defines for the PWM controllers enabled in the device
tree are always defined causing the LED pins to always be set as PWM
outputs in the pinmux. Revert to using CONFIG_PWM_* for pinmux
configuration for now.
This reverts commit eb42a24dc6.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Defines device tree aliases for on-chip peripherals at the soc level
instead of the board level for all kinetis socs. The eliminates some
duplicate code in the board level device trees, and will allow drivers
to use device-tree generated macros directly instead of through dts
fixups.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add SPI CS GPIO line to reel_board device tree. This is needed to make
the board work with Arduino SPI compatible shields.
Tested on reel_board (1507.1) and reel_board_v2 (1507.2).
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
We move the SRAM partition that is used as shared memory with
the Network MCU to the upper part of the Application MCU
memory. In this case we can allocate all lower SRAM to the
application, if we are building a Zephyr image without
support for Trusted Execution.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
With this commit we introduce SRAM partitioning for nRF5340
Application MCU. We define fixed partitions for the Secure
and the Non-Secure images, when building with trusted
execution environment enabled (Secure and Non-Secure images).
For (Secure image) builds without trusted execution environment
enabled we now allocate all available Application MCU SRAM into
the single image, except for the SRAM being used as shared memory
with the Network MCU.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The virtual COM port of the STlink in the Nucleo board is connected to
LPUART1, but the board was configured to use UART1 instead. For this
reason, hello world sample did not work.
In addition to that, PA2 was assigned to both LPUART1 and UART2. UART2
TX is now muxed to PA14.
Signed-off-by: Martin Jaeger <17674105+martinjaeger@users.noreply.github.com>
On nucleo_g071rb, flashing using pyocd requested to hold reset button
during flashing operation.
Using newly available pyocd arguments this is no more needed and
nucleo_g071rb can now be flashed in a fully automated way.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit adds support for the on-board flash MX25R8035F that is
directly connected to the efr32fg soc.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
This commit adds support for the on-board flash MX25R8035F that is
directly connected to the efr32mg soc.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Add board support files for mimxrt1010_evk, the development board for
i.MXRT1010 (CM7) SoC.
- Add pinmux, dts and doc.
- Tested samples: hello_world, philosophers, synchronization,
basic/blinky, basic/button.
Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
EEPROM simulator and native_posix have been unified to one solution,
the old eeprom,native_posix is removed.
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
Add support for a eeprom simulator. The PR limits the addition to
qemu_x86 but it can easily be added to other devices by defining the
eeprom simulator in the dts and setting 'CONFIG_EEPROM_SIMULATOR=y'
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add shield definition for the Texas Instruments LMP90100 Sensor Analog
Frontend (AFE) Evaluation Board (EVB).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for specifying PWM flags for the NXP Kinetis FlexTimer
(FTM) PWM driver through the device tree.
All in-tree clients of this PWM controller are active-low LEDs.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The SRAM address and size are currently available as both
DT_SRAM_{BASE_ADDRESS,SIZE} and as CONFIG_SRAM_{BASE_ADDRESS,SIZE} (via
the Kconfig preprocessor).
Use the CONFIG_SRAM_* versions everywhere, and remove generation of the
DT_SRAM_* versions from gen_defines.py.
The Kconfig symbols currently depend on 'ARC || ARM || NIOS2 || X86'.
Not sure why, so I removed it.
It looks like no configuration files set CONFIG_SRAM_* at the moment, so
another option might be to use the DT_* symbols everywhere instead. Some
Kconfig.defconfig.series files add defaults to them though.
Also improve the help texts for CONFIG_SRAM_* to say that they normally
come from devicetree rather than configuration files.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This commit removes the ignore tags for the tests that work after the
changes in the PR #20267.
In the future, this ignored testing tag list will be further reduced
as critical bugs for the qemu_cortex_r5 platform are addressed
(see #20217).
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The Xilinx ZynqMP SoC embeds both Cortex-R "RPU" and Cortex-A "APU"
cores.
Since the current Zephyr architecture cannot support AMP of Cortex-R
and Cortex-A within the same project, the RPU and APU should be
considered separate platforms and handled accordingly.
This commit re-purposes the SOC_XILINX_ZYNQMP symbol as a helper symbol
indicating that Xilinx ZynqMP SoC is used, and adds a new symbol,
SOC_XILINX_ZYNQMP_RPU, for specifying the actual build target platform.
When Cortex-A support is added in the future, SOC_XILINX_ZYNQMP_APU
symbol should be added and used to conditionally handle APU-specific
code.
For more details, refer to the issue #20217.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
ZynqMP SoC embeds two separate processor types: Cortex-R for RPU and
Cortex-A for APU.
Since the current Zephyr architecture cannot support AMP of Cortex-R
and Cortex-A within one project, the RPU and APU should be considered
separate platforms.
This commit relocates the device tree nodes that are not common between
RPU and APU to a separate dtsi file (zynqmp_rpu.dtsi).
When Cortex-A53 APU support is added in the future, an additional dtsi
file (zynqmp_apu.dtsi) for specifying the APU device tree should be
added.
For more details, refer to the issue #20217.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Based on this commit
| commit dd6186f299
| Author: Bobby Noelte <b0661n0e17e@gmail.com>
| Date: Sat Sep 30 18:24:46 2017 +0200
|
| boards: nucleo_f030r8: reduce kernel memory usage
|
| nucleo_f030r8 fails in CI because applications need
| more RAM.
|
| Reduce kernel memory used by stacks and ISR vector table.
|
| Fixes#3923
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
This enables LiteX PRBS random number generator driver
for litex_vexriscv board.
Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Enable the NXP FTM PWM outputs in the board pinmux files based on the
DT_INST_* defines instead of CONFIG_PWM_* to match the pwm_mcux_ftm
driver.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the NXP FTM instances in the KE1xF SoC to PWM to match the
other SoCs/boards using the FlexTimer as PWM generator.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
At the moment we have different images for
for Nucleo F030R8 and Nucleo F070RB boards,
the images have the same pixel size but different
file formats, e.g:
NAMES="f030r8 f070rb"
for i in $NAMES; do
file boards/arm/nucleo_$i/doc/img/nucleo_$i.jpg;
done
boards/arm/nucleo_f030r8/doc/img/nucleo_f030r8.jpg: JPEG image
data, Exif standard: [TIFF image data, little-endian,
direntries=0], baseline, precision 8, 500x367, frames 3
boards/arm/nucleo_f070rb/doc/img/nucleo_f070rb.jpg: JPEG image
data, JFIF standard 1.01, aspect ratio, density 1x1,
segment length 16, progressive, precision 8, 500x367, frames 3
The nucleo_f030r8.jpg file is larger:
for i in $NAMES; do
ls -1 -sh boards/arm/nucleo_$i/doc/img/nucleo_$i.jpg;
done
128K boards/arm/nucleo_f030r8/doc/img/nucleo_f030r8.jpg
40K boards/arm/nucleo_f070rb/doc/img/nucleo_f070rb.jpg
Applying simultaneous black/white threshold to the images
and comparing them with imagemagick tools shows that
the images have no significant difference.
for i in $NAMES; do
convert boards/arm/nucleo_$i/doc/img/nucleo_$i.jpg \
-threshold 80% /tmp/$i.png;
done
compare $(for i in $NAMES; do echo -n "/tmp/$i.png "; done) \
-compose src /tmp/diff.png
See also 'boards: arm: unify Nucleo-64 boards connectors image'
(https://github.com/zephyrproject-rtos/zephyr/pull/15926).
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
This patchset enables USART3 on the 96Boards STM32 Mezzanine.
It is broken out to J10 Grove Connector.
Changes:
- Enabled USART3 in board dts.
- Updated board index.rst with uart pinouts.
- soc dtsi: enabled usart3.
Test: Tested USART3 as console at 115200 baud
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Move adafruit_2_8_tft_touch_v2 to Kconfig.defconfig format.
As part of this change Kconfig flags SPI and DISPLAY are removed
from the shield configuration as they are part of application
configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move dfrobot_can_bus_v2_0 to Kcondig.shield foramt and as part of
this change introduce nrf52_pca10040 board specific configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
