Commit graph

2956 commits

Author SHA1 Message Date
Emil Obalski
82c6d7c415 boards: nordic: Add support for nRF52833_pca10100 board
This commit adds support for nRF52833 development board.
Changes afffects:
 - Introduce files related to board description.
 - Add blank documentation file (for future update).
 - configuration files for build process.

Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
2019-11-13 10:33:38 -06:00
Francois Ramu
02ff0e45a2 boards: arm: st_stm32: add lptimer to nucleo_wb55rg board
This patch introduces the support of the LowPower Timer
     for the STM32WBxx from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-11-13 10:31:06 -06:00
Alexander Wachter
2302d2615b boards: olimexino_stm32: Enable CAN support for this board
This commit enables CAN support for the Olimexino STM32 board.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-11-13 10:30:19 -06:00
Anas Nashif
c724033acc west: prepend -c to openocd commands
commit 0df4a53107 changed the behavior of
how openocd commands are passed to openocd. We used to add -c to each
command, now the commands are being added without -c causing an error.

This adds "-c" to all commands instead of just passing a list.

Also fixes #20449.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2019-11-12 14:37:34 -05:00
Peter A. Bigot
920d477264 dts: jedec,spi-nor: add support for deep-power-down specification
Provide information required to allow the driver to put the flash chip
into a deep power down mode.  This can reduce standby current by as
much as 90%.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-11-09 15:26:06 +01:00
Peter A. Bigot
f83ad78261 dts: jedec,spi-nor: require size property
The SPI NOR driver requires that the size (in bits) be provided in the
devicetree node.  Update the binding to make the property required,
and update all nodes based on the memory chip identified.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-11-09 15:26:06 +01:00
Andrew Boie
1c97851726 x86: enable MMU on 64-bit with SMP
The races are believed to be resolved with the patch to
irq_offload(). Allow the MMU to be turned on and enable
it for qemu_x86_64.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-11-08 15:16:43 -08:00
Ioannis Glaropoulos
38216b100c boards: nrf5340_dk_nrf5340: boot Network MCU from Application MCU
We add the functionality that allows the nRF5340 Application
MCU to boot the Network MCU by releasing the RESET line. The
Application MCU may optionally allocate and corfigure resources
that the Network MCU is going to use (currently GPIO and secure
attribution) if running in secure mode. Non-Secure Application
MCU firmware can only issue Network MCU resets.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-11-08 21:45:27 +01:00
Ioannis Glaropoulos
b0c8293bf8 boards: arm: nrf5340 dk: add documentation for nRF5340 DK board
We add supportive documentation for the nRF5340 DK board.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-11-08 19:26:35 +01:00
Ioannis Glaropoulos
2c2e2b678b boards: nrf5340_dk_nrf5340: enable BT CTLR if building with BT
When building with support for BLE stack, enable
the BLE Controller module for the nRF5340 DK NRF5340
CPUNET (Network MCU).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-11-08 19:26:35 +01:00
Gaute Gamnes
32e85adc26 boards: arm: nordic: nRF5340_dk_nrf5340_cpunet board definition
- Modify board cmake file for Network MCU
- nRF5340 DK NRF5340 CPU NET board definition (Network MCU)

Signed-off-by: Gaute Gamnes <gaute.gamnes@nordicsemi.no>
2019-11-08 19:26:35 +01:00
Ioannis Glaropoulos
b4acd3bbbd boards: arm: nordic: nRF5340_dk_nrf5340_cpuapp board definition
- Board cmake file with runner commands for Application MCU
- nRF5340 DK NRF5340 CPUAPP board definition (Application MCU)
  Secure and Non-Secure board definition
- nRF5340 shared SRAM partitioning info

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-11-08 19:26:35 +01:00
Alberto Escolar Piedras
d9c64a930a nrf52_bsim: Update the NRF52 HW models revision
Updated to the official tag (v2.0)
(same SHA as test_2019_11_08_CIc)

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-11-08 17:40:21 +01:00
Christian Taedcke
b25569ef74 soc: silabs_exx32: Enable mpu on efr32mg soc
Enables the arm v7m mpu on the efr32mg soc and the board
efr32mg_sltb004a.

Tested on hardware with samples/mpu/mpu_test and
tests/kernel/mem_protect

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2019-11-08 10:38:18 -06:00
Francois Ramu
1967a1befe boards: arm: st_stm32: add lptimer to disco_l475_iot1 board
This patch introduces the support of the LowPower Timer
     for the STM32L4xx from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-11-08 10:04:21 -06:00
Francois Ramu
39e0b4bf59 boards: arm: st_stm32: add lptimer to nucleo_l4r5zi boards
This patch introduces the support of the LowPower Timer
     for the STM32L4xx from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-11-08 10:04:21 -06:00
David Leach
d36b1b11f7 boards: riscv: rv32m1: enable BT related configuration
Specific SW defined BLE LL parameters need to be set
if the user enables it on this platform. As such, conditionally
enable them directly into the defconfig.

INTMUX CH2 and CH3 are not available to be used if BT support
is enabled on Vega, because they are used internally by the
BLE SW LL

Signed-off-by: David Leach <david.leach@nxp.com>
2019-11-08 15:38:57 +01:00
Alex Porosanu
bfcfac8bf3 doc: riscv: rv32m1_vega: add BLE software link layer info
Since the experimental BLE software link layer is enabled on
the VEGABoard, add some information about it, as well as the
limitations.

Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
2019-11-08 15:38:57 +01:00
David Leach
94106a8ff3 boards: riscv: rv32m1: add support for GPIO debugging
Having a pin toggle when the code reaches a certain point
is really useful for debugging; the infrastructure is already
in place for Nordic boards, so just build upon and enable the
mechanism on the Vega board as well.

Signed-off-by: David Leach <david.leach@nxp.com>
2019-11-08 15:38:57 +01:00
Andrzej Głąbek
6d1d7449c1 nrf52_bsim: Update the NRF52 HW models revision
Update the models revision used for building so that nrf52_bsim
can be used with nrfx 2.0.0.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2019-11-08 14:54:12 +01:00
Andrzej Głąbek
2115099932 nordic: Update nrfx HAL function calls after switching to nrfx 2.0.0
Calls to nrfx HAL functions in various nRF platform related source
files are complemented with pointers to relevant peripherals.

Additionally, TIMER HAL functions that got renamed in nrfx 2.0.0 are
updated in the qemu_cortex_m0 board supporting code.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2019-11-08 14:54:12 +01:00
Alberto Escolar Piedras
48590fa89f nrf52_bsim: Fix: shell return code should be != 0 on ASSERT
When calling posix_print_error_and_exit()
a return != 0 was not provided to the shell
This was due to thee way the tracing functions call back
into the main app exit function, assuming that callback
will return.
But in the SOC_INF boards, that function does
not return, and the tracing functions never have the
chance to exit(!=0)
Fix it by calling posix_exit() in the wrap function instead.

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-11-08 14:04:19 +01:00
Andrew Boie
4f77c2ad53 kernel: rename z_arch_ to arch_
Promote the private z_arch_* namespace, which specifies
the interface between the core kernel and the
architecture code, to a new top-level namespace named
arch_*.

This allows our documentation generation to create
online documentation for this set of interfaces,
and this set of interfaces is worth treating in a
more formal way anyway.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-11-07 15:21:46 -08:00
Johann Fischer
a63c937471 board: reel_board: fix target name used for pyocd
Fix target name used for pyocd.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2019-11-07 16:10:29 -06:00
Vincent Wan
1b263ba0a6 dts: specify cpu frequency for TI CC13X2/CC26X2
Add cpu clock frequency information to DTS so that it can be retrieved
in the code.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-11-07 15:55:21 -06:00
Henrik Brix Andersen
6e56feb2be boards: native_posix: add EEPROM device
Add a 32kB EEPROM device to the Zephyr native POSIX board for testing
purposes.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-11-07 16:32:15 -05:00
Peter Bigot
8e55968aba doc: correct path to boards/riscv
The board area was renamed from riscv32 to riscv back in July to
accommodate riscv64 support.  Fix the remaining references in
documentation.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-11-07 12:39:08 -06:00
Erwan Gouriou
eaa6058ebd boards: nucleo_wb55rg: Update doc with BLE support
BLE was missing as supported feature.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-11-07 02:42:24 -06:00
Martí Bolívar
07a40cbbcf scripts: runners: add misc-flash runner
Some boards require specific sequences of commands to run which aren't
generally useful for other boards. Add a catch-all runner to handle
these cases.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2019-11-06 17:31:53 -08:00
Stephanos Ioannidis
2d7460482d headers: Refactor kernel and arch headers.
This commit refactors kernel and arch headers to establish a boundary
between private and public interface headers.

The refactoring strategy used in this commit is detailed in the issue

This commit introduces the following major changes:

1. Establish a clear boundary between private and public headers by
  removing "kernel/include" and "arch/*/include" from the global
  include paths. Ideally, only kernel/ and arch/*/ source files should
  reference the headers in these directories. If these headers must be
  used by a component, these include paths shall be manually added to
  the CMakeLists.txt file of the component. This is intended to
  discourage applications from including private kernel and arch
  headers either knowingly and unknowingly.

  - kernel/include/ (PRIVATE)
    This directory contains the private headers that provide private
   kernel definitions which should not be visible outside the kernel
   and arch source code. All public kernel definitions must be added
   to an appropriate header located under include/.

  - arch/*/include/ (PRIVATE)
    This directory contains the private headers that provide private
   architecture-specific definitions which should not be visible
   outside the arch and kernel source code. All public architecture-
   specific definitions must be added to an appropriate header located
   under include/arch/*/.

  - include/ AND include/sys/ (PUBLIC)
    This directory contains the public headers that provide public
   kernel definitions which can be referenced by both kernel and
   application code.

  - include/arch/*/ (PUBLIC)
    This directory contains the public headers that provide public
   architecture-specific definitions which can be referenced by both
   kernel and application code.

2. Split arch_interface.h into "kernel-to-arch interface" and "public
  arch interface" divisions.

  - kernel/include/kernel_arch_interface.h
    * provides private "kernel-to-arch interface" definition.
    * includes arch/*/include/kernel_arch_func.h to ensure that the
     interface function implementations are always available.
    * includes sys/arch_interface.h so that public arch interface
     definitions are automatically included when including this file.

  - arch/*/include/kernel_arch_func.h
    * provides architecture-specific "kernel-to-arch interface"
     implementation.
    * only the functions that will be used in kernel and arch source
     files are defined here.

  - include/sys/arch_interface.h
    * provides "public arch interface" definition.
    * includes include/arch/arch_inlines.h to ensure that the
     architecture-specific public inline interface function
     implementations are always available.

  - include/arch/arch_inlines.h
    * includes architecture-specific arch_inlines.h in
     include/arch/*/arch_inline.h.

  - include/arch/*/arch_inline.h
    * provides architecture-specific "public arch interface" inline
     function implementation.
    * supersedes include/sys/arch_inline.h.

3. Refactor kernel and the existing architecture implementations.

  - Remove circular dependency of kernel and arch headers. The
   following general rules should be observed:

    * Never include any private headers from public headers
    * Never include kernel_internal.h in kernel_arch_data.h
    * Always include kernel_arch_data.h from kernel_arch_func.h
    * Never include kernel.h from kernel_struct.h either directly or
     indirectly. Only add the kernel structures that must be referenced
     from public arch headers in this file.

  - Relocate syscall_handler.h to include/ so it can be used in the
   public code. This is necessary because many user-mode public codes
   reference the functions defined in this header.

  - Relocate kernel_arch_thread.h to include/arch/*/thread.h. This is
   necessary to provide architecture-specific thread definition for
   'struct k_thread' in kernel.h.

  - Remove any private header dependencies from public headers using
   the following methods:

    * If dependency is not required, simply omit
    * If dependency is required,
      - Relocate a portion of the required dependencies from the
       private header to an appropriate public header OR
      - Relocate the required private header to make it public.

This commit supersedes #20047, addresses #19666, and fixes #3056.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2019-11-06 16:07:32 -08:00
Stephane D'Alu
b94a6589b4 boards: support for DWM1001-DEV
Board description: https://www.decawave.com/product/dwm1001-module/

Signed-off-by: Stephane D'Alu <sdalu@sdalu.com>
2019-11-06 21:26:23 +01:00
Martí Bolívar
63c6917234 boards: arm: add generic openocd-via-jlink support for nRF5x boards
This support is Zephyr RTOS aware, so you can debug threads as well.

Add a CMake fragment which adds openocd support for nrf5 boards which
can also be flashed via JLink. This ought to work for nRF51 and nRF52
based boards at time of writing with openocd 0.10.0 or later (zephyr
SDK 0.10.3 also worked when I tried for nrf52840_pca10056).

Use it from the nRF DKs from Nordic which have interface MCUs with
Segger compatible firmware. I'm also including Thingy:52, even though
it doesn't, to make it easier when connecting to it via a standalone
JLink dongle. The board has a nice connector for that.

I'm leaving non-Nordic boards alone for now because I don't know them.
It's just one line of CMake to add it for other boards, which should
be easy for their maintainers to do.

Suggested-by: Radosław Koppel <radoslaw.koppel@nordicsemi.no>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2019-11-06 21:15:39 +01:00
Kumar Gala
dc2cb92c4a dts: Add standard alias for watchdog
Introduce a standard watchdog alias 'watchdog0' that can be utilized
by sample/test code in the future.  This helps remove the need for
CONFIG_WDT_0_NAME in dts_fixup.h files.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-11-06 13:51:20 -06:00
Kumar Gala
c111b7e49d watchdog: cmsdk: Convert to use DT generated label for device name
Convert driver to use DT_INST_0_ARM_CMSDK_WATCHDOG_LABEL instead of
CONFIG_WDT_0_NAME.  This requires we introduce a "label" property in all
the related dts files.  Also introduce a standard watchdog alias
('watchdog0') that can be utilized by sample/test code in the future.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-11-06 13:51:20 -06:00
Erwan Gouriou
4dc303b99b dts: stm32: Remove pinctrl definitions
dts pinctrl definitions were pushed in tree without the code
available to deal with it. They have been kept waiting for the
code, but this is taking much more time than initially thought.

So in current zephyr tree, for all STM32 boards, we have pinmux.c
file which is used to configure pins and these files that are
basically no-op. This situation is creating a lot of confusion
especially to new comers, and create useless maintenance effort.

Remove these files for now.
When zephyr will ready to use them, this commit could be reverted.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-11-06 18:26:04 +01:00
Erwan Gouriou
6994dcc30b shields: x_nucleo_iks01a1: Enable IRQ pin for LIS3MDL magn sensor
Update shield description and sample to allow testing of LIS3MDL
sensor IRQ pin.

Update sample yaml file to state dependency on arduino_gpio.
Additionally, fix redundant line in sample yaml

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-11-06 17:10:49 +01:00
Song Qiang
7a7cc2f7b4 boards: 96b_stm32_sensor_mez: apply kconfig changes
DMA is now selected by Kconfig symbols in I2S, and DMA_STM32
is selected by DMA in
soc/arm/st_stm32/common/Kconfig.defconfig.series. So remove the
DMA selecting operation here.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-11-06 14:14:39 +01:00
Song Qiang
85a0cc8f9a boards: arm: 96b_argonkey: Update dma defconfig for tests
Previous defconfig for dma is DMA_STM32F4X in this board, while the new
generic driver uses DMA_STM32 to enable DMA support, and also dma driver
of stm32 now needs HEAP_MEM_POOL_SIZE to be big enough to hold dma
stream instances.

Additional .conf files are added for also adding HEAP_MEM_POOL_SIZE
configuration to two test cases.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-11-06 14:14:39 +01:00
Song Qiang
87b9da6141 dt-bindings: boards: apply dma dts changes to some boards
These boards using i2s in dts now have to declare the usage of dma in
dts, too.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-11-06 14:14:39 +01:00
Kumar Gala
819276e082 sensor: ccs811: Convert GPIOs to device tree
Update ccs811 dts binding to include GPIO pins for wakeup, reset, and
interrupt and change driver code to get the GPIO pin and controller
info from DT instead of Kconfig.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-11-06 11:13:04 +01:00
Armando Visconti
21d1b26618 boards/arm: SensorTile.box: fix LIS2MDL configuration
The SensorTile.box SPI3 bus hosts the LIS2MDL device connected
in 4-wires mode (full duplex MISO and MOSI lines) by default.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2019-11-05 15:42:00 -06:00
Kumar Gala
cd35a4a753 sensor: vl53l0x: Convert GPIO XSHUT to device tree
Update vl53l0x dts binding to include GPIO XSHUT pin and change
driver code to get the GPIO pin and controller info from DT instead of
Kconfig.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-11-05 15:07:18 -06:00
Thomas Kupper
ef0e3ed31d west: runner: add support for stm32flash runner
Add stm32flash runner and 8 stm32flash runner tests

Signed-off-by: Thomas Kupper <thomas.kupper@gmail.com>
2019-11-05 15:02:53 -05:00
Peter A. Bigot
991287b26a boards: particle_*: correct antenna selection sense
Experimentation with RSSI checks of BLE scans confirms that the
antenna switch setting is incorrect on the argon, boron, and xenon
platforms: when PCB is selected, performance is best with a uFL
antenna, and vice-versa.  Checks against the Particle OpenThread
firmware confirm that the correct practice is to invert the settings.
Though the SKY 13351 SPDT switch datasheet suggests otherwise it seems
the VCTLx signals are active low.

Switch the sense of all antennal selection output operations.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-11-05 15:01:28 -05:00
Jose Alberto Meza
57695b6650 boards: mec: mec15modular: Update documentation
Add details for features exposed via headers.
Add power management recommended setup.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-11-05 19:40:55 +01:00
Filip Brozovic
4d9e93b791 boards: twr-kv58f220m: add support for the NXP TWR-KV58F220M board
Add support for the NXP TWR-KV58F220M development board. This board
features an NXP MKV58F24 MCU, four user LEDs and four buttons,
potentiometer, two TWRPI headers, and a motor control header.

Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2019-11-05 19:37:21 +01:00
David Leach
afdc63f320 subsys/random: Add cryptographically secure and bulk fill functions
1) Add cryptographically secure random functions to provide
FIPS 140-2 compliant random functions.

2) Add name to random function choice selectors to ease
selection in SOC .defconfig files

3) Add bulk fill random functions.

Signed-off-by: David Leach <david.leach@nxp.com>
2019-11-05 19:36:42 +01:00
Ulf Magnusson
07bf345db3 boards: arm: mps2_an521/musca: kconfig: Clean up BOARD defaults
Putting 'if's directly on the defaults is simpler here.

I'm guessing BOARD should always be "musca_{a,b1}_nonsecure" if it isn't
"musca_{a,b1}", so I removed the condition on the
"musca_{a,b1}_nonsecure" default (turning it into an "else").

Avoiding a top-level 'if'/'depends on' also avoids adding direct
dependencies to the BOARD symbol, which looks a bit neater in the
generated docs (though direct dependencies only matter for symbols that
might be selected/implied).

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-05 19:32:31 +01:00
Sigurd Olav Nevstad
911180368c boards: arm: nrf9160_pca10090: increase reset line wait time
The 1ms wait time has been shown to not be enough. Increasing to 10ms.

This change has been shown to be necessary after
CONFIG_SYS_CLOCK_TICKS_PER_SEC was changed from 128 to 32768
in https://github.com/zephyrproject-rtos/zephyr/pull/16782

Signed-off-by: Sigurd Olav Nevstad <sigurdolav.nevstad@nordicsemi.no>
2019-11-05 11:40:10 +01:00
Fabio Utzig
d6d79933c1 boards: nucleo_wb55: align partition boundaries
This MCU has sectors of size 4096, but some partitions were aligned to
0x800 addresses. MCUBoot detects this incosistency and halts. This patch
fixes the partitions to use properly aligned addresses (multiples of
0x1000).

Signed-off-by: Fabio Utzig <utzig@apache.org>
2019-11-05 08:58:33 +01:00