Move link_board_can to conditional Kconfig.
As part of this change, some board specific symbols are moved
to reel_board specific file.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move sparkfun_sara_r4 to conditional Kconfig.
As part of this change, remove disco_l475_iot1 specific configuration
as it is already part of board default configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Factorize definitions for ssd1306_128x32 and sd1306_128x64 shields
and move to conditional Kconfig.
As part of this change, direct drivers Kconfig symbols enabling
(I2C, SSD1306) are removed as they are application responsibility.
Also disabling SSD16XX is removed as SSD16XX should not be enabled
by default.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move wavehare epaper shields to conditional Kconfig.
As part of this change, direct drivers Kconfig symbols enabling
(SPI, SSD16XX) are removed as they are application
responsibility. GPIO is removed as well as it should be 'y' by
default on all boards according to Default board configuration
guidelines.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Put shield configuration Kconfig flags in new Kconfig.defconfig.
This way shield BLE subsystem can now be selected by application
using NETWORKING symbol, similarly to what is done when modem is
directly present on board.
Additionally, move board Kconfig files to a similar scheme where
shields related Kconfig flags are made available under shield,
board and NETWORKING symbols.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Put shield configuration Kconfig flags in new Kconfig.defconfig.
This way shield BLE susbystem can now be selected by application
using BT symbol, similarly to what is done when BlueNRG ship is
directly present on board.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
To make use of shields Kconfig.defconfig, parse these files
and newly created Kconfig.shield files which will define the
SHIELD_XXX Kconfig symbols that will be used for conditional
configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add Add STM32_OSPEEDR_VERY_HIGH_SPEED flag for SPI1_SCK to function
properly. This is needed for the proper communication with the LoRa
modem. Without this flag, the received data is mangled when burst
read is performed.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
The CONFIG_UP_SQUARED_{ATOM,CELERON,PENTIUM} symbols are unused after
commit c5e582038c ("boards/x86/up_squared: default to new local APIC
timer").
Since these symbols are the only thing in boards/x86/up_squared/Kconfig,
which is osource'd in in board/Kconfig, just remove the entire file.
Found with a script.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This adds support for the EC (embedded controller) on a Google
reference board with codename "kukui". This board uses the STM32F098RC
chip. We built an application for the board and verified UART
functionality on the board.
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Setup manual was modified, added detailed description how to launch
and program board, added more photos for better understanding
of the setup process.
Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
Edited the index.rst file to say spi functionality is included. Also
edited the .yaml file in the boards directory to support spi for sanity
tests.
Signed-off-by: Jose Manuel Pacheco Luna <manuel.pacheco@nxp.com>
Added in enablement for the SPI-0 instance pins, as found in the
board schematic files. These connect to the arduino headers on the
front of the board.
Signed-off-by: Jose Manuel Pacheco Luna <manuel.pacheco@nxp.com>
Add the green LED on the back of the reel_board to the device tree and
add PWM support for the front RGB LED.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add at86rf233 dts binding to enable IEEE 802.15.4 driver. The driver is
managed by sercom-4 at chip level.
see: SAM-R21_G.pdf section: 5.2 Internal Multiplexed Signals
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
MX25R64 supports maximum 33 MHz clock for READ operations in
high-performance mode. The previous 80 MHz speed should have been
8 MHz and was for DSPI/QSPI operations.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This commit removes any ignored testing tags for working tests.
In the future, this ignored testing tag list will be further reduced
as critical bugs for the qemu_cortex_r5 platform are addressed
(see #20217).
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds a temporary hack to support CI testing of the
qemu_cortex_r5 platform.
The Xilinx QEMU, required to run the tests for this platform, is
currently not available in the default SDK for CI (version 0.10.3) and
attempting to run any tests with the AArch64 QEMU included in this SDK
will cause failures (see #20217).
Since the latest SDK (version 0.11.0-alpha-8) has been added to the CI
image to allow initial testing, this hack automatically detects this
and uses the Xilinx QEMU for testing the qemu_cortex_r5 platform.
When the Zephyr SDK 0.11.0 is available as the default SDK for CI in
the future, this commit should be reverted.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit modifies the 'qemu_cortex_r5' board qemu emulation to use
the arm-generic-fdt machine with the Xilinx-provided zcu102 device tree
instead of the hard-coded xlnx-zcu102 machine, which is very primitive
and cannot properly emulate the Cortex-R5 RPU of ZynqMP.
The QEMU zcu102 FDT (fdt-single_arch-zcu102-arm.dtb) in this commit was
generated from the v2019.2 release of the Xilinx/qemu-devicetrees.
Zephyr SDK version 0.11 Alpha 4 or above is required to use this, as
arm-generic-fdt is supported only by the Xilinx QEMU fork which was
added to the Zephyr SDK in the version 0.11 Alpha 4.
For more details, refer to the issue #20217.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Add support for the ST STM32G0316-DISCO development board. This board
features an ST STM32G031J6 MCU on a breakable SO8 to DIL8 module, a user
LED and a button.
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
SOC_FAMILY_NRF has no prompt. Assignments in configuration files have no
effect on symbols without prompts. A prompt means the symbol is
user-configurable.
SOC_FAMILY_NRF is instead enabled indirectly through being selected by
other symbols.
Detected through some work-in-progress improved error checking.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This patch enables SPI4 on the 96Boards STM32 Sensors Mezzanine.
SPI4 has been broken out to a Grove Connector on the board.
Changes:
- Updated board dts to enable spi4
- Updated board Kconfig
- Updated board documentation
- Update board pinmux
- Updated stm32f4 pinmux header file
- Updated stm32f401 dtsi
- Updated stm32f4 defconfig to enable PORTE GPIO
- Added board to spi_loopback test
Test: spi_loopback test passed
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Low frequency and high frequency clocks had separate devices
while they are actually handled by single peripheral with single
interrupt. The split was done probably because opaque subsys
argument in the API was used for other purposes and there was
no way to pass the information which clock should be controlled.
Implementation changes some time ago and subsys parameter was
no longer used. It now can be used to indicate which clock should
be controlled.
Change become necessary when nrf5340 is taken into account where
there are more clocks and current approach would lead to create
multiple devices - mess.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This commit targets solving issue #17731 over the LL_SW_SPLIT
arch of the BLE stack in Zephyr. This functionality is exposed
to the user as HCI Zephyr Command extensions
- BT_HCI_OP_VS_WRITE_TX_POWER_LEVEL
- BT_HCI_OP_VS_READ_TX_POWER_LEVEL
which enable Tx power read/write operations within BLE radio events
on a per role/connection basis.
The functionality is enabled upon the Kconfig advanced configuration
triggered by
- BT_CTLR_TX_PWR_DYNAMIC_CONTROL
depending on the enablement of Zephyr HCI vendor-specific command
extensions.
Necessary low-level radio HAL functionality and power definitions
are also supplied to address the high-level functionality of
controlling the Tx power.
Signed-off-by: Andrei Stoica <stoica.razvan.andrei@gmail.com>
Renames the lpc usart shim driver to more accurately reflect the
flexcomm hardware IP and to prepare for instantiating it on an SoC
outside the LPC family.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Configure as GPIOs pins that by default are not GPIOs
Enable pinmux for port F
Enable ADC, PWM drivers by default, but keep SPI disabled.
Swap I2C instances since I2C0 is multiplexed with UART2
Select VTR3 as 1.8V
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
EEPROM drivers that support STM32L1 have been tested
on 96b_wistrio boards.
EEPROM support is added to the board documentation.
Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
