Commit graph

1403 commits

Author SHA1 Message Date
Roland Ma
01049b73be dts: arm: st: Add dts and soc additions for stm32 F767ZI board
Added dts additions for stm32 nucleo f767zi board, also added
and modified soc addtions for thet board.
Updated dts reference file name.
Updated yaml to take out adc for now.

Signed-off-by: Roland Ma <rolandma@yahoo.com>
2020-01-16 22:51:13 +01:00
Andrei Gansari
c9301ad8a3 soc: enables flash on LPC55xxx SoCs
Enables IAP Flash Controller device on LPC55xxx SoCs.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2020-01-16 08:19:46 -06:00
Maureen Helm
ee65932c96 drivers: watchdog: Refactor mcux wdog driver to use generated dts macros
Refactors the mcux wdog driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-15 18:02:19 -05:00
Maureen Helm
9329c0db27 drivers: counter: Refactor mcux rtc driver to use generated dts macros
Refactors the mcux rtc driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-15 18:02:19 -05:00
Maureen Helm
94c5a75998 drivers: spi: Refactor mcux dspi driver to use generated dts macros
Refactors the mcux dspi driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-15 18:02:19 -05:00
Maureen Helm
93b457f4da drivers: serial: Refactor mcux lpsci driver to use generated dts macros
Refactors the mcux lpsci driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt and kinetis
socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-15 18:02:19 -05:00
Maureen Helm
5df8b5d63e drivers: serial: Refactor mcux uart driver to use generated dts macros
Refactors the mcux uart driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-15 18:02:19 -05:00
Maureen Helm
806813bb6a drivers: i2c: Refactor mcux i2c driver to use generated dts macros
Refactors the mcux lpi2c driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-15 18:02:19 -05:00
Maureen Helm
c0e2c6369b soc: nxp_imx: Fix counter_basic_api test for i.mx rt boards
The counter_basic_api test was broken for i.mx rt boards when we
refactored the mcux gpt driver to use generated device tree macros in
commit b8ad9969ef.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-15 11:30:44 -05:00
Håkon Øye Amundsen
e3da8cc18c soc: nordic: add HAS_HW_NRF_ACL for nrf53 net core
The network core has the ACL peripheral, reflect this in the
SoC kconfig.

Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
2020-01-15 14:13:05 +01:00
Maureen Helm
b541962cce soc: nxp_kinetis: Remove extra blank line at end of ke1xf dts fixup
Removes an extra blank line at the end of the ke1xf device tree fixup
file.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-14 11:10:27 -05:00
Maureen Helm
b8ad9969ef drivers: counter: Refactor mcux gpt driver to use generated dts macros
Refactors the mcux gpt driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-14 11:10:27 -05:00
Maureen Helm
9e14543c19 drivers: gpio: Refactor mcux igpio driver to use generated dts macros
Refactors the mcux igpio driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-14 11:10:27 -05:00
Maureen Helm
a2082303b8 drivers: serial: Refactor mcux lpuart driver to use generated dts macros
Refactors the mcux lpuart driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt and kinetis
socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-14 11:10:27 -05:00
Maureen Helm
7242660399 drivers: i2c: Refactor mcux lpi2c driver to use generated dts macros
Refactors the mcux lpi2c driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt and kinetis
socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-14 11:10:27 -05:00
Andrew Boie
a594ca7c8f kernel: cleanup and formally define CPU start fn
The "key" parameter is legacy, remove it.

Add a typedef for the expected function pointer type.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-01-13 16:35:10 -05:00
Vincent Wan
ce90e24d25 kconfig: deprecate TI cc2650_sensortag and cc2650 SoC
Adding Kconfig settings to warn anyone trying to build for this
platform of its pending deprecation in 2.2.0.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-01-13 10:21:12 -05:00
Vincent Wan
180b4df229 soc: kconfig: add SOC_DEPRECATED_RELEASE
Adding a Kconfig parameter so that we can indicate an SoC is to be
deprecated, similar to what is being done for BOARD_DEPRECATED_RELEASE.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-01-13 10:21:12 -05:00
Henrik Brix Andersen
b702e5fdde soc: riscv: rv32m1: enable the RV32M1 Timer/PWM driver
Enable the driver for the Timer/PWM (TPM) module present in the
OpenISA RV32M1 when PWM is enabled.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-13 09:12:34 -06:00
Henrik Brix Andersen
f3144644bd soc: riscv: rv32m1: enable peripheral clocks for Timer/PWM modules
Enable the peripheral clocks for the OpenISA RV32M1 Timer/PWM (TPM)
modules.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-13 09:12:34 -06:00
Henrik Brix Andersen
ce9141236b modules: vega: add option for indicating the presence of RV32M1 TPM
Add Kconfig option for indicating that a given SoC contains the
OpenISA RV32M1 Timer/PWM module (TPM).

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-13 09:12:34 -06:00
Christian Taedcke
20aa2bcf05 boards: efr32_slwstk6061a: Add support for spi nor flash
This commit adds support for the on-board flash MX25R8035F that is
directly connected to the efr32fg soc.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2020-01-10 07:14:35 -06:00
Christian Taedcke
0201d182a8 boards: efr32mg_sltb004a: Add support for spi nor flash
This commit adds support for the on-board flash MX25R8035F that is
directly connected to the efr32mg soc.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2020-01-10 07:14:35 -06:00
Marcin Szymczyk
2d6c6959f9 soc: nrf91: add power management
Only System OFF mode is supported.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2020-01-10 13:09:44 +01:00
Marcin Szymczyk
32b3ab2354 soc: nrf53: add power management
Only System OFF mode is supported.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2020-01-10 13:09:44 +01:00
Stephanos Ioannidis
d314253fbb soc: arm: xilinx_zynqmp: Relocate platform-specific initialisation.
This commit relocates the exception vector table address range
configuration routine that was previously implemented as part of
Cortex-R architecture reset function to SoC platform-specific
initialisation routine.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-10 10:34:17 +01:00
Ryan QIAN
7f75e4f83b soc: arm: nxp_imx: rt: add device support i.MX RT1010
- Add device support for i.MXRT1010

Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
2020-01-09 16:29:22 -06:00
Ulf Magnusson
def1f0e2d5 devicetree: Remove DT_SRAM_{BASE_ADDRESS,SIZE}, use CONFIG_* versions
The SRAM address and size are currently available as both
DT_SRAM_{BASE_ADDRESS,SIZE} and as CONFIG_SRAM_{BASE_ADDRESS,SIZE} (via
the Kconfig preprocessor).

Use the CONFIG_SRAM_* versions everywhere, and remove generation of the
DT_SRAM_* versions from gen_defines.py.

The Kconfig symbols currently depend on 'ARC || ARM || NIOS2 || X86'.
Not sure why, so I removed it.

It looks like no configuration files set CONFIG_SRAM_* at the moment, so
another option might be to use the DT_* symbols everywhere instead. Some
Kconfig.defconfig.series files add defaults to them though.

Also improve the help texts for CONFIG_SRAM_* to say that they normally
come from devicetree rather than configuration files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-07 17:19:36 +01:00
Stephanos Ioannidis
09ee834b4c soc: arm: xilinx_zynqmp: Refactor for multi-arch support.
The Xilinx ZynqMP SoC embeds both Cortex-R "RPU" and Cortex-A "APU"
cores.

Since the current Zephyr architecture cannot support AMP of Cortex-R
and Cortex-A within the same project, the RPU and APU should be
considered separate platforms and handled accordingly.

This commit re-purposes the SOC_XILINX_ZYNQMP symbol as a helper symbol
indicating that Xilinx ZynqMP SoC is used, and adds a new symbol,
SOC_XILINX_ZYNQMP_RPU, for specifying the actual build target platform.

When Cortex-A support is added in the future, SOC_XILINX_ZYNQMP_APU
symbol should be added and used to conditionally handle APU-specific
code.

For more details, refer to the issue #20217.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-07 17:17:12 +01:00
Daniel Leung
e73231f7f0 toolchain: xcc: use Clang if exists
The XCC toolchain may come with Clang front-end depending on
how it's built. Currently, the only SoC/board using XCC is
the intel_s1000_crb and its XCC toolchain comes with Clang
3.9.0 which has a lot better support for C99 and C++11 than
the portion based on GCC 4.2 (which does not even support
C++11). So this change attempts to use the Clang portion
instead of GCC if the Clang executable exists.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 17:09:38 +01:00
Daniel Leung
2a2351b58f soc: intel_s1000: add dummy sys_reboot() for test with XCC
XCC does not seem to handle if(IS_ENABLED()) well which means
XCC would not get rid of code even IS_ENABLED() is false.
In this case, sys_reboot() call in ztest is in this situation
so add a dummy version for ztest only.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 17:09:38 +01:00
Daniel Leung
24b9542eba soc: intel_s1000: fix XCC build error when CONFIG_LOG_MINIMAL=y
During LOG_*() macro expansions, XCC expands everything even though
IS_ENABLED() is used. This resulting in various log*() functions
(e.g. log_0(), log_1(), etc.) being required for linking. However,
when CONFIG_LOG_MINIMAL=y, those functions are not compiled from
the logging subsystem. Therefore, to get past the linking error,
dummy versions are being provided.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 17:09:38 +01:00
Daniel Leung
bac0a93d62 soc: intel_s1000: provide dummy version of _gettimeofday_r()
The newlib of XCC requires linking to _gettimeofday_r() which
should have been provided by its own C library, but obviously
isn't. So we need to provide a dummy version to get past
the build error.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 17:09:38 +01:00
Daniel Leung
60db257e69 soc: intel_s1000: add dummy atexit() for Clang++
Add a dummy atexit() function when compiling C++ source files
using Clang++.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 17:09:38 +01:00
Daniel Leung
ac4ebe4ffb soc: intel_s1000: move XCC fixes into its own directory
Turns out it's going to have more fixes than just Newlib.
So put them into one directory.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 17:09:38 +01:00
Olof Johansson
3b733b5282 interrupt_controller: plic: use shared symbol for DT_*
miv already had it defined, but let's shorten the names and use
them in the driver. This also adds it for sifive-freedom.

Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 13:28:21 -05:00
Olof Johansson
a6b3b616f5 riscv: use standard MSTATUS
This is no longer needed, since all in-tree platforms are only using
the standard mstatus formats. Remove it to avoid the complexity.

Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 13:27:45 -05:00
Henrik Brix Andersen
ebb4126cbe soc: nxp: ke1xf: rename ftm instances to pwm to match other SoCs
Rename the NXP FTM instances in the KE1xF SoC to PWM to match the
other SoCs/boards using the FlexTimer as PWM generator.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-06 10:03:20 -06:00
Henrik Brix Andersen
87e768c79d soc: arm: nxp: remove unused DT_FTM_* dts fixups
Remove the now unused DT_FTM_* dts fixups from NXP ARM SoCs.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-06 10:03:20 -06:00
Jose Alberto Meza
3783c83b25 soc: arm: microchip: Allow to support only light sleep
Make sure light sleep hook function is compile when needed
This solves linking error for shippable test that only enable
light sleep.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-01-03 12:04:00 -08:00
Andrzej Głąbek
49bd19f3f2 soc: nrf5340: Fix busy waiting on nRF5340 application core
This patch adds a temporary workaround for the incorrect initialization
of the SystemCoreClock global variable that is done for the application
core of nRF5340 (see system_nrf5340_application.c) and that results in
k_busy_wait() producing delays of twice the requested time.
The problem is that the call to SystemCoreClockUpdate() that is done
at the end of SystemInit() correctly sets the value of SystemCoreClock
to reflect the hardware state after reset (HFCLK128M divided by 2),
but then the SystemCoreClock variable is initialized (by z_data_copy()
called from z_arm_prep_c()) to the __SYSTEM_CLOCK value that is defined
as 128000000. This in turn results in nrfx_coredep_delay_us() (used by
k_busy_wait() by default for nRF SoCs) delaying for twice the requested
number of microseconds.
The temporary workaround is to call SystemCoreClockUpdate() at a later
stage of the system initialization, in its nRF53 specific part.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-01-03 14:19:38 +01:00
Benjamin Valentin
cd0873015a timer: sam0_rtc_timer: Add support for SAME54
The RTC peripheral found in the SAMD5x/SAME5x MCUs is very
simmilar to the one found in existing sam0 devices with only
a few changes to register names and the clock source selection.

Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
2019-12-21 11:15:52 -05:00
Jack Rosenthal
53ed9e57a2 soc: stm32f0: Add support for STM32F098xx SOC
This adds a Kconfig options and device tree configs for the STM32F098
series of SoC.

Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
2019-12-20 20:27:20 -05:00
Carlo Caione
aec9a8c4be arch: arm: Move ARM code to AArch32 sub-directory
Before introducing the code for ARM64 (AArch64) we need to relocate the
current ARM code to a new AArch32 sub-directory. For now we can assume
that no code is shared between ARM and ARM64.

There are no functional changes. The code is moved to the new location
and the file paths are fixed to reflect this change.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-12-20 11:40:59 -05:00
Øyvind Rønningstad
8531c7cb44 riscv: linker.ld: Port vector table to zephyr_linker_sources()
Put it in its own linker file snippet.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Øyvind Rønningstad
0b2c8e201c arm, x86, riscv: linker.ld: Move TEXT_SECTION_OFFSET
to its own linker file snippet so snippets can be placed before it.
Using zephyr_linker_sources().

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Øyvind Rønningstad
b1026da300 arm: linker.ld: Port the CC32xx flash header to zephyr_linker_sources()
Add the .dbghdr sections via its own linker script snippet.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Øyvind Rønningstad
54c1af861c arm: linker.ld: Port NXP_IMX_RT_BOOT_HEADER to zephyr_linker_sources()
Add the .boot_hdr.* sections via its own linker script snippet.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Øyvind Rønningstad
f5fda5cfa1 arm: linker.ld: Port KINETIS_FLASH_CONFIG to zephyr_linker_sources()
Add the .kinetis_flash_config via its own linker script snippet.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Øyvind Rønningstad
d1c2a4edbf cmake: Add the TEXT_START location to zephyr_linker_sources()
Places linker code at or near the beginning of the text section.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00